CN104883146A - Rail-to-rail differential amplifier - Google Patents

Rail-to-rail differential amplifier Download PDF

Info

Publication number
CN104883146A
CN104883146A CN201510183932.9A CN201510183932A CN104883146A CN 104883146 A CN104883146 A CN 104883146A CN 201510183932 A CN201510183932 A CN 201510183932A CN 104883146 A CN104883146 A CN 104883146A
Authority
CN
China
Prior art keywords
pmos
nmos tube
drain electrode
rail
connects
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201510183932.9A
Other languages
Chinese (zh)
Inventor
易坤
高继
赵方麟
陈雪松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Bright Power Semiconductor Co Ltd
Original Assignee
Chengdu Minchuang Science & Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chengdu Minchuang Science & Technology Co Ltd filed Critical Chengdu Minchuang Science & Technology Co Ltd
Priority to CN201510183932.9A priority Critical patent/CN104883146A/en
Publication of CN104883146A publication Critical patent/CN104883146A/en
Pending legal-status Critical Current

Links

Landscapes

  • Amplifiers (AREA)

Abstract

The invention belongs to the technical field of integrated circuits and relates to a rail-to-rail differential amplifier. A circuit includes a differential input circuit driven by a substrate and a differential to single end conversion circuit. The rail-to-rail differential amplifier has the advantages that the rail-to-rail differential amplifier can work under low voltage, rail-to-rail differential input and rail-to-rail voltage output can be achieved, and high voltage gain is achieved.

Description

Rail-to-rail differential amplifier
Technical field
The present invention relates to field of analog integrated circuit, relate to a kind of rail-to-rail differential amplifier.
Background technology
Along with the reduction of transistor size, the scale of integrated circuit and integrity problem impel supply voltage to reduce.Meanwhile, along with developing rapidly and extensive use of movable equipment, the circuit of low-voltage, low-power consumption also receives publicity day by day.Low supply voltage is had higher requirement to technique and circuit structure.
Operational amplifier is the elementary cell in analogue layout, is widely used in various simulation and mixed-signal system.In CMOS technology, due to the threshold voltage of MOSFET can not fall too many, therefore on stuctures and properties, having very large constraint to the design of low voltage operational amplifier, rail-to-rail voltage input (namely input voltage comprises the whole voltage range from VDD to GND) is difficult to realize especially.Bulk driven technology is that the circuit design under low-voltage provides a kind of important method, and this technology makes to form weak positively biased between trap and source electrode, thus reduces the restriction of threshold voltage.
Summary of the invention
The object of the invention is to be to provide a kind of rail-to-rail differential amplifier, operational amplifier is worked at lower voltages, realize rail-to-rail input and the output of rail-to-rail voltage.
For solving the problems of the technologies described above, embodiments of the invention provide technical scheme as follows:
Rail-to-rail differential amplifier of the present invention, comprising: Differential input circuit and difference are to single-ended change-over circuit;
Described Differential input circuit comprises: the first PMOS, the second PMOS, the 3rd PMOS and the first NMOS tube, the second NMOS tube, the 3rd NMOS tube; Described first PMOS and the second PMOS form PMOS substrate Differential Input pair, and described first NMOS tube and the second NMOS tube form NMOS substrate Differential Input pair, and the 3rd PMOS and the 3rd NMOS tube are as differential pair load; The substrate of the first NMOS tube and the first PMOS connects anode input signal, and the substrate of the second NMOS tube and the second PMOS connects negative terminal input signal; The grounded-grid of the first PMOS and the second PMOS, source connect the 3rd PMOS drain electrode, and the source electrode of the 3rd PMOS connects power supply, grid connects the first bias voltage; The grid of the first NMOS tube and the second NMOS tube connects power supply, source connects the 3rd NMOS tube drain electrode, and source ground, the grid of the 3rd NMOS tube connect the second bias voltage; Difference output is made in the drain electrode of the first NMOS tube, the second NMOS tube and the first PMOS, the second PMOS;
The output difference sub-signal of described Differential input circuit, to single-ended change-over circuit, is converted to single-ended signal and exports by described difference.
Concrete, described difference to single-ended change-over circuit comprises: the 4th PMOS, the 5th PMOS, the 6th PMOS, the 7th PMOS and the 4th NMOS tube, the 5th NMOS tube, the 6th NMOS tube, the 7th NMOS tube; The source of described 4th PMOS, the 5th PMOS and substrate connects power supply, grid connects the 3rd bias voltage;
4th PMOS drain electrode connects the 6th PMOS source electrode and the drain electrode of the first NMOS tube, and the 5th PMOS drain electrode connects the 7th PMOS source electrode and the drain electrode of the second NMOS tube; 6th PMOS, the 7th PMOS substrate connect the 7th bias voltage, grid connects the 4th bias voltage;
6th PMOS drain electrode connects the 6th NMOS tube drain electrode, and the 7th PMOS drain electrode connects the 7th NMOS tube drain electrode; 6th NMOS tube, the 7th NMOS substrate connect the 8th bias voltage, grid connects the 5th bias voltage; 6th NMOS tube source electrode connect the 4th NMOS tube drain electrode and the first PMOS drain electrode, the 7th NMOS tube source electrode connect the 5th NMOS tube drain second PMOS drain; The substrate of the 4th NMOS tube, the 5th NMOS tube receives the 6th NMOS tube drain terminal, grid connects the 6th bias voltage, source ground; The drain electrode of the 7th NMOS tube exports single-ended signal.
Compared with prior art, rail-to-rail differential amplifier of the present invention, has following feature:
1. adopt bulk-driven MOS pipe as input difference to pipe, realization rail-to-rail input range at lower voltages;
2. adopt bulk driven current mirror and cascodes, realize the high-gain of operational amplifier at lower voltages;
Accompanying drawing explanation
Fig. 1 is the circuit structure diagram of a kind of embodiment of rail-to-rail differential amplifier of the present invention.
Embodiment
For embodiments of the invention will be solved technical problem, technical scheme and advantage clearly, be described in detail below in conjunction with the accompanying drawings and the specific embodiments.
Rail-to-rail differential amplifier of the present invention, comprise Differential input circuit and difference extremely single-ended change-over circuit, Differential input circuit receives anode input signal VINP and negative terminal input signal VINN, and output difference sub-signal, differential signal is converted to single-ended signal by difference to single-ended change-over circuit, output driving circuit amplifies further again, realizes rail-to-rail output.
Fig. 1 is the circuit that Differential input circuit and difference form to single-ended change-over circuit.Differential input circuit in the present invention and difference are described to single-ended change-over circuit below in conjunction with Fig. 1.
As shown in Figure 1, Differential input circuit is made up of the first PMOS P1, the second PMOS P2, the 3rd PMOS P3 and the first NMOS tube N1, the second NMOS tube N2, the 3rd NMOS tube N3.P1 and P2 forms P type substrate Differential Input pair, and P3 is as its load deflection; N1 and N2 forms N-type substrate Differential Input pair, and N3 is as its load deflection.The substrate of P1 with N1 is connected anode input signal VINP, and the substrate of P2 with N2 is connected negative terminal input signal VINN.The grounded-grid of P1, P2, source connect the drain electrode of P3, and the source electrode of P3 connects power supply, and grid meets the first bias voltage VB1.The drain electrode that grid connects power supply, source meets N3 of N1, N2, the source ground of N3, grid meet the second bias voltage VB2.Input offset voltage VB1 and VB2 provides operating current for differential pair.Difference output is made in the drain electrode of N1, N2 and P1, P2.
P1, P2 and N1, N2 formed fully differential to gamut voltage can be inputted, be because: when common mode input is lower, P1, P2 conducting is also in saturation condition, and N1, N2 cut-off; When common mode input is higher, P1, P2 end, and N1, N2 conducting be in saturation condition; When common mode input is at zone line, P1, P2 and N1, N2 can conductings.Make operational amplifier can work under any input voltage like this, achieve rail-to-rail input range.
The P type substrate Differential Input pair of P1 and P2 composition, their grid is ground connection.When P1 and P2 conducting, be in saturation condition, under its grid, form conducting channel, not by threshold voltage V tHPrestriction.When input signal VINP and VINN added by P1 and P2 substrate terminal changes, the depletion layer thickness between this substrate terminal and this conducting channel changes, thus changes the thickness of channel inversion layer, and then controls the size of channel current.
In Fig. 1, difference to single-ended change-over circuit comprises: the 4th PMOS P4, the 5th PMOS P5, the 6th PMOS P6, the 7th PMOS P7 and the 4th NMOS tube N4, the 5th NMOS tube N5, the 6th NMOS tube N6, the 7th NMOS tube N7.
The source of P4, P5 pipe and substrate connect power supply, grid meets the 3rd bias voltage VB3, and the drain electrode of P4 pipe connects P6 pipe source electrode and the drain electrode of N1 pipe, and the drain electrode of P5 pipe connects P7 pipe source electrode and the drain electrode of N2 pipe.The substrate of P6, P7 meets the 7th bias voltage VB7, grid meets the 4th bias voltage VB4.The drain electrode of P6 pipe connects the drain electrode of N6 pipe, and the drain electrode of P7 pipe connects the drain electrode of N7 pipe.The substrate of N6, N7 meets the 8th bias voltage VB8, grid meets the 5th bias voltage VB5.N6 pipe source electrode connects the drain electrode of N4 pipe and the drain electrode of P1 pipe, and N7 pipe source electrode connects the drain electrode of N5 pipe and the drain electrode of P2 pipe.The substrate of N4, N5 receives N6 pipe drain terminal, grid connects the 6th bias voltage VB6, source ground.The drain electrode of N7 pipe exports single-ended signal VA.
Difference to single-ended change-over circuit is cascodes, its objective is the gain improving amplifier.But although common cascodes can improve circuit gain, be difficult to work at lower voltages, therefore use the bulk driven current mirror be made up of N4 and N5, amplifier both-end is exported and is converted to Single-end output.Bulk driven current mirror is the pressure drop in order to reduce on N4, N5, if with common current mirror, then and the pressure drop V on it dSequal V gS, larger than threshold voltage, at low supply voltages, cascode amplifier can be caused not work.The grid of N4, N5 is biased voltage VB6, makes N4, N5 be in saturation condition, and input is added on substrate, the pressure drop V on such N4, N5 bSjust do not need larger than threshold voltage.VB3-VB5 provides gate bias voltage, ensures that all metal-oxide-semiconductors are operated in saturation region, VB7 and VB8 provides Substrate bias voltage for P6, P7, N6, N7, and object improves the output resistance of circuit, thus improve circuit gain.
In sum, rail-to-rail differential amplifier of the present invention, can work at lower voltages, realizes rail-to-rail Differential Input and rail-to-rail output.
Above-described embodiment only illustrates technical conceive of the present invention and feature, its objective is and is person skilled in the art can be understood content of the present invention and implement according to this, can not limit the scope of the invention with this.All equivalences done according to Spirit Essence of the present invention change or modify, and all should be encompassed within protection category of the present invention.

Claims (2)

1. rail-to-rail differential amplifier, comprising: Differential input circuit and difference are to single-ended change-over circuit;
Described Differential input circuit comprises: the first PMOS, the second PMOS, the 3rd PMOS and the first NMOS tube, the second NMOS tube, the 3rd NMOS tube; Described first PMOS and the second PMOS form PMOS substrate Differential Input pair, and described first NMOS tube and the second NMOS tube form NMOS substrate Differential Input pair, and the 3rd PMOS and the 3rd NMOS tube are as differential pair load; The substrate of the first NMOS tube and the first PMOS connects anode input signal, and the substrate of the second NMOS tube and the second PMOS connects negative terminal input signal; The grounded-grid of the first PMOS and the second PMOS, source connect the 3rd PMOS drain electrode, and the source electrode of the 3rd PMOS connects power supply, grid connects the first bias voltage; The grid of the first NMOS tube and the second NMOS tube connects power supply, source connects the 3rd NMOS tube drain electrode, and source ground, the grid of the 3rd NMOS tube connect the second bias voltage; Difference output is made in the drain electrode of the first NMOS tube, the second NMOS tube and the first PMOS, the second PMOS;
The output difference sub-signal of described Differential input circuit, to single-ended change-over circuit, is converted to single-ended signal and exports by described difference.
2. rail-to-rail differential amplifier as claimed in claim 1, it is characterized in that, described difference to single-ended change-over circuit comprises: the 4th PMOS, the 5th PMOS, the 6th PMOS, the 7th PMOS and the 4th NMOS tube, the 5th NMOS tube, the 6th NMOS tube, the 7th NMOS tube; The source of described 4th PMOS, the 5th PMOS and substrate connects power supply, grid connects the 3rd bias voltage;
4th PMOS drain electrode connects the 6th PMOS source electrode and the drain electrode of the first NMOS tube, and the 5th PMOS drain electrode connects the 7th PMOS source electrode and the drain electrode of the second NMOS tube; 6th PMOS, the 7th PMOS substrate connect the 7th bias voltage, grid connects the 4th bias voltage; 6th PMOS drain electrode connects the 6th NMOS tube drain electrode, and the 7th PMOS drain electrode connects the 7th NMOS tube drain electrode; 6th NMOS tube, the 7th NMOS substrate connect the 8th bias voltage, grid connects the 5th bias voltage; 6th NMOS tube source electrode connect the 4th NMOS tube drain electrode and the first PMOS drain electrode, the 7th NMOS tube source electrode connect the 5th NMOS tube drain second PMOS drain; The substrate of the 4th NMOS tube, the 5th NMOS tube receives the 6th NMOS tube drain terminal, grid connects the 6th bias voltage, source ground; The drain electrode of the 7th NMOS tube exports single-ended signal.
CN201510183932.9A 2015-04-20 2015-04-20 Rail-to-rail differential amplifier Pending CN104883146A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510183932.9A CN104883146A (en) 2015-04-20 2015-04-20 Rail-to-rail differential amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510183932.9A CN104883146A (en) 2015-04-20 2015-04-20 Rail-to-rail differential amplifier

Publications (1)

Publication Number Publication Date
CN104883146A true CN104883146A (en) 2015-09-02

Family

ID=53950502

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510183932.9A Pending CN104883146A (en) 2015-04-20 2015-04-20 Rail-to-rail differential amplifier

Country Status (1)

Country Link
CN (1) CN104883146A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107222197A (en) * 2016-03-21 2017-09-29 二劳额市首有限公司 Level shifter, digital analog converter, buffer amplifier, source electrode driver and electronic installation

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102571005A (en) * 2010-12-27 2012-07-11 无锡华润上华半导体有限公司 Rail-to-rail operational amplifier
CN104218907A (en) * 2014-08-25 2014-12-17 刘银 Bulk-driven low-voltage rail-to-rail operational amplifier
CN204615777U (en) * 2015-04-20 2015-09-02 成都岷创科技有限公司 Differential amplifier

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102571005A (en) * 2010-12-27 2012-07-11 无锡华润上华半导体有限公司 Rail-to-rail operational amplifier
CN104218907A (en) * 2014-08-25 2014-12-17 刘银 Bulk-driven low-voltage rail-to-rail operational amplifier
CN204615777U (en) * 2015-04-20 2015-09-02 成都岷创科技有限公司 Differential amplifier

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107222197A (en) * 2016-03-21 2017-09-29 二劳额市首有限公司 Level shifter, digital analog converter, buffer amplifier, source electrode driver and electronic installation

Similar Documents

Publication Publication Date Title
CN101963819B (en) Reference voltage circuit and electronic device
EP2652872B1 (en) Current mirror and high-compliance single-stage amplifier
CN110729995B (en) Level conversion circuit and level conversion method
EP3113359B1 (en) Amplifier arrangement
CN101917168B (en) High switching rate transconductance amplifier for active power factor corrector
CN105141265A (en) Gain increased operational transconductance amplifier
CN103825557A (en) Transconductance amplifier with low power consumption and high linearity
US20220045651A1 (en) Input voltage endurance protection architecture
CN106209035A (en) A kind of two stage comparator
CN109947172B (en) Mirror current source circuit with low voltage drop and high output resistance
CN102129264A (en) Low-temperature-coefficient current source fully compatible with standard CMOS (Complementary Metal-Oxide-Semiconductor) process
CN103427773A (en) Rail-to-rail operational amplifier
CN104881071A (en) Low-power reference voltage source
KR100842405B1 (en) High voltage cmos rail-to-rail input/output operational amplifier
CN111384940B (en) High-linearity wide-swing CMOS voltage follower
CN106559042A (en) The low-noise amplifier being applied under low-voltage
CN113131886B (en) Operational amplifier
US7064609B1 (en) High voltage, low-offset operational amplifier with rail-to-rail common mode input range in a digital CMOS process
CN102394582A (en) Substrate drive low voltage operational amplifier circuit
CN204928758U (en) Operation transconductance amplifier that gain promoted
CN204615777U (en) Differential amplifier
CN104218907A (en) Bulk-driven low-voltage rail-to-rail operational amplifier
CN104883146A (en) Rail-to-rail differential amplifier
CN201323554Y (en) Gain auxiliary amplifying circuit
CN102097939A (en) Current sampling circuit

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20160419

Address after: 201204 Zhang Heng road Shanghai, Pudong New Area Zhangjiang hi tech Park Lane 666 No. 2 floor 504-511 room 5

Applicant after: Shanghai Bright Power Semiconductor Co.,Ltd.

Address before: West high tech Zone Fucheng Road in Chengdu city of Sichuan province 610000 399 No. 6 Building 1 unit 10 floor No. 2

Applicant before: Chengdu Minchuang Science & Technology Co., Ltd.

CB02 Change of applicant information
CB02 Change of applicant information

Address after: 5 room 504-511, room 2, Lane 666, Zhang Heng Road, Pudong New Area, China (Shanghai) free trade zone, Shanghai, China ()

Applicant after: Shanghai semiconducto Limited by Share Ltd

Address before: 201204 Zhang Heng road Shanghai, Pudong New Area Zhangjiang hi tech Park Lane 666 No. 2 floor 504-511 room 5

Applicant before: Shanghai Bright Power Semiconductor Co.,Ltd.

WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20150902