CN104810440A - Flip LED (Light Emitting Diode) chip and manufacturing method thereof - Google Patents
Flip LED (Light Emitting Diode) chip and manufacturing method thereof Download PDFInfo
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- CN104810440A CN104810440A CN201510237919.7A CN201510237919A CN104810440A CN 104810440 A CN104810440 A CN 104810440A CN 201510237919 A CN201510237919 A CN 201510237919A CN 104810440 A CN104810440 A CN 104810440A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
Abstract
The invention provides a flip LED (Light Emitting Diode) chip and a manufacturing method thereof. a plurality of first columnar metal layers are formed on a contact layer; a second columnar metal layer is formed in each groove and an insulation reflection layer is then formed, and a plurality of first strip metal layers and second strip metal layers which are distributed at intervals are formed; an insulation layer with a first insulation layer opening and a second insulation layer opening is formed; a first bonding pad is electrically connected with a P type epitaxial layer by the first strip metal layers and the first columnar metal layers; a second bonding pad is electrically connected with an N type epitaxial layer by the second strip metal layers and the second columnar metal layers. According to the invention, the grooves which are distributed in a matrix are adopted and are electrically connected by three layers of metal structures, namely, the first and second bonding pads, the first and second strip metal layers and the first and second columnar layers, the areas, which are occupied by the grooves, of luminous zones of the epitaxial layers are reduced, and the luminance of the flip LED chip can be improved.
Description
Technical field
The present invention relates to semiconductor optoelectronic chip manufacturing field, particularly a kind of flip LED chips and preparation method thereof.
Background technology
Since early 1990s commercialization, through the development of twenties years, GaN base LED has been widely used in the fields such as indoor outer display screen, Projection Display lighting source, backlight, view brightening illumination, advertisement, traffic instruction, and is described as 21st century the most competitive solid light source of new generation.But for light emitting semiconductor device LED, replace conventional light source, enter high-end lighting field, three problems must be solved simultaneously: one is to solve luminosity Upgrade Problem, two is to solve heat dissipation problem, and three is the reduction problems that will solve production cost.
In recent years, the various technology for improving LED luminosity is arisen at the historic moment, such as patterned substrate technology, high-voltage chip, vertical stratification, DBR technology etc.
Wherein patterned substrate technology most effect, between 2010 to 2012, the dry method patterned substrate of cone structure that front and back occur and the wet method pattern substrate of Pyramid instead of the main flow substrate that the smooth Sapphire Substrate in surface becomes LED chip completely, make the crystal structure of LED and luminosity be obtained for revolutionary raising.But the main flow substrate that patterned substrate replaces the smooth Sapphire Substrate in surface to become LED chip adds the production cost of LED undoubtedly, although the cost increased can slowly reduce along with the raising of patterned substrate manufacturing technology level, cannot eliminate completely.
Along with the high speed development of semiconductor integration technology, a kind ofly be called that the LED structure of high-voltage chip is arisen at the historic moment, the LED of this kind of structure is generally after epitaxial loayer is formed, isolation channel is formed by lithographic etch process, fill insulant in isolation channel again, finally makes electrode and forms cascaded structure on the epitaxial loayer of each insulation isolation; Although this structure can improve the luminosity of LED, but the technical process of formation isolation channel, fill insulant considerably increases the manufacturing cost of chip, moreover, also reduce the reliability of LED chip to a certain extent, the deep etching such as caused because existing etching homogeneity does not reach requirement is unclean, finally can cause electric leakage, reduce the breakdown characteristics etc. of LED chip.
It is the heat dissipation problem that patterned substrate technology or high-voltage chip all do not solve LED chip well, formal dress flip-chip is connected on the good substrate of an electrical and thermal conductivity performance by vertical stratification and flip chip technology (fct), make to generate heat relatively more concentrated light emitting epitaxial layer closer to the hot dirt of heat radiation, most of heat is derived by substrate, instead of derive from the Sapphire Substrate that heat radiation is bad, this alleviates the heat dissipation problem of LED chip to a certain extent.
The LED chip of vertical stratification does not need etching N district material, this reduces a part of production cost of LED to a certain extent, and different from the current flowing mode of the LED chip of other structure, it is more suitable for the injection of big current, improves the luminosity of LED chip further.But the same with high-voltage chip, the LED of vertical stratification also needs to form isolation channel, and this substantially increases again the production cost of LED, and moreover, the chip of vertical stratification also needs to peel off substrate, so this improves the production cost of LED chip again.Compared with the LED chip of vertical stratification, the LED chip of inverted structure may more be preponderated in production cost.
In order to make LED technology fast-developing, make it play the part of prior comparatively look at lighting field as early as possible, a kind of flip LED chips of above-mentioned three problems and preparation method thereof that can simultaneously solve urgently is researched and developed.
Summary of the invention
The invention provides a kind of flip LED chips and preparation method thereof, to solve the problems of the prior art.
For solving the problems of the technologies described above, the invention provides a kind of flip LED chips, comprising:
Substrate and the epitaxial loayer be formed on described substrate, described epitaxial loayer comprises the N-type epitaxy layer be formed at successively on described substrate, active layer and P type epitaxial loayer;
To be formed in described epitaxial loayer and to expose the groove of the array arrangement of described N-type epitaxy layer;
Be formed at the contact layer on described P type epitaxial loayer, the position of the corresponding described groove of described contact layer is provided with contact layer opening;
The the second cylindrical metal layer being formed at the some first cylindrical metal layers on described contact layer and being formed in each groove;
Be formed at the insulative reflective layer on described P type epitaxial loayer, contact layer, the first cylindrical metal layer, the second cylindrical metal layer and in described groove, described insulative reflective layer is provided with the first insulative reflective layer opening exposing described first cylindrical metal layer and the second insulative reflective layer opening exposing described second cylindrical metal layer;
The first strip metal level that to be formed on described insulative reflective layer some is intervally arranged and the second strip metal level;
Be formed at the insulating barrier on described insulative reflective layer, the first strip metal level and the second strip metal level, described insulating barrier is provided with the first insulating layer openings exposing described first strip metal layer part region and the second insulating layer openings exposing described second strip metal layer part region; And
Be formed at the first pad on described insulating barrier and the second pad, described first pad to be formed with described P type epitaxial loayer by described first strip metal level and the first cylindrical metal layer and is electrically connected, and described second pad to be formed with described N-type epitaxy layer by described second strip metal level and the second cylindrical metal layer and is electrically connected.
Further, in described flip LED chips, also comprise a flip-chip substrate, described flip-chip substrate comprises the first electrically-conductive backing plate, the second electrically-conductive backing plate and the insulation in order to insulation described first electrically-conductive backing plate of isolation and the second electrically-conductive backing plate and isolates fixed head, described first electrically-conductive backing plate is formed with described first pad and is electrically connected, and described second electrically-conductive backing plate is formed with described second pad and is electrically connected.
Further, in described flip LED chips, described first strip metal level and all rectangular strip of the second strip metal level.
Further, in described flip LED chips, described first strip metal level is electrically connected with the first cylindrical metal layers all in same a line, and described second strip metal level is electrically connected with the second cylindrical metal layers all in same a line; Or described first strip metal level is electrically connected with the first cylindrical metal layers all in same row, described second strip metal level is electrically connected with the second cylindrical metal layers all in same row.
Further, in described flip LED chips, described first insulating layer openings and the second insulating layer openings are rectangular strip opening, and described first insulating layer openings and the second insulating layer openings are in staggered distribution along the length direction of described first strip metal level and described second strip metal level.
Further, in described flip LED chips, described first pad and all rectangular sheet of the second pad, the length direction along described first strip metal level and the second strip metal level arranges.
Further, in described flip LED chips, also comprise the barrier layer of array arrangement on described P type epitaxial loayer, described first cylindrical metal layer is formed on the contact layer above described barrier layer, staggers and arrange in described barrier layer and described groove interval.
Further, in described flip LED chips, also comprise the adhesive layer on the contact-making surface being formed at described flip-chip substrate and described first pad and the second pad.
Further, in described flip LED chips, described insulative reflective layer is DBR reflector; Or described insulative reflective layer is combined by metallic reflector and insulating medium layer, the material of described metallic reflector is silver, and the material of described insulating medium layer is at least one in silicon dioxide, silicon nitride or silicon oxynitride.
Further, in described flip LED chips, described first cylindrical metal layer, the second cylindrical metal layer, the first strip metal level, the second strip metal level, the first pad and the second pad by Cr, Ti, Al, Ni, Au, Ag, Cu, Sn at least bi-material combine.
The present invention also provides a kind of manufacture method of flip LED chips, comprising:
There is provided a substrate, described substrate is formed with epitaxial loayer, described epitaxial loayer comprises the N-type epitaxy layer be formed at successively on described substrate, active layer and P type epitaxial loayer;
The groove of the described N-type epitaxy layer of some exposures is formed in described epitaxial loayer;
Described P type epitaxial loayer forms contact layer, and the position of the corresponding described groove of described contact layer is provided with contact layer opening;
Described contact layer is formed some first cylindrical metal layers, and in each groove, forms the second cylindrical metal layer;
On described P type epitaxial loayer, contact layer, the first cylindrical metal layer, the second cylindrical metal layer and form insulative reflective layer in described groove, described insulative reflective layer is provided with the first insulative reflective layer opening exposing described first cylindrical metal layer and the second insulative reflective layer opening exposing described second cylindrical metal layer;
Described insulative reflective layer is formed some the first strip metal levels of being intervally arranged and the second strip metal level;
Described insulative reflective layer, the first strip metal level and the second strip metal level form insulating barrier, and described insulating barrier is provided with the first insulating layer openings exposing described first strip metal layer part region and the second insulating layer openings exposing described second strip metal layer part region; And
Described insulating barrier is formed the first pad and the second pad, described first pad to be formed with described P type epitaxial loayer by described first strip metal level and the first cylindrical metal layer and is electrically connected, and described second pad to be formed with described N-type epitaxy layer by described second strip metal level and the second cylindrical metal layer and is electrically connected.
Further, in the manufacture method of described flip LED chips, after forming the first pad and the second pad, also comprise: a flip-chip substrate is provided, described flip-chip substrate comprises the first electrically-conductive backing plate, the second electrically-conductive backing plate and the insulation in order to insulation described first electrically-conductive backing plate of isolation and the second electrically-conductive backing plate and isolates fixed head, described first electrically-conductive backing plate is formed with described first pad be electrically connected, and described second electrically-conductive backing plate is formed with described second pad be electrically connected.
Further, in the manufacture method of described flip LED chips, described first strip metal level and all rectangular strip of the second strip metal level.
Further, in the manufacture method of described flip LED chips, described first strip metal level is electrically connected with the first cylindrical metal layers all in same a line, and described second strip metal level is electrically connected with the second cylindrical metal layers all in same a line; Or described first strip metal level is electrically connected with the first cylindrical metal layers all in same row, described second strip metal level is electrically connected with the second cylindrical metal layers all in same row.
Further, in the manufacture method of described flip LED chips, described first insulating layer openings and the second insulating layer openings are rectangular strip opening, and described first insulating layer openings and the second insulating layer openings are in staggered distribution along the length direction of described first strip metal level and described second strip metal level.
Further, in the manufacture method of described flip LED chips, described first pad and all rectangular sheet of the second pad, the length direction along described first strip metal level and the second strip metal level arranges.
Further, in the manufacture method of described flip LED chips, before described P type epitaxial loayer forms contact layer, also be included in the barrier layer described P type epitaxial loayer being formed array arrangement, described first cylindrical metal layer is formed on the contact layer above described barrier layer, staggers and arrange in described barrier layer and described groove interval.
Further, in the manufacture method of described flip LED chips, after described insulating barrier is formed the first pad and the second pad, the contact-making surface being also included in described flip-chip substrate and described first pad and the second pad forms adhesive layer.
Further, in the manufacture method of described flip LED chips, after described insulating barrier is formed the first pad and the second pad, also comprise and carry out thinning to described substrate.
Further, in the manufacture method of described flip LED chips, described insulative reflective layer is DBR reflector; Or described insulative reflective layer is combined by metallic reflector and insulating medium layer, the material of described metallic reflector is silver, and the material of described insulating medium layer is at least one in silicon dioxide, silicon nitride or silicon oxynitride.
Further, in the manufacture method of described flip LED chips, described first cylindrical metal layer, the second cylindrical metal layer, the first strip metal level, the second strip metal level, the first pad and the second pad by Cr, Ti, Al, Ni, Au, Ag, Cu, Sn at least bi-material combine.
In flip LED chips provided by the invention and preparation method thereof, form some first cylindrical metal layers on the contact layer, the second cylindrical metal layer is formed in each groove, form insulative reflective layer again, and on insulative reflective layer, form some the first strip metal levels of being intervally arranged and the second strip metal level, then at insulative reflective layer, first strip metal level and the second strip metal level form the insulating barrier with the first insulating layer openings and the second insulating layer openings, first pad is formed with P type epitaxial loayer by the first strip metal level and the first cylindrical metal layer and is electrically connected, second pad is formed with N-type epitaxy layer by the second strip metal level and the second cylindrical metal layer and is electrically connected.So, the present invention adopts the groove of array arrangement, and form electrical connection by three-layer metal structure (the first and second pads, the first and second strip metal layers, the first and second cylindrical metal layers), compared with prior art, the groove area of array arrangement is less, the area of the epitaxial loayer luminous zone shared by it can be reduced, thus improve the area of flip LED chips luminous zone, and then improve luminosity.
Accompanying drawing explanation
With reference to accompanying drawing, clearly the present invention can be understood according to detailed description below.For the sake of clarity, in figure, the relative thickness of each layer and the relative size of given zone are not drawn in proportion.In the accompanying drawings:
Figure 1A is the schematic top plan view of epitaxial wafer in one embodiment of the invention;
Figure 1B is the generalized section in the AA ' direction along Figure 1A;
Fig. 2 A is the schematic top plan view after forming barrier layer in one embodiment of the invention;
Fig. 2 B is the generalized section in the AA ' direction along Fig. 2 A;
Fig. 3 A is the schematic top plan view after forming groove in one embodiment of the invention;
Fig. 3 B is the generalized section in the AA ' direction along Fig. 3 A;
Fig. 4 A is the schematic top plan view after forming contact layer in one embodiment of the invention;
Fig. 4 B is the generalized section in the AA ' direction along Fig. 4 A;
Fig. 5 A is the schematic top plan view after forming the first cylindrical metal layer and the second cylindrical metal layer in one embodiment of the invention;
Fig. 5 B is the generalized section in the AA ' direction along Fig. 5 A;
Fig. 6 A is the schematic top plan view after forming insulative reflective layer in one embodiment of the invention;
Fig. 6 B is the generalized section in the AA ' direction along Fig. 6 A;
Fig. 7 A is the schematic top plan view after forming the first strip metal level and the second strip metal level in one embodiment of the invention;
Fig. 7 B is the generalized section in the AA ' direction along Fig. 7 A;
Fig. 8 A is the schematic top plan view after forming insulating barrier in one embodiment of the invention;
Fig. 8 B is the generalized section in the AA ' direction along Fig. 8 A;
Fig. 9 A is the schematic top plan view after forming the first pad and the second pad in one embodiment of the invention;
Fig. 9 B is the generalized section in the AA ' direction along Fig. 9 A;
Fig. 9 C is the schematic top plan view of the first pad and the second pad in one embodiment of the invention;
Figure 10 A is the generalized section of flip-chip substrate in one embodiment of the invention;
Figure 10 B be in one embodiment of the invention flip LED chips complete after generalized section;
Figure 11 is the schematic flow sheet of flip LED chips manufacture method in one embodiment of the invention.
Embodiment
Below in conjunction with the drawings and specific embodiments, flip LED chips that the present invention proposes and preparation method thereof is described in further detail.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that, accompanying drawing all adopts the form that simplifies very much and all uses non-ratio accurately, only in order to object that is convenient, the aid illustration embodiment of the present invention lucidly.
Shown in composition graphs 1 to Figure 10 B, a kind of flip LED chips of the present invention comprises:
Substrate 11;
Be formed at the epitaxial loayer 12 on described substrate 11, described epitaxial loayer 12 comprises the N-type epitaxy layer 121 be formed at successively on described substrate 11, active layer 122 and P type epitaxial loayer 123;
To be formed in described epitaxial loayer 12 and to expose the groove 2 of the array arrangement of described N-type epitaxy layer 121;
Be formed at the contact layer 4 on described P type epitaxial loayer 123, the position of the corresponding described groove 2 of described contact layer 4 is provided with contact layer opening;
The the second cylindrical metal layer 52 being formed at the some first cylindrical metal layers 51 on described contact layer 4 and being formed in each groove 2;
Be formed at the insulative reflective layer 6 on described P type epitaxial loayer 123, contact layer 4, first cylindrical metal layer 51, second cylindrical metal layer 52 and in described groove 2, described insulative reflective layer 6 is provided with the first insulative reflective layer opening exposing described first cylindrical metal layer 51 and the second insulative reflective layer opening exposing described second cylindrical metal layer 52;
Be formed at some the first strip metal level 71 and the second strip metal levels 72 be intervally arranged on described insulative reflective layer 6;
Be formed at the insulating barrier 8 on described insulative reflective layer 6, first strip metal level 71 and the second strip metal level 72, described insulating barrier 8 is provided with the first insulating layer openings exposing described first strip metal level 71 subregion and the second insulating layer openings exposing described second strip metal level 72 subregion;
Be formed at the first pad 91 and the second pad 92 on described insulating barrier 8, described first pad 91 to be formed with described P type epitaxial loayer 123 by described first strip metal level 71 and the first cylindrical metal layer 51 and is electrically connected, and described second pad 92 to be formed with described N-type epitaxy layer 121 by described second strip metal level 72 and the second cylindrical metal layer 52 and is electrically connected; And
Flip-chip substrate 20, described flip-chip substrate 20 comprises the first electrically-conductive backing plate 201, second electrically-conductive backing plate 202 and isolates fixed head 203 in order to the insulation of insulation described first electrically-conductive backing plate 201 of isolation and the second electrically-conductive backing plate 202, described first electrically-conductive backing plate 201 is formed with described first pad 91 and is electrically connected, and described second electrically-conductive backing plate 202 is formed with described second pad 92 and is electrically connected.
Described substrate 11 can be the compound substrate of Sapphire Substrate, silicon carbide substrates, silicon substrate, gallium nitride substrate and two or more material composition.The material of contact layer 4 can be one or more combinations in ITO, Ni, Ni Ag, Ni Au.
Described insulative reflective layer 6 is preferably DBR reflector; described DBR reflector can be at least two kinds in the oxide materials such as SiO, SiO2, TiO2, Ti3O5; formed according to λ/4n thickness alternating growth; growth cycle is 3-50; adopt DBR to do reflector and eliminate the loaded down with trivial details processing step such as passivation layer, barrier layer, protective layer, while solving the technical barrier of chip manufacturing end, reduce the production cost of LED.Certainly, in other embodiments of the present invention, described insulative reflective layer also can be combined by metallic reflector and insulating medium layer, and the material of described metallic reflector is silver, and the material of described insulating medium layer is at least one in silicon dioxide, silicon nitride or silicon oxynitride.
Described first cylindrical metal layer 51, second cylindrical metal layer 52, first strip metal level 71, second strip metal level 72, first pad 91 and the second pad 92 can by Cr, Ti, Al, Ni, Au, Ag, Cu, Sn at least bi-material combine.
Wherein, described first strip metal level 71 and all rectangular strip of the second strip metal level 72, described first insulating layer openings and the second insulating layer openings are rectangular strip opening.Described first strip metal level 71 is electrically connected with all first cylindrical metal layers 51 in same row, and described second strip metal level 72 is electrically connected with all second cylindrical metal layers 52 in same row; Or described first strip metal level 71 is electrically connected with all first cylindrical metal layers 51 in same a line, described second strip metal level 72 is electrically connected with all second cylindrical metal layers 52 in same a line.Described first insulating layer openings and the second insulating layer openings are in staggered distribution along the length direction of the first strip metal level 71 and the second strip metal level 72, that is, the two is not namely on a same row also on same row.Described first pad 91 and all rectangular sheet of the second pad 92, the length direction along described first strip metal level 71 and the second strip metal level 72 arranges.
In preferred embodiment, described P type epitaxial loayer 123 is formed with barrier layer 3, described first cylindrical metal layer 51 is formed on the contact layer 4 above described barrier layer 3, the material on described barrier layer 3 is such as SiO2, it is formed by evaporation, sputtering, PECVD or LPCVD technique, and described barrier layer 3 array arrangement is on described P type epitaxial loayer 123.The contact-making surface of described flip-chip substrate 20 and described first pad 91 and the second pad 92 is formed with adhesive layer (not shown), and the material of described adhesive layer is Au or Sn.
The present invention also provides a kind of manufacture method of above-mentioned flip LED chips, as shown in figure 11, comprises the steps:
S1: provide a substrate, described substrate is formed with epitaxial loayer, and described epitaxial loayer comprises the N-type epitaxy layer be formed at successively on described substrate, active layer and P type epitaxial loayer;
S2: the groove forming the described N-type epitaxy layer of some exposures in described epitaxial loayer;
S3: form contact layer on described P type epitaxial loayer, the position of the corresponding described groove of described contact layer is provided with contact layer opening;
S4: form some first cylindrical metal layers on described contact layer, and form the second cylindrical metal layer in each groove;
S5: on described P type epitaxial loayer, contact layer, the first cylindrical metal layer, the second cylindrical metal layer and form insulative reflective layer in described groove, described insulative reflective layer is provided with the first insulative reflective layer opening exposing described first cylindrical metal layer and the second insulative reflective layer opening exposing described second cylindrical metal layer;
S6: form some the first strip metal levels of being intervally arranged and the second strip metal level on described insulative reflective layer;
S7: form insulating barrier on described insulative reflective layer, the first strip metal level and the second strip metal level, described insulating barrier is provided with the first insulating layer openings exposing described first strip metal layer part region and the second insulating layer openings exposing described second strip metal layer part region;
S8: form the first pad and the second pad on described insulating barrier, described first pad to be formed with described P type epitaxial loayer by described first strip metal level and the first cylindrical metal layer and is electrically connected, and described second pad to be formed with described N-type epitaxy layer by described second strip metal level and the second cylindrical metal layer and is electrically connected.
Flip LED chips manufacture method provided by the present invention is illustrated in greater detail below in conjunction with Figure 1A to Figure 10 B.It should be noted that, accompanying drawing all adopts the form that simplifies very much and all uses non-ratio accurately, only in order to object that is convenient, the aid illustration embodiment of the present invention lucidly.
First, as shown in Figure 1, as shown in FIG. 1A and 1B, improve an epitaxial wafer 1, described epitaxial wafer 1 comprises substrate 11 and is formed at the epitaxial loayer 12 on described substrate 11.Described substrate 11 can be the compound substrate of Sapphire Substrate, silicon carbide substrates, silicon substrate, gallium nitride substrate or two or more material composition.Described epitaxial loayer 12 comprises the N-type epitaxy layer 121 be formed at successively on described substrate 11, active layer 122 and P type epitaxial loayer 123.Other known retes can also be formed on described substrate 11 before forming described N-type epitaxy layer 121.Wherein, described epitaxial loayer 12 comprising the presumptive area one of array arrangement and the presumptive area two of array arrangement, staggers arrangement in described presumptive area one and described presumptive area two interval.
Then, as shown in Figure 2 A and 2 B, the presumptive area one of described P type epitaxial loayer 123 forms barrier layer 3, the material on described barrier layer 3 is such as SiO2, it is formed by evaporation, sputtering, PECVD or LPCVD technique, and described barrier layer 3 array arrangement is on P type epitaxial loayer 123.
Then, as shown in Figure 3 A and Figure 3 B, in the presumptive area two of described epitaxial loayer 12, groove 2 is formed by lithographic etch process, described groove 2 exposes described N-type epitaxy layer 121, in the present embodiment, the degree of depth of described groove 2 is greater than the summation of described P type epitaxial loayer 123 and described active layer 122 thickness and is less than the thickness of described epitaxial loayer 12, namely, P type epitaxial loayer 123 in groove 2 and active layer 122 are removed completely, and N-type epitaxy layer 121 is removed a part.Wherein, stagger and arrange in described barrier layer 3 and described groove 2 interval, namely, described barrier layer 3 and groove 2 not on the same row of same a line, be row along first direction X in Fig. 3 A, along second direction Y for enumerating example, barrier layer 3 arranges for the five-element four, groove 2 arranges for four lines four, between two row barrier layers 3, a line groove 2 is set, and, between two row barrier layers 3, a row groove 2 is set equally.Be understandable that, quantity and the arrangement mode on described groove 2 and barrier layer 3 are not limited thereto, and arrange as long as stagger in interval.
Then, as shown in Figure 4 A and 4 B shown in FIG., on described P type epitaxial loayer 123, contact layer 4 is formed by techniques such as evaporation, sputtering or sprayings, described contact layer 4 is provided with contact layer opening in the position of the described groove 2 of correspondence, described contact layer opening exposes described groove 2 completely, the material of described contact layer 4 be ITO, Ni, Ni Ag, Ni one or more combinations in Au.
Then, as fig. 5 a and fig. 5b, by techniques such as evaporation, sputtering or sprayings, in described presumptive area one (namely above described barrier layer 3) contact layer 4 on form the first cylindrical metal layer 51, and in described groove 2, form the second cylindrical metal layer 52, described first cylindrical metal layer 51 and the second cylindrical metal layer 52 by Cr, Ti, Al, Ni, Au, Ag, Cu, Sn at least bi-material combine.
Then, as shown in Figure 6 A and 6 B, on described P type epitaxial loayer 123, on contact layer 4, in groove 2, on the first cylindrical metal layer 51, on the second cylindrical metal layer 52, insulative reflective layer 6 is formed by techniques such as evaporation, sputtering or sprayings, described insulative reflective layer 6 is preferably DBR reflector, described DBR reflector can be at least two kinds in the oxide materials such as SiO, SiO2, TiO2, Ti3O5, being formed according to λ/4n thickness alternating growth, wherein, growth cycle is 3-50.Or described insulative reflective layer 6 also can be combined by metallic reflector and insulating medium layer, the material of described metallic reflector is silver, and the material of described insulating medium layer is at least one in silicon dioxide, silicon nitride or silicon oxynitride.The second insulative reflective layer opening of the first insulative reflective layer opening exposing described first cylindrical metal layer 51 and the subregion exposing described second cylindrical metal layer 52 is provided with, so that follow-up formation electrical connection in described insulative reflective layer 6.For the ease of observing, the first cylindrical metal layer 51 that the first insulative reflective layer opening and the second insulative reflective layer opening come out and the filling pattern of the second cylindrical metal layer 52 are removed, and only replace with blank pattern.
Then, as shown in figures 7 a and 7b, by evaporation sputtering or the technique such as spraying, insulative reflective layer 6 is formed and is somely spaced the first strip metal level 71 and the second strip metal level 72.Described first strip metal level 71 and the second strip metal level 72 by Cr, Ti, Al, Ni, Au, Ag, Cu, Sn at least bi-material combine.
In the present embodiment, first strip metal level 71 and the second strip metal level 72 are rectangular strip, described first strip metal level 71 is electrically connected with all first cylindrical metal layers 51 in same row, and described second strip metal level 72 is electrically connected with all second cylindrical metal layers 52 in same row.Be understandable that, above-mentioned be with along first direction X in Fig. 7 A for row, along second direction Y for enumerating example, the length direction of described first strip metal level 71 and the second strip metal level 72 extends along second direction Y, in other embodiments, the length direction of described first strip metal level 71 and the second strip metal level 72 also can be extend along first direction X, so, described first strip metal level 71 is electrically connected with all first cylindrical metal layers 51 in same a line, described second strip metal level 72 is electrically connected with all second cylindrical metal layers 52 in same a line.For the ease of observing, Fig. 7 A has only schematically shown out the filling pattern of the first strip metal level 71 and the second strip metal level 72, and the filling pattern of insulative reflective layer 6 has been removed, and only replaces with blank pattern.
Then, as shown in Figure 8 A and 8 B, by techniques such as evaporation, sputtering, PECVD or LPCVD, described insulative reflective layer 6 and described first strip metal level 71 and described second strip metal level 72 form insulating barrier 8, and described insulating barrier 8 is provided with the first insulating layer openings exposing described first strip metal level 71 subregion and the second insulating layer openings exposing described second strip metal level 72 subregion.Described first insulating layer openings and the second insulating layer openings are in staggered distribution along the length direction of the first strip metal level 71 and described second strip metal level 72, that is, the two is not namely on a same row also on same row.In the present embodiment, each described first strip metal level 71 and the second strip metal level 72 include Part I, mid portion and the Part II of arranging successively along its length, the mid portion of described first strip metal level 71 and the second strip metal level 72 is covered by insulating barrier 8 completely, described first insulating layer openings exposes the Part I of all first strip metal levels 71, described second insulating layer openings exposes the Part II of all second strip metal levels 72, so that follow-up formation electrical connection.
Then, as shown in fig. 9 a and fig. 9b, by evaporation sputtering or spraying coating process, described insulating barrier 8 is formed the first pad 91 and the second pad 92, described first pad 91 is formed with described first cylindrical metal layer 51 by described first strip metal level 71 and is electrically connected, and described second pad is formed with described second cylindrical metal layer by described second strip metal level and is electrically connected.Described first pad 91 and the second pad 92 by Cr, Ti, Al, Ni, Au, Ag, Cu, Sn at least bi-material combine.Described first pad 91 is formed with described first strip metal level 71 and is electrically connected, described second pad 92 is formed with described second strip metal level 72 and is electrically connected, and described first pad 91 and the second pad expose the edge separator 8 above the mid portion of described first strip metal level 71 and the second strip metal level 72.In the present embodiment, described first pad 91 and the second pad 92 are rectangular patch, and the length direction along described first strip metal level 71 and the second strip metal level 72 arranges.Fig. 9 C illustrate only the first pad 91 and the second pad 92, wherein the first pad 91 and the second pad 92 replace with blank pattern, shape and the arrangement mode of observation first pad 91 and the second pad 92 can be facilitated thus, be understandable that, above-mentioned and be not used to limit the present invention.
Then, as shown in figs. 10 a and 10b, by said structure integrally, after completing above-mentioned overall structure and making, one flip-chip substrate 20 (as shown in Figure 10 A) is provided, and by described overall structure face-down bonding on flip-chip substrate 20, finally complete the making of flip LED chips of the present invention.
As shown in Figure 10 A, described flip-chip substrate 20 comprises the first electrically-conductive backing plate 201, second electrically-conductive backing plate 202 and is arranged at the insulation isolation fixed head 203 in order to insulate isolation first electrically-conductive backing plate 201 and the second electrically-conductive backing plate 202 between the first electrically-conductive backing plate 201, second electrically-conductive backing plate 202.Described first electrically-conductive backing plate 201 is electrically connected with corresponding formation of described first pad 91, and described second electrically-conductive backing plate 202 is electrically connected with corresponding formation of described second pad 92.First pad 91 and the second pad 92 insulate and isolate and fix the first pad 91 and the second pad 92 by described insulation isolation fixed head 203.
Further, before face-down bonding, also comprise and thinning processing step is carried out to described substrate 11.Further, using the structure formed after metal function layer as an organic whole face-down bonding or before being bonded on described flip-chip substrate 20, also be included on the two contact-making surface and form adhesive layer (not shown in Figure 10 B), the material of described adhesive layer is Au or Sn.
In sum, flip LED chips of the present invention and preparation method thereof has following beneficial effect:
1, the present invention adopts the groove of array arrangement, in groove, N-type epitaxy layer is formed with the second pad by the second strip metal level and the second cylindrical metal layer and is electrically connected, compared to the groove doing a whole piece in prior art, further groove area of the present invention significantly reduces, and then decrease the area of the epitaxial loayer luminous zone shared by groove, substantially increase the luminosity of flip LED chips;
2, the present invention adopts the first pad and second pad of rectangular patch, described first pad and the second pad are arranged above and below along the length direction of the first strip metal level and the second strip metal level, almost all cover the area of chip, its fraction light that insulative reflective layer can be transmitted reflects back again, further increases the luminosity of flip LED chips;
3, the present invention can adopt DBR to make insulative reflective layer; performance is more stable; also eliminate the processing step that passivation layer, protective layer etc. are loaded down with trivial details, and the technical bottleneck of these processing steps chip manufacturing end just, while the technical barrier solving chip manufacturing end, reduce the production cost of LED.
Foregoing description is only the description to present pre-ferred embodiments, any restriction not to the scope of the invention, and any change that the those of ordinary skill in field of the present invention does according to above-mentioned disclosure, modification, all belong to the protection range of claims.
Claims (21)
1. a flip LED chips, is characterized in that, comprising:
Substrate and the epitaxial loayer be formed on described substrate, described epitaxial loayer comprises the N-type epitaxy layer be formed at successively on described substrate, active layer and P type epitaxial loayer;
To be formed in described epitaxial loayer and to expose the groove of the array arrangement of described N-type epitaxy layer;
Be formed at the contact layer on described P type epitaxial loayer, the position of the corresponding described groove of described contact layer is provided with contact layer opening;
The the second cylindrical metal layer being formed at the some first cylindrical metal layers on described contact layer and being formed in each groove;
Be formed at the insulative reflective layer on described P type epitaxial loayer, contact layer, the first cylindrical metal layer, the second cylindrical metal layer and in described groove, described insulative reflective layer is provided with the first insulative reflective layer opening exposing described first cylindrical metal layer and the second insulative reflective layer opening exposing described second cylindrical metal layer;
The first strip metal level that to be formed on described insulative reflective layer some is intervally arranged and the second strip metal level;
Be formed at the insulating barrier on described insulative reflective layer, the first strip metal level and the second strip metal level, described insulating barrier is provided with the first insulating layer openings exposing described first strip metal layer part region and the second insulating layer openings exposing described second strip metal layer part region; And
Be formed at the first pad on described insulating barrier and the second pad, described first pad to be formed with described P type epitaxial loayer by described first strip metal level and the first cylindrical metal layer and is electrically connected, and described second pad to be formed with described N-type epitaxy layer by described second strip metal level and the second cylindrical metal layer and is electrically connected.
2. flip LED chips as claimed in claim 1, is characterized in that, described first strip metal level and all rectangular strip of the second strip metal level.
3. flip LED chips as claimed in claim 1 or 2, it is characterized in that, described first strip metal level is electrically connected with the first cylindrical metal layers all in same a line, and described second strip metal level is electrically connected with the second cylindrical metal layers all in same a line; Or described first strip metal level is electrically connected with the first cylindrical metal layers all in same row, described second strip metal level is electrically connected with the second cylindrical metal layers all in same row.
4. flip LED chips as claimed in claim 1 or 2, it is characterized in that, described first insulating layer openings and all rectangular strip of the second insulating layer openings, described first insulating layer openings and the second insulating layer openings are in staggered distribution along the length direction of described first strip metal level and described second strip metal level.
5. flip LED chips as claimed in claim 1 or 2, is characterized in that, described first pad and all rectangular sheet of the second pad, and described first pad and the second pad are along the length direction arrangement of described first strip metal level and the second strip metal level.
6. flip LED chips as claimed in claim 1 or 2, it is characterized in that, also comprise the barrier layer of array arrangement on described P type epitaxial loayer, described first cylindrical metal layer is formed on the contact layer above described barrier layer, staggers and arrange in described barrier layer and described groove interval.
7. flip LED chips as claimed in claim 1 or 2, it is characterized in that, also comprise a flip-chip substrate, described flip-chip substrate comprises the first electrically-conductive backing plate, the second electrically-conductive backing plate and the insulation in order to insulation described first electrically-conductive backing plate of isolation and the second electrically-conductive backing plate and isolates fixed head, described first electrically-conductive backing plate is formed with described first pad and is electrically connected, and described second electrically-conductive backing plate is formed with described second pad and is electrically connected.
8. flip LED chips as claimed in claim 1 or 2, is characterized in that, also comprise the adhesive layer on the contact-making surface being formed at described flip-chip substrate and described first pad and the second pad.
9. flip LED chips as claimed in claim 1 or 2, it is characterized in that, described insulative reflective layer is DBR reflector; Or described insulative reflective layer is combined by metallic reflector and insulating medium layer, the material of described metallic reflector is silver, and the material of described insulating medium layer is at least one in silicon dioxide, silicon nitride or silicon oxynitride.
10. flip LED chips as claimed in claim 1 or 2, it is characterized in that, described first cylindrical metal layer, the second cylindrical metal layer, the first strip metal level, the second strip metal level, the first pad and the second pad by Cr, Ti, Al, Ni, Au, Ag, Cu, Sn at least bi-material combine.
The manufacture method of 11. 1 kinds of flip LED chips, is characterized in that, comprising:
There is provided a substrate, described substrate is formed with epitaxial loayer, described epitaxial loayer comprises the N-type epitaxy layer be formed at successively on described substrate, active layer and P type epitaxial loayer;
The groove of the array arrangement of the described N-type epitaxy layer of some exposures is formed in described epitaxial loayer;
Described P type epitaxial loayer forms contact layer, and the position of the corresponding described groove of described contact layer is provided with contact layer opening;
Described contact layer is formed some first cylindrical metal layers, and in each groove, forms the second cylindrical metal layer;
On described P type epitaxial loayer, contact layer, the first cylindrical metal layer, the second cylindrical metal layer and form insulative reflective layer in described groove, described insulative reflective layer is provided with the first insulative reflective layer opening exposing described first cylindrical metal layer and the second insulative reflective layer opening exposing described second cylindrical metal layer;
Described insulative reflective layer is formed some the first strip metal levels of being intervally arranged and the second strip metal level;
Described insulative reflective layer, the first strip metal level and the second strip metal level form insulating barrier, and described insulating barrier is provided with the first insulating layer openings exposing described first strip metal layer part region and the second insulating layer openings exposing described second strip metal layer part region; And
Described insulating barrier is formed the first pad and the second pad, described first pad to be formed with described P type epitaxial loayer by described first strip metal level and the first cylindrical metal layer and is electrically connected, and described second pad to be formed with described N-type epitaxy layer by described second strip metal level and the second cylindrical metal layer and is electrically connected.
The manufacture method of 12. flip LED chips as claimed in claim 11, is characterized in that, described first strip metal level and all rectangular strip of the second strip metal level.
The manufacture method of 13. flip LED chips as described in claim 11 or 12, it is characterized in that, described first strip metal level is electrically connected with the first cylindrical metal layers all in same a line, and described second strip metal level is electrically connected with the second cylindrical metal layers all in same a line; Or described first strip metal level is electrically connected with the first cylindrical metal layers all in same row, described second strip metal level is electrically connected with the second cylindrical metal layers all in same row.
The manufacture method of 14. flip LED chips as described in claim 11 or 12, it is characterized in that, described first insulating layer openings and all rectangular strip of the second insulating layer openings, described first insulating layer openings and the second insulating layer openings are in staggered distribution along the length direction of described first strip metal level and described second strip metal level.
The manufacture method of 15. flip LED chips as described in claim 11 or 12, it is characterized in that, described first pad and all rectangular sheet of the second pad, described first pad and the second pad are along the length direction arrangement of described first strip metal level and the second strip metal level.
The manufacture method of 16. flip LED chips as described in claim 11 or 12, before described P type epitaxial loayer forms contact layer, also be included in the barrier layer described P type epitaxial loayer being formed array arrangement, described first cylindrical metal layer is formed on the contact layer above described barrier layer, staggers and arrange in described barrier layer and described groove interval.
The manufacture method of 17. flip LED chips as described in claim 11 or 12, after described insulating barrier is formed the first pad and the second pad, also comprise: a flip-chip substrate is provided, described flip-chip substrate comprises the first electrically-conductive backing plate, the second electrically-conductive backing plate and the insulation in order to insulation described first electrically-conductive backing plate of isolation and the second electrically-conductive backing plate and isolates fixed head, described first electrically-conductive backing plate is formed with described first pad be electrically connected, and described second electrically-conductive backing plate is formed with described second pad be electrically connected.
The manufacture method of 18. flip LED chips as described in claim 11 or 12, after described insulating barrier is formed the first pad and the second pad, the contact-making surface being also included in described flip-chip substrate and described first pad and the second pad forms adhesive layer.
The manufacture method of 19. flip LED chips as described in claim 11 or 12, after described insulating barrier is formed the first pad and the second pad, also comprises and carries out thinning to described substrate.
The manufacture method of 20. flip LED chips as described in claim 11 or 12, described insulative reflective layer is DBR reflector; Or described insulative reflective layer is combined by metallic reflector and insulating medium layer, the material of described metallic reflector is silver, and the material of described insulating medium layer is at least one in silicon dioxide, silicon nitride or silicon oxynitride.
The manufacture method of 21. flip LED chips as described in claim 11 or 12, described first cylindrical metal layer, the second cylindrical metal layer, the first strip metal level, the second strip metal level, the first pad and the second pad by Cr, Ti, Al, Ni, Au, Ag, Cu, Sn at least bi-material combine.
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