CN204558513U - Flip LED chips - Google Patents
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- CN204558513U CN204558513U CN201520305865.9U CN201520305865U CN204558513U CN 204558513 U CN204558513 U CN 204558513U CN 201520305865 U CN201520305865 U CN 201520305865U CN 204558513 U CN204558513 U CN 204558513U
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Abstract
The utility model provides a kind of flip LED chips.Described flip LED chips comprises substrat structure, epitaxial loayer, contact layer, the first connection electrode, the second connection electrode, insulative reflective layer, the first pad and the second pad.The substrat structure of described flip LED chips comprises the support substrates, the lattice matching layers that are formed successively and has the connection dielectric layer of column structure of periodic arrangement, the described connection dielectric layer with the column structure of periodic arrangement exposes the described lattice matching layers of part, and the crystal structure of described lattice matching layers is identical with the crystal structure of described n type semiconductor layer.The utility model is conducive to the internal quantum efficiency and the external quantum efficiency that improve flip LED chips.
Description
Technical field
The utility model belongs to semiconductor optoelectronic chip manufacturing field, particularly a kind of flip LED chips.
Background technology
GaN base LED is since early 1990s commercialization, and through the development of twenties years, its structure was tending towards ripe and perfect, can meet the demand of people's present stage to decorative lamp; But will replace conventional light source completely and enter lighting field, especially high-end lighting field, the raising of luminosity is but the endless pursuit of LED industry researcher.In recent years, in raising LED luminosity, most active technology is undoubtedly patterned substrate technology, patterned substrate technology does not improve the crystal mass of LED extension by means of only reducing lattice defect (or lattice is adaptive), thus substantially increases its internal quantum efficiency; And improve LED chip light extraction efficiency (improve the external quantum efficiency of LED chip in other words) by increasing the scattering at interface (interface of epitaxial loayer and substrate) place or diffuse reflection effect.Since 2010, no matter be that the dry method patterned substrate technology of cone structure or the wet method pattern substrate technology of Pyramid are obtained for development at full speed, its technique is very ripe, and instead of flat substrate completely in 2012, become the main flow substrate of LED chip, make the crystal structure of LED and luminosity be obtained for revolutionary raising; Can partly replace conventional light source and enter association area, such as, show field, low side lighting field etc.
In order to tackle the challenge of LED high brightness, enter high-end lighting field, the researcher of LED industry proposes the structures such as high voltage LED chip, vertical LED chip and flip LED chips.
High voltage LED chip structure is generally after epitaxial loayer is formed, forms isolation channel by lithographic etch process, then in isolation channel fill insulant, finally on the epitaxial loayer of each insulated separation, make electrode and form cascaded structure; Although this structure can improve the luminosity of LED, but the technical process of formation isolation channel, fill insulant considerably increases the manufacturing cost of chip, moreover, also reduce the reliability of LED chip to a certain extent, the deep etching such as caused because existing etching homogeneity does not reach requirement is unclean, finally can cause electric leakage, reduce the breakdown characteristics etc. of LED chip.
Although vertical LED chip structure does not need etching N district material, reduce a part of production cost of LED to a certain extent, and be suitable for the injection of big current, the luminosity of LED chip can be improved further, but, the same with high-voltage chip, the LED of vertical stratification also needs to form isolation channel, this substantially increases again the production cost of LED, moreover, the chip of vertical stratification also needs to peel off growth substrates, and this improves again the production cost of LED chip again, reduces yield and the reliability of LED chip.
Flip LED chips structure is connected to by formal dress flip-chip on the good substrate of an electrical and thermal conductivity performance, make to generate heat relatively more concentrated light emitting epitaxial layer closer to the hot dirt of heat radiation, most of heat is derived by substrate, instead of derive from the sapphire growth substrate that heat radiation is bad, this alleviates the heat dissipation problem of LED chip to a certain extent, improves the reliability of LED chip; Further, when LED chip area is determined, compared with the LED chip of other structure, the light-emitting area of the LED chip of inverted structure is larger, so having more advantage when the challenge of high-end lighting field high brightness demand; But flip LED chips structure is in the bright dipping of N face, because sapphire refractive index is lower than the refractive index of gallium nitride, so the light that epitaxial loayer shoots out can reflect on sapphire and substrate interface, more light is caused not emit, especially the patterned substrate being applied at present main flow in LED chip structure has again scattering and diffuse reflection effect, more easily cause more light not emit, decrease light extraction efficiency; If but not adopting patterned substrate technology, the internal quantum efficiency of LED chip just can not give full play to.
Utility model content
The utility model provides a kind of flip LED chips for the problems referred to above, the crystal mass (i.e. internal quantum efficiency) of flip LED chips can be improved, the reflection of the light from epitaxial loayer directive substrate can be reduced again, increase its transmission, improve the light extraction efficiency (i.e. external quantum efficiency) of flip LED chips.
For solving the problems of the technologies described above, the utility model provides a kind of flip LED chips, comprising:
Substrat structure, described substrat structure comprises the support substrates, the lattice matching layers that are formed successively and has the connection dielectric layer of column structure of periodic arrangement, described in there is the column structure of periodic arrangement connection dielectric layer expose the described lattice matching layers of part;
Epitaxial loayer, described epitaxial loayer comprises the n type semiconductor layer, active layer and the p type semiconductor layer that are formed successively, described n type semiconductor layer has the connection dielectric layer of the column structure of periodic arrangement and described lattice matching layers described in covering, be formed with the groove that at least one exposes described n type semiconductor layer in described epitaxial loayer, the crystal structure of described lattice matching layers is identical with the crystal structure of described n type semiconductor layer;
Contact layer, is formed on described p type semiconductor layer, is formed with the contact layer perforate exposing described groove in described contact layer;
First is communicated with electrode is communicated with electrode with second, and described first is communicated with electrode is positioned on the n type semiconductor layer of described groove, and described second is communicated with electrode is positioned on described contact layer;
Insulative reflective layer, is formed on described contact layer, has the second insulative reflective layer perforate exposing the described first the first insulative reflective layer perforate being communicated with electrode and be communicated with electrode with exposure described second;
First pad and the second pad, be formed on described insulative reflective layer, described first pad is communicated with electrode by the first insulative reflective layer perforate and is formed and be electrically connected with described first, described second pad passes through the second insulative reflective layer perforate and is communicated with electrode with described second and formed and be electrically connected.
Further, in described flip LED chips, described n type semiconductor layer is the gallium nitride film mixing silicon, and described lattice matching layers is gallium nitride film or aluminium nitride film.Described support substrates is surperficial smooth Sapphire Substrate.The described connection dielectric layer with the column structure of periodic arrangement is silicon dioxide, silicon nitride or silicon oxynitride film.
Further, in described flip LED chips, described column structure is column cavity, by lattice matching layers described in the expose portion of described column cavity.
Further, in described flip LED chips, described column structure is cylindrical cavities, elliptical cylinder-shape cavity or polygon prism shape cavity.Further, described column structure is hexa-prism cavity.
Further, in described flip LED chips, described column structure is columnar projections, by lattice matching layers described in the space expose portion between described columnar projections.
Further, in described flip LED chips, described column structure is cylindrical protrusions, elliptical cylinder-shape is protruding or polygon prism shape is protruding.Further, described column structure is that hexa-prism is protruding.
Further, in described flip LED chips, described insulative reflective layer is DBR reflector; Or described insulative reflective layer is combined by metallic reflector and insulating medium layer, the material of described metallic reflector is silver, and the material of described insulating medium layer is at least one in silicon dioxide, silicon nitride or silicon oxynitride.
In the flip LED chips that the utility model provides, the connection dielectric layer be positioned on lattice matching layers has the column structure of periodic arrangement, because connection dielectric layer is not flat surfaces, be conducive to improving the crystal mass being formed at the epitaxial loayer be communicated with on dielectric layer, and then improve the internal quantum efficiency of flip LED chips; Further, in the surface of support substrates, can not there is light scattering or diffuse reflection in the lateral vertical of described column structure, the reflection of the light from epitaxial loayer directive support substrates can be reduced, increase its transmission, improve the light extraction efficiency of flip LED chips, namely improve the external quantum efficiency of flip LED chips; In addition, the crystal structure of described lattice matching layers is identical with the crystal structure of described n type semiconductor layer, can obtain preferably Lattice Matching effect, reduces dislocation defects, improves the internal quantum efficiency of flip LED chips further.
In addition, in the flip LED chips that the utility model provides, first pad is formed with n type semiconductor layer be electrically connected by the first insulative reflective layer perforate, the first connection electrode, second pad is communicated with electrode by the second insulative reflective layer perforate, second, contact layer is formed with p type semiconductor layer and is electrically connected, contact layer has good current expansion effect, after adding voltage between first pad and the second pad, the uniformity of luminance of LED chip can be ensured.
In addition, after the flip LED chips luminescence that the utility model provides, there is the substrat structure direction that higher reflexive insulative reflective layer can ensure more light directive LED chip, can further improve luminous efficiency.
Accompanying drawing explanation
Fig. 1 is the vertical view after the utility model embodiment one forms epitaxial loayer;
Fig. 2 is the generalized section in the AA ' direction along Fig. 1;
Fig. 3 is the generalized section in the BB ' direction along Fig. 1;
Fig. 4 is the vertical view after the utility model embodiment one forms groove;
Fig. 5 is the generalized section in the AA ' direction along Fig. 4;
Fig. 6 is the generalized section in the BB ' direction along Fig. 4;
Fig. 7 is the vertical view after the utility model embodiment one forms contact layer;
Fig. 8 is the generalized section in the AA ' direction along Fig. 7;
Fig. 9 is the generalized section in the BB ' direction along Fig. 7;
Figure 10 is that the utility model embodiment one forms the first connection electrode and is communicated with the vertical view after electrode with second;
Figure 11 is the generalized section in the AA ' direction along Figure 10;
Figure 12 is the generalized section in the BB ' direction along Figure 10;
Figure 13 is the vertical view after the utility model embodiment one forms insulative reflective layer;
Figure 14 is the generalized section in the AA ' direction along Figure 13;
Figure 15 is the generalized section in the BB ' direction along Figure 13;
Figure 16 is the vertical view after the utility model embodiment one forms the first pad and the second pad;
Figure 17 is the generalized section in the AA ' direction along Figure 16;
Figure 18 is the generalized section in the BB ' direction along Figure 16;
Figure 19 is the substrat structure of the flip LED chips of the utility model embodiment one and the generalized section of epitaxial loayer partial enlargement;
Figure 20 is the vertical view of the connection dielectric layer partial enlargement of the utility model embodiment one;
Figure 21 is the substrat structure of the flip LED chips of the utility model embodiment two and the generalized section of epitaxial loayer partial enlargement;
Figure 22 is the vertical view of the connection dielectric layer partial enlargement of the utility model embodiment two;
Figure 23 is the vertical view of the connection dielectric layer partial enlargement of the utility model embodiment three;
Figure 24 is the vertical view of the connection dielectric layer partial enlargement of the utility model embodiment four.
Embodiment
Below in conjunction with the drawings and specific embodiments, the flip LED chips that the utility model proposes is described in further detail.According to the following describes and claims, advantage of the present utility model and feature will be clearer.It should be noted that, accompanying drawing all adopts the form that simplifies very much and all uses non-ratio accurately, only in order to object that is convenient, aid illustration the utility model embodiment lucidly.
Embodiment one
As shown in Fig. 1 ~ 20, described flip LED chips comprises: substrat structure 100, epitaxial loayer 110, contact layer 120, and first is communicated with electrode 131 is communicated with electrode 132 with second, insulative reflective layer 140, the first pad 151 and the second pad 152.
Described substrat structure 100 comprises the support substrates 101, lattice matching layers 102, the connection dielectric layer 103 with the column structure 103a of periodic arrangement, the described lattice matching layers 102 that are formed successively and is formed in described support substrates 101, and described connection dielectric layer 103 to be formed on described lattice matching layers 102 and to expose the described lattice matching layers 102 of part.
Described epitaxial loayer 110 comprises the n type semiconductor layer 111 formed successively, active layer 112 and p type semiconductor layer 113, described n type semiconductor layer 111 covers described connection dielectric layer 103 and described lattice matching layers 102, the crystal structure of described lattice matching layers 102 is identical with the crystal structure of described n type semiconductor layer 111, described epitaxial loayer 110 is provided with at least one groove 110a, the degree of depth of described groove 110a is greater than the summation of described p type semiconductor layer 113 and described active layer 112 thickness and is less than the thickness of described epitaxial loayer 110, namely the p type semiconductor layer 113 in described groove 110a and active layer 112 are removed completely, and n type semiconductor layer 111 is removed a part, the shape of the utility model to described groove 110a does not limit.
Described contact layer 120 is formed on described p type semiconductor layer 113, is formed with the contact layer perforate 120a exposing described groove 110a in described contact layer 120.In the present embodiment, described contact layer perforate 120a is strip, and its width is greater than the width of described groove 110a.
Described first is communicated with electrode 131 is positioned on the n type semiconductor layer 111 of described groove 110a, and described second is communicated with electrode 132 is positioned on described contact layer 120, and described first connection electrode 131 is communicated with electrode 132 with second and is intervally arranged.
Described insulative reflective layer 140 has the first insulative reflective layer perforate 141 that exposure first is communicated with the presumptive area of electrode 131 and exposes the second insulative reflective layer perforate 142 that second is communicated with the presumptive area of electrode 132.Described first insulative reflective layer perforate 141 is communicated with electrode 131 with the second insulative reflective layer perforate 142 along described first and is in staggered distribution with the second length direction being communicated with electrode 132, namely described first insulative reflective layer perforate 141 and the second insulative reflective layer perforate 142 neither in same level direction also not at same vertical direction.In the present embodiment, described first insulative reflective layer perforate 141 and the second insulative reflective layer perforate 142 are strip.Described insulative reflective layer 140 can be DBR.Described insulative reflective layer 140 can also be combined by metallic reflector and insulating medium layer, and the material of described metallic reflector is silver, and the material of described insulating medium layer is at least one in silicon dioxide, silicon nitride or silicon oxynitride.When described insulative reflective layer 140 is DBR, the material of described contact layer 120 can be ITO.When described insulative reflective layer 140 be silver metal reflector and insulating medium layer combine time, the material of described contact layer 120 can be Ni.
Described first pad 151 and the second pad 152 are formed on described insulative reflective layer 140, described first pad 151 is communicated with electrode 131 by the first insulative reflective layer perforate 141 and is formed and be electrically connected with described first, described second pad 152 passes through the second insulative reflective layer perforate 142 and is communicated with electrode 132 with described second and formed and be electrically connected.In the present embodiment, described first pad 151 is communicated with electrode 131 with the second pad 152 along described first and is arranged above and below with the second length direction being communicated with electrode 132, and, described first pad 151 covers all first insulative reflective layer perforates 141, and described second pad 152 covers all second insulative reflective layer perforates 142.
Further; described flip LED chips also comprises passivation protection layer (not shown); described passivation protection layer is provided with the first passivation protection layer perforate exposing described first pad 151 subregion and the first passivation protection layer perforate exposing the second pad 152 subregion, is formed with flip-chip substrate so that follow-up and be electrically connected.
Figure 19 is the substrat structure of the flip LED chips of the utility model embodiment one and the generalized section of epitaxial loayer partial enlargement, and Figure 20 is the vertical view of the connection dielectric layer partial enlargement of the utility model embodiment one.As shown in Figures 19 and 20, in the present embodiment, column structure 103a is column cavity, exposes described lattice matching layers 102 by described column cavity.Specifically, described column structure 103a is cylindrical cavities.Certainly, the column structure 103a at described support substrates 101 edge can be incomplete cylindrical cavities, the utility model to the quantity of column structure 103a and arrangement mode without restriction, can adjust accordingly according to actual Butut situation.
Described support substrates 101 is surperficial smooth Sapphire Substrate.The described material with the connection dielectric layer 103 of the column structure of periodic arrangement is silicon dioxide, silicon nitride or silicon oxynitride, and above-mentioned material is the material often adopted in LED manufacture craft, and cost is lower.
The material of described n type semiconductor layer 111 is such as mixing the gallium nitride (GaN) of silicon.Described active layer 112 is such as In
xgaN
1-xn and In
ygaN
1-ythe periodic structure at least 5 cycles that N is alternately laminated, wherein, 0≤x < 1,0≤y < 1, and x ≠ y.The material of described p type semiconductor layer 113 is such as mixing the gallium nitride (GaN) of magnesium.The crystal structure of described lattice matching layers 102 is identical with the crystal structure of described n type semiconductor layer 111, and such as described lattice matching layers 102 is gallium nitride film or aluminium nitride film, thus to obtain preferably Lattice Matching effect, reduces dislocation defects.
In the present embodiment, the thickness of described lattice matching layers 102 is 0.1 ~ 2 micron, and be preferably 0.1 ~ 1 micron, the thickness of described connection dielectric layer 103 is similarly 0.1 ~ 2 micron, is preferably 0.1 ~ 1 micron.
Accordingly, the present embodiment also provides a kind of flip LED chips manufacture method, illustrates further the flip LED chips manufacture method that the utility model proposes below in conjunction with accompanying drawing.
First, as shown in Figure 19 ~ 20, one support substrates 101 is provided, described support substrates 101 forms lattice matching layers 102, described lattice matching layers 102 is formed the connection dielectric layer 103 with the column structure 103a of periodic arrangement, described connection dielectric layer 103 exposes the described lattice matching layers 102 of part, to form substrat structure 100.
Then, as shown in Figures 1 to 3, described substrat structure 100 forms epitaxial loayer 110, described epitaxial loayer 110 comprises the n type semiconductor layer 111, active layer 112 and the p type semiconductor layer 113 that are formed successively, and described n type semiconductor layer 111 covers described connection dielectric layer 103 and described lattice matching layers 102.As shown in figures 4-6, by photoetching and etching technics, in described epitaxial loayer 110, form the groove 110a that at least one exposes described n type semiconductor layer 111.
Then, as shown in figs. 7-9, described p type semiconductor layer 113 forms contact layer 120, in described contact layer 120, be formed with the contact layer perforate 120a exposing described groove 110a.
Then, as shown in Figure 10 ~ 12, form the first connection electrode 131 and be communicated with electrode 132 with second, described first is communicated with electrode 131 is positioned on the n type semiconductor layer 111 of described groove 110a, and described second is communicated with electrode 132 is positioned on described contact layer 120.
Then, as shown in Figure 13 ~ 15, contact layer 120 is formed insulative reflective layer 140, and described insulative reflective layer 140 has the first insulative reflective layer perforate 141 that exposure first is communicated with the presumptive area of electrode 131 and exposes the second insulative reflective layer perforate 142 that second is communicated with the presumptive area of electrode 132.There is the substrat structure direction that higher reflexive insulative reflective layer can ensure more light directive LED chip, can luminous efficiency be improved.
Then, as shown in Figure 16 ~ 18, form the first pad 151 and the second pad 152, described first pad 151 and the second pad 152 are formed on described insulative reflective layer 140.Described first pad 151 is communicated with electrode 131 by the first insulative reflective layer perforate 141 and is formed and be electrically connected with described first, and then is formed with n type semiconductor layer 111 and be electrically connected.Described second pad 152 is communicated with electrode 132 by the second insulative reflective layer perforate 142 and is formed and be electrically connected with described second, and then passes through contact layer 120 and formed with p type semiconductor layer 113 and be electrically connected.Contact layer 120 has good current expansion effect, after adding voltage, can improve the uniformity of luminance of LED chip between the first pad 151 and the second pad 152.
In the present embodiment, in described support substrates 101, form lattice matching layers 102 by LPCVD technique, MOCVD technique or molecular beam external pressure technology.On described lattice matching layers 102, deielectric-coating is formed by evaporation, sputtering, spraying or pecvd process, remove the deielectric-coating in presumptive area by chemical etching technique again, thus on lattice matching layers 102, form the connection dielectric layer 103 with the column structure 103a of periodic arrangement.On said structure, n type semiconductor layer 111, active layer 112 and p type semiconductor layer 113 is formed successively by MOCVD technique or molecular beam external pressure technology.
In above-mentioned flip LED chips, support substrates 101 plays a supportive role, lattice matching layers 102 can carry out Lattice Matching with the n type semiconductor layer 111 of flip LED chips better, the connection dielectric layer 103 with the column structure of periodic arrangement coordinates the lattice matching layers 102 in support substrates 101 can improve the crystal mass (i.e. internal quantum efficiency) of flip LED chips better, and the lateral vertical of column structure 103a is in the surface of support substrates 101, relative to the bevelled taper of tool or mesa-shaped figure on traditional graph substrate, light scattering or diffuse reflection can not be there is, therefore, it is possible to reduce the reflection from the light of epitaxial loayer directive support substrates 101, increase its transmission, improve the light extraction efficiency (i.e. external quantum efficiency) of flip LED chips.
Embodiment two
Figure 21 is the substrat structure of the flip LED chips of the utility model embodiment two and the generalized section of epitaxial loayer partial enlargement, and Figure 22 is the vertical view of the connection dielectric layer partial enlargement of the utility model embodiment two.
As shown in figure 21 and figure, the difference of the present embodiment and embodiment one is, column structure 103a is columnar projections, is communicated with dielectric layer 103 and is made up of the columnar projections of periodic arrangement, expose described lattice matching layers 102 by the space between described columnar projections.
More specifically, described column structure 103a is cylindrical protrusions.Certainly, because described support substrates 101 is circular substrate, the column structure 103a at described support substrates 101 edge can be incomplete cylindrical protrusions, the utility model to the quantity of column structure 103a and arrangement mode without restriction, can adjust accordingly according to actual Butut situation.
Embodiment three
The difference of the present embodiment and embodiment one is, described column structure 103a is that multi-edge column-shaped is protruding.Figure 23 is the vertical view of the connection dielectric layer partial enlargement of the utility model embodiment three.As shown in figure 23, the 103a of column structure described in the present embodiment is that hexagon is protruding.
Embodiment four
The difference of the present embodiment and embodiment one is, described column structure 103a is multi-edge column-shaped cavity.Figure 24 is the vertical view of the connection dielectric layer partial enlargement of the utility model embodiment four.As shown in figure 24, the 103a of column structure described in the present embodiment is hexagon cavity.Find through experiment, when described column structure 103a is hexagon cavity, the luminous efficiency of flip LED chips is particularly outstanding.
Above embodiment is respectively cylindrical protrusions or cylindrical cavities for described column structure, multi-edge column-shaped is protruding or multi-edge column-shaped is empty describes flip LED chips of the present utility model, be understandable that, described column structure is not limited to above-mentioned shape, can also be that elliptical cylinder-shape is protruding or elliptical cylinder-shape is empty, or the projection of other polygon prism shapes or cavity, also or the combination of above-mentioned shape.
In sum, flip LED chips tool of the present utility model has the following advantages:
1, the connection dielectric layer be positioned on lattice matching layers has the column structure of periodic arrangement, namely described connection dielectric layer is not flat surfaces, the crystal mass of epitaxial loayer can be improved when so forming epitaxial loayer on described connection dielectric layer, be conducive to the internal quantum efficiency improving flip LED chips; And, the lateral vertical of described column structure is in the surface of support substrates, relative to the bevelled taper of tool or mesa-shaped figure on traditional graph substrate, light scattering or diffuse reflection can not be there is, therefore, it is possible to reduce the reflection from the light of epitaxial loayer directive support substrates, increase its transmission, improve the light extraction efficiency of flip LED chips, namely improve the external quantum efficiency of flip LED chips; In addition, the crystal structure of described lattice matching layers is identical with the crystal structure of described n type semiconductor layer, can obtain preferably Lattice Matching effect, reduces dislocation defects, improves the internal quantum efficiency of flip LED chips further;
2, the first pad is formed with n type semiconductor layer be electrically connected by the first insulative reflective layer perforate, the first connection electrode, second pad is communicated with electrode by the second insulative reflective layer perforate, second, contact layer is formed with p type semiconductor layer and is electrically connected, contact layer has good current expansion effect, after adding voltage between first pad and the second pad, the uniformity of luminance of LED chip can be ensured.
3, there is the substrat structure direction that higher reflexive insulative reflective layer can ensure more light directive LED chip, can further improve luminous efficiency.
It should be noted that, in this specification, each embodiment adopts the mode of going forward one by one to describe, and what each embodiment stressed is the difference with other embodiments, between each embodiment identical similar portion mutually see.And; foregoing description is only the description to the utility model preferred embodiment; any restriction not to the utility model scope, any change that the those of ordinary skill in the utility model field does according to above-mentioned disclosure, modification, all belong to the protection range of claims.
Claims (10)
1. a flip LED chips, is characterized in that, comprising:
Substrat structure, described substrat structure comprises the support substrates, the lattice matching layers that are formed successively and has the connection dielectric layer of column structure of periodic arrangement, described in there is the column structure of periodic arrangement connection dielectric layer expose the described lattice matching layers of part;
Epitaxial loayer, described epitaxial loayer comprises the n type semiconductor layer, active layer and the p type semiconductor layer that are formed successively, described n type semiconductor layer has the connection dielectric layer of the column structure of periodic arrangement and described lattice matching layers described in covering, be formed with the groove that at least one exposes described n type semiconductor layer in described epitaxial loayer, the crystal structure of described lattice matching layers is identical with the crystal structure of described n type semiconductor layer;
Contact layer, is formed on described p type semiconductor layer, is formed with the contact layer perforate exposing described groove in described contact layer;
First is communicated with electrode is communicated with electrode with second, and described first is communicated with electrode is positioned on the n type semiconductor layer of described groove, and described second is communicated with electrode is positioned on described contact layer;
Insulative reflective layer, is formed on described contact layer, has the second insulative reflective layer perforate exposing the described first the first insulative reflective layer perforate being communicated with electrode and be communicated with electrode with exposure described second;
First pad and the second pad, be formed on described insulative reflective layer, described first pad is communicated with electrode by the first insulative reflective layer perforate and is formed and be electrically connected with described first, described second pad passes through the second insulative reflective layer perforate and is communicated with electrode with described second and formed and be electrically connected.
2. flip LED chips as claimed in claim 1, it is characterized in that, described n type semiconductor layer is the gallium nitride film mixing silicon, described lattice matching layers is gallium nitride film or aluminium nitride film, described support substrates is the smooth Sapphire Substrate in surface, described in there is the column structure of periodic arrangement connection dielectric layer be silicon dioxide, silicon nitride or silicon oxynitride film.
3. flip LED chips as claimed in claim 1 or 2, is characterized in that, described column structure is column cavity, by lattice matching layers described in the expose portion of described column cavity.
4. flip LED chips as claimed in claim 3, is characterized in that, described column structure is cylindrical cavities, elliptical cylinder-shape cavity or polygon prism shape cavity.
5. flip LED chips as claimed in claim 4, is characterized in that, described column structure is hexa-prism cavity.
6. flip LED chips as claimed in claim 1 or 2, it is characterized in that, described column structure is columnar projections, by lattice matching layers described in the space expose portion between described columnar projections.
7. flip LED chips as claimed in claim 6, is characterized in that, described column structure is cylindrical protrusions, elliptical cylinder-shape is protruding or polygon prism shape is protruding.
8. flip LED chips as claimed in claim 7, is characterized in that, described column structure is that hexa-prism is protruding.
9. flip LED chips as claimed in claim 1 or 2, it is characterized in that, described insulative reflective layer is DBR reflector.
10. flip LED chips as claimed in claim 1 or 2, it is characterized in that, described insulative reflective layer is combined by metallic reflector and insulating medium layer, and the material of described metallic reflector is silver, and the material of described insulating medium layer is the one in silicon dioxide, silicon nitride or silicon oxynitride.
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| CN201520305865.9U CN204558513U (en) | 2015-05-12 | 2015-05-12 | Flip LED chips |
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| CN201520305865.9U CN204558513U (en) | 2015-05-12 | 2015-05-12 | Flip LED chips |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104835891A (en) * | 2015-05-12 | 2015-08-12 | 杭州士兰明芯科技有限公司 | Flip led chip and manufacturing method thereof |
| CN109256446A (en) * | 2017-07-13 | 2019-01-22 | 晶元光电股份有限公司 | Light emitting element |
-
2015
- 2015-05-12 CN CN201520305865.9U patent/CN204558513U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104835891A (en) * | 2015-05-12 | 2015-08-12 | 杭州士兰明芯科技有限公司 | Flip led chip and manufacturing method thereof |
| CN109256446A (en) * | 2017-07-13 | 2019-01-22 | 晶元光电股份有限公司 | Light emitting element |
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