CN104749843B - 阵列基板及其制作方法、驱动方法及显示装置 - Google Patents

阵列基板及其制作方法、驱动方法及显示装置 Download PDF

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Publication number
CN104749843B
CN104749843B CN201510137567.8A CN201510137567A CN104749843B CN 104749843 B CN104749843 B CN 104749843B CN 201510137567 A CN201510137567 A CN 201510137567A CN 104749843 B CN104749843 B CN 104749843B
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Prior art keywords
electrode
public electrode
underlay substrate
layer
lead
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CN104749843A (zh
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魏向东
刘静
冯翔
邱云
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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Priority to CN201510137567.8A priority Critical patent/CN104749843B/zh
Priority to US14/744,265 priority patent/US9666610B2/en
Publication of CN104749843A publication Critical patent/CN104749843A/zh
Priority to US15/484,259 priority patent/US10452190B2/en
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Abstract

本发明公开一种阵列基板及其制作方法、驱动方法及显示装置,涉及显示技术领域,可以在简化阵列基板的制作工艺的同时,避免显示装置出现混色等不良现象。其中,所述阵列基板包括衬底基板以及位于衬底基板上的薄膜晶体管、像素电极和公共电极,还包括多条引线和彩色滤色层;其中,公共电极包括多个公共电极块,该公共电极块可复用作自电容电极,每条引线的一端电连接一个公共电极块,另一端电连接触控集成电路。本发明提供的阵列基板用于显示装置中。

Description

阵列基板及其制作方法、驱动方法及显示装置
技术领域
本发明涉及显示技术领域,尤其涉及一种阵列基板及其制作方法、驱动方法及显示装置。
背景技术
通常,显示装置包括触摸屏和显示面板,其中,显示面板包括阵列基板和彩膜基板,触摸屏中的触控电极可设置于阵列基板上,以减小显示装置的厚度。具体地,阵列基板上设置有薄膜晶体管、像素电极、公共电极和触控电极;彩膜基板上设置有彩色滤色层等,彩色滤色层包括多个区域,每个区域对应于阵列基板上的一个像素电极。其中,当检测触摸位置的原理为自电容原理时,触控电极包括多个同层设置且相互绝缘的自电容电极,此时,可通过检测自电容电极的电容值的变化检测触摸位置。显示面板的制作过程包括制作阵列基板、制作彩膜基板以及阵列基板和彩膜基板对盒等步骤。
本申请发明人发现,在制作阵列基板时,增加自电容电极会增加阵列基板的制作工艺,提高显示装置的生产成本;并且,阵列基板和彩膜基板对盒时,像素电极和彩色滤色层中的区域容易出现对位误差,使得显示装置出现混色等不良现象。
发明内容
本发明所要解决的技术问题在于提供一种阵列基板及其制作方法、驱动方法及显示装置,可以在简化阵列基板的制作工艺的同时,避免显示装置出现混色等不良现象。
为解决上述技术问题,本发明采用如下技术方案:
一种阵列基板,包括衬底基板以及位于所述衬底基板上的薄膜晶体管、像素电极和公共电极,还包括多条引线和彩色滤色层;其中,
所述公共电极包括多个可复用作自电容电极的公共电极块,每条所述引线的一端电连接一个所述公共电极块,另一端电连接触控集成电路。
各所述公共电极块的形状和面积均相同,每个所述公共电极块在所述衬底基板上的投影与至少一个像素在所述衬底基板上的投影重合。
所述薄膜晶体管包括依次层叠设置于所述衬底基板上的有源层、栅极绝缘层、栅极、源漏极绝缘层、源极和漏极;
所述彩色滤色层位于所述源极和漏极上;
所述像素电极位于所述彩色滤色层上;
所述阵列基板还包括位于所述像素电极上的钝化层;
所述公共电极块位于所述钝化层上。
所述引线与所述源极和漏极同层设置;
所述钝化层和所述彩色滤色层上均设置有对应于所述公共电极块的过孔,所述引线通过所述过孔与所述公共电极块电连接。
所述引线的一端位于所述公共电极块上,直接与所述公共电极块电连接。
所述阵列基板还包括位于所述衬底基板上的黑矩阵,所述引线和所述薄膜晶体管在所述衬底基板上的投影均落在所述黑矩阵在所述衬底基板上的投影内。
本发明提供的阵列基板中,由于公共电极块可复用作自电容电极,因而无需在阵列基板上制作额外的自电容电极,从而可简化阵列基板的制作工艺;并且由于像素电极和彩色滤色层同时设置在阵列基板上,没有进行对位的步骤,因而像素电极和彩色滤色层中的区域不会在对盒过程中出现对位误差,从而可在简化阵列基板的制作工艺的同时,避免显示装置出现混色的不良现象。
此外,本发明还提供了一种显示装置,所述显示装置包括如上所述的阵列基板。
此外,本发明还提供了一种阵列基板的制作方法,包括:
形成薄膜晶体管、彩色滤色层和像素电极;
形成公共电极;
形成多条引线;
其中,所述公共电极包括多个可复用作自电容电极的公共电极块,每条所述引线的一端电连接一个所述公共电极块,另一端电连接触控集成电路。
形成薄膜晶体管、彩色滤色层和像素电极的步骤包括:
在衬底基板上形成包括有源层的图形;
在形成有所述有源层的图形的所述衬底基板上形成栅极绝缘层;
在形成有所述栅极绝缘层的所述衬底基板上形成包括栅极的图形;
在形成有所述栅极的图形的所述衬底基板上形成源漏极绝缘层;
在形成有所述源漏极绝缘层的所述衬底基板上形成包括源极和漏极的图形;
在形成有所述薄膜晶体管的所述衬底基板上形成彩色滤色层;
在形成有所述彩色滤色层的所述衬底基板上形成包括像素电极的图形;
所述阵列基板的制作方法还包括:
在形成有所述像素电极的图形的所述衬底基板上形成钝化层。
所述引线与所述源极和漏极同时形成;
在形成有所述像素电极的图形的所述衬底基板上形成钝化层之后,还包括:
在所述彩色滤色层和所述钝化层上形成对应于所述公共电极块的过孔,所述引线通过所述过孔和所述公共电极块电连接。
所述形成多条引线,包括:
在形成有所述公共电极的所述衬底基板上形成包括多条引线的图形;
其中,所述引线的一端位于所述公共电极块上,直接与所述公共电极块电连接。
本发明提供的阵列基板的制作方法中,由于公共电极块可复用作自电容电极,因而无需在阵列基板上制作额外的自电容电极,从而可简化阵列基板的制作工艺;并且由于像素电极和彩色滤色层同时设置在阵列基板上,没有进行对位的步骤,因而像素电极和彩色滤色层中的区域不会在对盒过程中出现对位误差,从而可在简化阵列基板的制作工艺的同时,避免显示装置出现混色等不良现象。
此外,本发明还提供了一种如上所述的阵列基板的驱动方法,包括:
在触控时间段内,所述引线用于所述触控集成电路和所述公共电极块之间的触控信号传输;
在显示时间段内,所述引线用于向所述公共电极块传输公共电压信号。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的阵列基板的示意图;
图2为图1中区域E的示意图;
图3为图2中沿A-A’的剖面图;
图4为图1中区域F的示意图;
图5为图4中沿B-B’的剖面图;
图6为本发明实施例提供的阵列基板的制作方法流程图;
图7为本发明实施例提供的阵列基板的驱动方法流程图;
图8为本发明实施例提供的阵列基板的驱动时序示意图。
附图标记说明:
1—衬底基板; 2—薄膜晶体管; 21—有源层;
22—栅极绝缘层; 23—栅极; 24—源漏极绝缘层;
25—源极; 26—漏极; 3—像素电极;
4—公共电极; 41—公共电极块; 5—引线;
6—彩色滤色层; 7—钝化层; 8—黑矩阵;
9—缓冲层。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
实施例一
本发明实施例提供了一种阵列基板,如图1-图3所示,该阵列基板包括衬底基板1以及位于衬底基板1上的薄膜晶体管2、像素电极3和公共电极4,此外,该阵列基板还包括多条引线5和彩色滤色层6,其中,公共电极4包括多个可复用作自电容电极的公共电极块41,每条引线5的一端电连接一个公共电极块41,另一端电连接触控集成电路(图中未示出)。
由于公共电极块41可复用作触摸屏中的自电容电极,因而无需在阵列基板上制作额外的自电容电极,从而可简化阵列基板的制作工艺,并且由于像素电极3和彩色滤色层6同时设置在阵列基板上,因而像素电极3和彩色滤色层6不会在对盒过程中出现对位误差,从而可在简化阵列基板的制作工艺的同时,避免显示装置出现混色的不良现象。
其中,公共电极块41的数量可根据显示装置的尺寸以及分辨率进行设置,示例性地,如图1所示,设置有20个公共电极块41,公共电极块41呈4行5列阵列排布,每个公共电极块41的形状和面积均相同,并且,每个公共电极块41在衬底基板1上的投影与至少一个像素在衬底基板1上的投影重合。当然,各个公共电极块41的形状也可不相同,或者各个电极块41的面积也可不相同,或者各个电极块41的形状和面积均不相同。其中,像素可包括彩色滤色层6中相邻的不同颜色的区域,示例性地,彩色滤色层6可包括多个红色区域、多个绿色区域和多个蓝色区域,此时,一个像素对应于相邻的一个红色区域、一个绿色区域和一个蓝色区域。
为了便于本领域技术人员理解,下面以图2-图5所示的阵列基板为例对阵列基板的各结构进行具体说明。
请参阅图3,在衬底基板1上设有薄膜晶体管2。其中,薄膜晶体管2可为底栅型薄膜晶体管,也可为顶栅型薄膜晶体管。本发明实施例中薄膜晶体管2优选为顶栅型薄膜晶体管,如此设计,可避免在使用过程中薄膜晶体管2的阈值电压发生漂移。
更加详细地说,如图3和图5所示,薄膜晶体管2包括依次层叠设置于衬底基板1上的有源层21、栅极绝缘层22、栅极23、源漏极绝缘层24以及源极25和漏极26。其中,栅极绝缘层22和源漏极绝缘层24上均设置有对应于源极25的过孔,有源层21通过对应于源极25的过孔与源极25连接;此外,栅极绝缘层22和源漏极绝缘层24上还均设置有对应于漏极26的过孔,有源层21通过对应于漏极26的过孔与漏极26连接。
示例性地,衬底基板1可为透光性好的玻璃基板或者石英基板;有源层21可选用多晶硅、非晶硅、单晶硅或者金属氧化物半导体材料等;栅极绝缘层22和源漏极绝缘层24可选用氧化物、氮化物或者氧氮化合物,也可选用绝缘的树脂材料;栅极23、源极25和漏极26均可选用Cr、W、Ti、Ta、Mo、Al和Cu等金属中的一种金属或两种以上金属的合金。
进一步地,彩色滤色层6位于源极25和漏极26上。示例性,彩色滤色层6可包括多个红色区域、多个绿色区域和多个蓝色区域,此外,为提高显示装置的显示亮度,彩色滤色层6还可包括多个白色区域,每个区域的材质为相应颜色的感光树脂。
进一步地,像素电极3位于彩色滤色层6上。示例性地,像素电极3上可设置有狭缝,也即为具有狭缝的像素电极3,此外,像素电极3也可以为条状电极。通常,像素电极3可选用ITO、IZO等透明导电材料制作。其中,彩色滤色层6上设置有对应于像素电极3的过孔,漏极26通过该过孔与像素电极3电连接。
进一步地,阵列基板还包括位于像素电极3上的钝化层7。可使公共电极块41与像素电极3之间绝缘。通常,钝化层7可选用氧化物、氮化物或者氧氮化合物制作,也可选用绝缘的树脂材料制作。
进一步地,公共电极块41位于钝化层7上。示例性地,公共电极块41的材质可为ITO、IZO等透明导电物。
进一步地,引线5位于衬底基板1上。示例性地,引线5的位置设置包括以下两种情形:
第一种情形,如图3所示,引线5与源极25和漏极26同层设置,由于引线5与源极25和漏极26可同时形成,因而无需单独制作引线5,可简化阵列基板的制作工艺。为使引线5和公共电极块41电连接,钝化层7和彩色滤色层6上均设置有对应于公共电极块41的过孔,引线5通过该过孔与公共电极块41电连接。引线5的材质可与源极25和漏极26的材质相同,即可为Cr、W、Ti、Ta、Mo、Al和Cu等金属中的一种金属或两种以上金属的合金;当然,引线5的材质与源极25和漏极26的材质还可均为ITO、IZO等透明导电物。
第二种情形,如图5所示,引线5的一端位于公共电极块41上,直接与公共电极块41电连接。为保证引线5不会影响显示装置的显示区域的面积,引线5的材质可与公共电极块41的材质相同,即为ITO、IZO等透明导电物。
为简化阵列基板的制作工艺,本发明实施例优选引线5的位置为:引线5与源极25和漏极26同层设置。此外,引线5还可设置于阵列基板的其他位置处,仅需与公共电极块41电连接即可,示例性地,引线5的一端位于公共电极块41与钝化层7之间,直接与公共电极块41电连接,或者引线5设置于阵列基板的其他位置,引线5通过过孔与公共电极块41电连接。
进一步地,阵列基板还可包括直接位于衬底基板1上的黑矩阵8。示例性地,引线5和薄膜晶体管2在衬底基板1上的投影均落在黑矩阵8在衬底基板1上的投影内,既不会影响显示装置的开口率,又可使显示装置实现窄边框。通常,黑矩阵8可为具有很好的遮光性且不会反光的黑色树脂。
此外,阵列基板还可包括位于黑矩阵8和有源层21之间的缓冲层9,由于衬底基板1的表面含有杂质,上述缓冲层9可阻挡有源层21制作工艺中上述杂质扩散进入有源层21,从而可以避免上述杂质对薄膜晶体管2的阈值电压和漏电流等特性产生影响。
需要说明的是,上述各个结构之间的位置关系并不局限于此,只要能使得公共电极4包括多个公共电极块41,公共电极块41可复用作自电容电极,且每条引线5的一端电连接公共电极块41,另一端电连接触控集成电路即可,示例性地,也可将黑矩阵8设置于像素电极3上。此外,上述阵列基板还可以根据实际需要包括其他结构,本发明实施例对此不进行限定。
此外,本发明实施例还提供了一种显示装置,该显示装置包括以上实施例所述的阵列基板,还包括一对向基板,示例性地,对向基板为不需要设置其他结构的裸玻璃基板,经过对盒、注入液晶等工艺形成液晶显示面板,以用于后续制作显示装置。上述显示装置可为:电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、导航仪等任何具有显示功能的产品或部件。
实施例二
本发明实施例提供了一种如实施例一提供的阵列基板的制作方法,如图6所示,该制作方法包括:步骤S601、形成薄膜晶体管、彩色滤色层和像素电极;步骤S602、形成公共电极;其中,
公共电极包括多个可复用作自电容电极的公共电极块,具体制作公共电极块时,可通过沉积、溅射、涂覆等工艺形成一层透明导电层,并通过构图工艺形成包括公共电极块的图形。
步骤S603、形成多条引线。其中,每条引线的一端电连接一个公共电极块,另一端电连接触控集成电路。
由于公共电极块可复用作触摸屏中的自电容电极,因而无需在阵列基板上制作额外的自电容电极,从而可简化阵列基板的制作工序;并且由于像素电极和彩色滤色层同时设置在阵列基板上,因而像素电极和彩色滤色层不会在对盒过程中出现对位误差,从而可在简化阵列基板的制作工艺的同时,避免显示装置出现混色等不良现象。
为了便于本领域技术人员理解,以下对步骤S601,即形成薄膜晶体管、彩色滤色层和像素电极的步骤,进行详细说明。
其中,形成薄膜晶体管的步骤包括:在衬底基板上形成包括有源层的图形。示例性地,通过等离子体化学气相沉积等方法,在衬底基板上形成一层半导体层,在半导体层上涂覆光刻胶,使用具有包括有源层的图案的掩膜板遮盖涂覆有光刻胶的半导体层,经过曝光、显影等步骤后,形成包括有源层的图形。
进一步地,形成薄膜晶体管的步骤还包括:在形成了有源层的图形的衬底基板上形成栅极绝缘层。示例性地,通过等离子增强化学气相沉积、溅射或者热蒸发等方法,在形成了有源层的图形的衬底基板上,形成一层栅极绝缘层。
进一步地,形成薄膜晶体管的步骤还包括:在形成有栅极绝缘层的衬底基板上形成包括栅极的图形。示例性地,通过等离子增强化学气相沉积、溅射或者热蒸发等方法在形成了栅极绝缘层的衬底基板上,形成一层栅极金属层,在栅极金属层上涂覆光刻胶,使用具有栅极的图形的掩膜板遮盖涂覆有光刻胶的栅极金属层,经过曝光、显影、刻蚀等步骤后,形成包括栅极的图形。
进一步地,形成薄膜晶体管的步骤还包括:在形成有栅极的图形的衬底基板上形成源漏极绝缘层。示例性地,通过等离子增强化学气相沉积、溅射或者热蒸发等方法,在形成了栅极的图形的衬底基板上,形成一层源漏极绝缘层,然后,通过构图工艺使栅极绝缘层和源漏极绝缘层上均形成对应于源极的过孔,有源层通过对应于源极的过孔与源极连接;此外,还使栅极绝缘层和源漏极绝缘层上均形成对应于漏极的过孔,有源层通过对应于漏极的过孔与漏极连接。
进一步地,形成薄膜晶体管的步骤还包括:在形成有源漏极绝缘层的衬底基板上形成源极和漏极。示例性地,通过等离子增强化学气相沉积、溅射或者热蒸发等方法在形成了源漏极绝缘层的衬底基板上,形成一层源漏极金属层,在源漏极金属层上涂覆光刻胶,使用具有源极和漏极的图形的掩膜板遮盖涂覆有光刻胶的源漏极金属层,经过曝光、显影、刻蚀等步骤后形成包括源极和漏极的图形。
进一步地,形成彩色滤色层,包括:在形成有薄膜晶体管的衬底基板上形成彩色滤色层。示例性地,可以使用喷墨打印、颜料分散法、印刷等方法在形成了薄膜晶体管的衬底基板上形成彩色滤色层。示例性地,当彩色滤色层包括红色区域、绿色区域和蓝色区域时,应分三次分别形成。示例性地,先形成红色区域,应在衬底基板上涂布一层红色感光树脂,使用相应的掩膜板遮盖,进行曝光、显影,得到红色区域;然后形成绿色区域,在整个衬底基板上涂布绿色感光树脂,使用相应的掩膜板遮盖,进行曝光、显影,得到绿色区域;最后形成蓝色区域,在整个衬底基板上涂布蓝色感光树脂,使用相应的掩膜板遮盖,进行曝光、显影,最后得到蓝色区域。经过上述过程后,在形成了薄膜晶体管的衬底基板上形成了彩色滤色层。
进一步地,形成像素电极,包括:在形成有彩色滤色层的衬底基板上形成像素电极层,经过构图工艺形成包括像素电极的图形。示例性地,可以通过沉积、溅射、涂覆等方式在形成了彩色滤色层的衬底基板上,形成一层透明导电层,然后,在透明导电层上涂覆光刻胶,使用具有包括像素电极的图形的掩膜板遮盖涂覆有光刻胶的透明导电层,经过曝光、显影、刻蚀等步骤后,形成包括像素电极的图形。
此外,阵列基板的制作方法还包括:在形成像素电极的图形的衬底基板上形成钝化层。示例性地,通过等离子增强化学气相沉积、溅射或者热蒸发等方法,在形成有像素电极的图形的衬底基板上,形成一层钝化层。
需要说明的是,步骤S601、S602和S603的执行顺序可为:在执行步骤S601过程中执行步骤S603,然后执行步骤S602;也可先执行步骤S601,然后执行步骤S602,接下来执行步骤S603;还可为其他执行顺序,本发明对此不作具体限定。
具体地,步骤S601、S602和S603的执行顺序为:在执行步骤S601过程中执行步骤S603,然后执行步骤S602,也即,在形成薄膜晶体管、彩色滤色层和像素电极的过程中形成引线,此时,引线的形成方法包括:
引线与源极和漏极同时形成,也即在形成了源漏极绝缘层的衬底基板上,形成一层源漏极金属层,通过构图工艺形成包括源极、漏极和引线的图形。由于引线与源极和漏极同时形成,因而可简化阵列基板的制作工艺。
为使形成的引线与形成的公共电极块电连接,需在形成有像素电极的图形的衬底基板上形成钝化层之后,经过构图工艺在彩色滤色层和钝化层上均形成对应于公共电极块的过孔,引线通过该过孔与公共电极块电连接。具体地,对应于公共电极块的过孔,可在形成彩色滤色层之后刻蚀一次,然后在形成钝化层之后刻蚀一次,也即共通过两次刻蚀完成;也可在形成钝化层之后,通过一次刻蚀钝化层和彩色滤色层完成。本发明实施例优选通过一次刻蚀完成对应于公共电极块的过孔,可简化阵列基板的制作工艺。
具体地,步骤S601、S602和S603的执行顺序为:先执行步骤S601,然后执行步骤S602,接下来执行步骤S603,也即在形成公共电极之后形成引线,此时,引线的形成方法包括:
在形成有公共电极的衬底基板上形成包括多条引线的图形。其中,引线的一端位于公共电极块上,直接与公共电极块电连接。
本发明实施例优选步骤S601、S602和S603的执行顺序为:在执行步骤S601过程中执行步骤S603,然后执行步骤S602,此时引线与源极和漏极同时形成,可简化阵列基板的制作工艺。
进一步地,阵列基板的制作方法还可包括在衬底基板上形成黑矩阵。示例性地,可以通过喷墨打印、颜料分散法、印刷等方法在衬底基板上直接形成黑矩阵。示例性地,首先,涂布一层黑色感光树脂。然后,使用具有黑矩阵的图案的掩膜板遮盖黑色感光树脂,经过曝光、显影等步骤,在衬底基板上形成黑矩阵。
进一步地,阵列基板的制作方法还可包括在衬底基板上形成缓冲层。示例性地,可以通过等离子增强化学气相沉积等方法,在形成黑矩阵的图形的衬底基板上,形成一层缓冲层。
此外,本发明实施例还提供了一种如实施例一提供的阵列基板的驱动方法,如图7所示,该驱动方法包括:步骤S701、在触控时间段内,引线用于触控集成电路和公共电极块之间的触控信号传输;步骤S702、在显示时间段内,引线用于向公共电极块传输公共电压信号。其中,触控信号包括触控扫描信号和触控感应信号。
其中,将触摸屏每一帧的时间分为触控时间段和显示时间段,也即触控阶段和显示阶段分时驱动,可减小触控阶段和显示阶段之间信号的干扰。示例性地,如图8所示,将触摸屏每一帧的时间分为显示时间段C和触控时间段T,示例性地,假设触摸屏显示一帧的时间为15.6ms,可设置显示时间段C为11ms,触控时间段T为4.6ms。显示时间段C和触控时间段T的时长可根据显示装置的分辨率进行设置,也可根据芯片的处理能力进行设置,本发明对此不作具体限定。并且,显示时间段的驱动芯片和触控时间段的侦测芯片可为同一芯片,示例性地,显示时间段的驱动芯片和触控时间段的侦测芯片均为触控集成电路中的芯片,从而可降低显示装置的生产成本。
示例性地,如图8所示,在显示时间段内,对触摸屏中的每条栅线依次施加栅扫描信号G1、G2、G3……Gn;对数据线施加灰阶信号D;触控集成电路中的芯片对每个公共电极块施加公共电压信号,也即通过引线向公共电极块传输公共电压信号,以实现显示装置的显示功能。在触控时间段内,触控集成电路中的芯片对每个公共电极块施加触控扫描信号Tx,同时接收每个公共电极块的触控感应信号Rx,也即,通过引线传输触控集成电路和公共电极块之间的触控信号,通过对触控感应信号Rx的分析,判断是否发生触控,以实现显示装置的触控功能。
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以所述权利要求的保护范围为准。

Claims (5)

1.一种阵列基板,包括衬底基板以及位于所述衬底基板上的薄膜晶体管、像素电极和公共电极,其特征在于,还包括多条引线和彩色滤色层;其中,
所述公共电极包括多个可复用作自电容电极的公共电极块,每条所述引线的一端电连接一个所述公共电极块,另一端电连接触控集成电路;
所述薄膜晶体管包括依次层叠设置于所述衬底基板上的有源层、栅极绝缘层、栅极、源漏极绝缘层、源极和漏极;所述彩色滤色层位于所述源极和漏极上,所述彩色滤色层与所述源极和漏极接触;所述像素电极位于所述彩色滤色层上;所述阵列基板还包括位于所述像素电极上的钝化层;所述公共电极块位于所述钝化层上;
所述引线与所述源极和漏极同层设置;所述钝化层和所述彩色滤色层上均设置有对应于所述公共电极块的过孔,所述引线通过所述过孔与所述公共电极块电连接;或者,所述引线的一端位于所述公共电极块上,直接与所述公共电极块电连接;
所述阵列基板还包括位于所述衬底基板上的黑矩阵,所述引线和所述薄膜晶体管在所述衬底基板上的投影均落在所述黑矩阵在所述衬底基板上的投影内。
2.根据权利要求1所述的阵列基板,其特征在于,各所述公共电极块的形状和面积均相同,每个所述公共电极块在所述衬底基板上的投影与至少一个像素在所述衬底基板上的投影重合。
3.一种显示装置,其特征在于,包括如权利要求1-2任一项所述的阵列基板。
4.一种阵列基板的制作方法,其特征在于,包括:
形成薄膜晶体管、彩色滤色层和像素电极;
形成公共电极;
形成多条引线;
其中,所述公共电极包括多个可复用作自电容电极的公共电极块,每条所述引线的一端电连接一个所述公共电极块,另一端电连接触控集成电路;
形成薄膜晶体管、彩色滤色层和像素电极的步骤包括:
在衬底基板上形成包括有源层的图形;
在形成有所述有源层的图形的所述衬底基板上形成栅极绝缘层;
在形成有所述栅极绝缘层的所述衬底基板上形成包括栅极的图形;
在形成有所述栅极的图形的所述衬底基板上形成源漏极绝缘层;
在形成有所述源漏极绝缘层的所述衬底基板上形成包括源极和漏极的图形;
在形成有所述薄膜晶体管的所述衬底基板上形成彩色滤色层,所述彩色滤色层与所述源极和漏极接触;
在形成有所述彩色滤色层的所述衬底基板上形成包括像素电极的图形;
所述阵列基板的制作方法还包括:在形成有所述像素电极的图形的所述衬底基板上形成钝化层;
所述引线与所述源极和漏极同时形成;在形成有所述像素电极的图形的所述衬底基板上形成钝化层之后,还包括:在所述彩色滤色层和所述钝化层上形成对应于所述公共电极块的过孔,所述引线通过所述过孔和所述公共电极块电连接;或者,所述形成多条引线,包括:在形成有所述公共电极的所述衬底基板上形成包括多条引线的图形;其中,所述引线的一端位于所述公共电极块上,直接与所述公共电极块电连接;
形成黑矩阵,所述引线和所述薄膜晶体管在所述衬底基板上的投影均落在所述黑矩阵在所述衬底基板上的投影内。
5.一种如权利要求1-2任一项所述的阵列基板的驱动方法,其特征在于,包括:
在触控时间段内,所述引线用于所述触控集成电路和所述公共电极块之间的触控信号传输;
在显示时间段内,所述引线用于向所述公共电极块传输公共电压信号。
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