CN104658914B - A kind of zanjon groove tank manufacturing method and deep trench improving pattern - Google Patents
A kind of zanjon groove tank manufacturing method and deep trench improving pattern Download PDFInfo
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- CN104658914B CN104658914B CN201510080704.9A CN201510080704A CN104658914B CN 104658914 B CN104658914 B CN 104658914B CN 201510080704 A CN201510080704 A CN 201510080704A CN 104658914 B CN104658914 B CN 104658914B
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Abstract
This application discloses a kind of zanjon groove tank manufacturing methods improving pattern, including:ONO layer is formed on epitaxial layer;It penetrates ONO layer and forms the first part of groove in the epitaxial layer;Side wall is formed in the side wall of the first part of groove;It is etched downwards in the bottom of the first part of groove, the region newly etched is known as the second part of groove, and the first part of groove and the summation of second part constitute complete groove;Go out the 4th silica in the side wall and bottom thermal oxide growth of the second part of groove;The 4th silica and side wall are first removed, then removes the second silica and the first silicon nitride in ONO layer, only retains the first silica.By a photoetching and twice, etching groove finally improves the breakdown reverse voltage of groove-shaped super-junction device to the application to improve groove pattern.
Description
Technical field
This application involves a kind of zanjon groove tank manufacturing methods of groove-shaped super-junction device.
Background technology
The Chinese invention patent application that application publication number is CN103035677A, data of publication of application is on April 10th, 2013
Super junction MOSFET (metal-oxide type field-effect transistor) has been carried out briefly in the background technology part of its specification
It introduces.Super-junction device also includes super junction JFET (junction field effect transistor), super other than comprising super junction MOSFET
Junction Schottky diode, super junction IGBT (igbt) etc., the common ground of these super-junction devices is that all have
Super-junction structures.
A is please referred to Fig.1, this is a kind of structural schematic diagram of existing super junction JFET, has alternating in N-shaped epitaxial layer
The p-type column (pillar, also referred to as longitudinal region) and N-shaped column of arrangement.This alternately arranged p possessed in silicon materials
Type column and N-shaped column are thus referred to as super-junction structures.
A kind of manufacturing process of typical super-junction structures is to etch multiple deep trench in silicon materials (such as N-shaped epitaxial layer)
(deep trench), then fills these grooves with p-type silicon and forms p-type column.Outside N-shaped between two neighboring p-type column
Prolong layer and be just used as N-shaped column, as shown in Figure 1 b.The super-junction device that super-junction structures are formed using this manufacturing process is referred to as
Groove-shaped super-junction device.
When manufacture groove type super-junction device, the pattern of deep trench is most important.But due to the limitation of etching technics, one
As obtainable deep trench pattern it is poor, show as trenched side-wall and more tilt, groove opening width (top CD) and trench bottom
Portion's width (bottom CD) has larger difference.When groove is shallower, influence of the groove pattern to device performance is smaller.Work as ditch
Slot CD (critical size) is within 5 μm, and gash depth is at 40 μm or more, the width of groove opening and bottom that groove pattern is brought
Spending difference will be very big, this is very unfavorable for the promotion of the breakdown reverse voltage of groove-shaped super-junction device.Referring to Fig. 2,
Assuming that the opening width of deep trench is 4 μm, depth is 40 μm, the folder between trenched side-wall and channel bottom that technique can be realized
Angle is 102 °, and trench bottom width is only 1.2 μm at this time.Too due to the actual variance of groove opening width and trench bottom width
Greatly, super junction is difficult to obtain charge balance simultaneously in groove opening and channel bottom, seriously affects the breakdown reverse voltage of device.
Invention content
Technical problems to be solved in this application are to provide a kind of deep groove etching method, can improve groove pattern and make
Trenched side-wall is more vertical, reduces the difference of groove opening width and trench bottom width.
In order to solve the above technical problems, the zanjon groove tank manufacturing method that the application improves pattern includes the following steps:
1st step, forms ONO layer on epitaxial layer, the ONO layer include from bottom to top the first silica, the first silicon nitride,
Second silica;
2nd step penetrates ONO layer using photoetching and dry etch process and forms the first part of groove in the epitaxial layer;
3rd step sequentially forms third silica and the second silicon nitride in silicon chip surface, then anti-carves the second nitridation using dry method
Silicon and third silica in the side wall of the first part of groove so that form side wall;
4th step etches downwards in the bottom of the first part of groove, and the region newly etched is known as the second part of groove,
The first part of groove and the summation of second part constitute complete groove;
5th step goes out the 4th silica in the side wall and bottom thermal oxide growth of the second part of groove;Spent silicon makes
The second part of groove bottom width be substantially equal to groove first part bottom width, and/or second of groove
The opening width divided is substantially equal to the opening width of the first part of groove;
6th step first removes the 4th silica and side wall, then removes the second silica and the first silicon nitride in ONO layer, only
Retain the first silica.
The deep trench of the application is divided into the first part of groove and the second part of groove from top to bottom, this two-part bottom
Portion's width is roughly the same, and/or this two-part opening width is roughly the same.
By a photoetching and twice, etching groove is suitable for depth and is greater than or equal to 20 the application to improve groove pattern
μm deep trench, finally improve the breakdown reverse voltage of groove-shaped super-junction device.
Description of the drawings
Fig. 1 a are a kind of structural schematic diagrams of existing super junction JFET;
Fig. 1 b are the super-junction structures schematic diagram of fabrication technology of groove-shaped super-junction device;
Fig. 2 is the deep trench pattern schematic diagram of prior art manufacture;
Fig. 3 a to Fig. 3 g are each step schematic diagrams of the zanjon groove tank manufacturing method of the application.
Specific implementation mode
The manufacturing method of the super-junction structures of groove-shaped super-junction device provided by the present application is as follows:
1st step please refers to Fig. 3 a, and ONO (oxidenitride oxide) layer is formed on N-shaped epitaxial layer as follow-up
Deep plough groove etched hard mask (hard mask) layer.The N-shaped epitaxial layer for example has been formed with follow-up photoetching process for being aligned
Zero layer label (zero mark).For example one layer of silica of thermal oxide growth or deposit (was known as the first oxygen to the ONO layer before this
SiClx), thickness is aboutOne layer of silicon nitride (being known as the first silicon nitride) is deposited again, and thickness is aboutMost
One layer of silica (being known as the second silica), about 0.5~3 μm of thickness are deposited afterwards.Each section thickness in the ONO layer can basis
Actual demand increases or decreases.
2nd step, please refers to Fig. 3 b, and photoetching process is first used to define grooved position with photoresist, then dry method is used to carve
Etching technique penetrates ONO layer in the grooved position and forms the first part of groove in N-shaped epitaxial layer, finally removes photoetching
Glue.The depth of the first part of the groove is roughly equivalent to the half of groove total depth.After this step dry etching, ONO
Second silica of layer the top still retains more than a half thickness.
3rd step please refers to Fig. 3 c, first (is known as third oxidation in one layer of silica of silicon chip surface thermal oxide growth or deposit
Silicon), thickness is aboutThe bottom of the first part of third silica certainty covering groove.Then one layer of nitrogen is deposited again
SiClx (is known as the second silicon nitride), and thickness is aboutSpecific thickness is determined according to zanjon groove depth and etching selection ratio
It is fixed.It carries out back carving (anti-carving) using the second silicon nitride of anisotropic dry etch process pair and third silica later, until
The second silicon nitride and third silica of silicon chip surface and groove first part bottom all remove, in the first part of groove
Side wall still retains is formed by side wall by the second silicon nitride and third silica.
4th step please refers to Fig. 3 d, is etched downwards in the bottom of the first part of groove, the region newly etched is known as groove
Second part, the total depth of groove reaches required depth after this step etching.The first part the (the 2nd of last etching groove
Step) hard mask layer of the remaining ONO layer as the second part of this etching groove, the 3rd step are formed by side wall protection ditch afterwards
The side wall of the first part of slot.
5th step please refers to Fig. 3 e, and forming silica on silicon chip using thermal oxide growth technique (is known as the 4th oxidation
Silicon).Since silicon chip surface has ONO layer protection, the side wall of the first part of groove has side wall protection, therefore this step is only in groove
Second part side wall and bottom the 4th silica is gone out by thermal oxide growth.Thermal oxide growth silica needs to expend certain
The silicon of thickness, this step are used for making the bottom width b of the second part (after the 4th silica of removal) of groove to be substantially identical to ditch
The bottom width a of first part's (after removal side wall) of slot, and/or make the second part (after the 4th silica of removal) of groove
Opening width d is substantially identical to the opening width c of first part's (after removal side wall) of groove, as illustrated in figure 3f.
6th step please refers to Fig. 3 f, the 4th silica and side wall is first removed, for example, by using wet corrosion technique.Again to groove
Side wall carry out reparation oxidation.Then the second silica and the first silicon nitride in hard mask layer are removed, the first oxidation is only retained
Silicon fills (EPI Filling) technique for subsequent extension.
7th step please refers to Fig. 3 g, uses the extension fill process of selectivity to fill monocrystalline silicon in deep trench and is filled out with being formed
Structure is filled, filled monocrystalline silicon can be made to have doping to reach certain resistivity according to actual needs.CMP (chemistry is used later
Mechanical lapping) monocrystalline silicon on technique removal hard mask layer (at this time be only the first silica).Then hard mask layer is removed.Institute
It states interstitital texture and just can be used as p-type column, the N-shaped epitaxial layer between two adjacent p-type columns just can be used as N-shaped column, until
This super-junction structures completes.Complete groove-shaped super-junction device can subsequently be formed.
The 1st step to the 6th step of the above method is the zanjon groove tank manufacturing method of the improvement pattern of the application, and each section is adulterated
Type becomes being also feasible on the contrary.
Compared with existing zanjon groove tank manufacturing method, the application does not increase the quantity of lay photoetching mask plate, but passes through one
The method of secondary photoetching and twice etching groove achievees the purpose that improvement groove pattern, finally improves groove-shaped super-junction device
Breakdown reverse voltage (BV).
Fig. 3 f are please referred to, first part and the groove that deep trench is divided into groove from top to bottom are formed by using the above method
Second part, this two-part bottom width roughly the same (i.e. a ≈ b), and/or this two-part opening width are roughly the same
(i.e. c ≈ d).Obviously, a≤b, c≤d.In addition, be no longer smooth side wall from groove opening to channel bottom, but in groove
There are one neck parts for the intersection tool of two parts, which is exactly the bottom of the first part of groove, width b.Closely
The lower slots width for the neck part drastically becomes greatly c from b, which is exactly opening for the second part of groove
Mouthful, width c.
The preferred embodiment that these are only the application is not used to limit the application.Those skilled in the art is come
It says, the application can have various modifications and variations.Within the spirit and principles of this application, any modification made by is equal
Replace, improve etc., it should be included within the protection domain of the application.
Claims (18)
1. a kind of zanjon groove tank manufacturing method improving pattern, characterized in that include the following steps:
1st step, forms ONO layer on epitaxial layer, and the ONO layer includes the first silica, the first silicon nitride, second from bottom to top
Silica;
2nd step penetrates ONO layer using photoetching and dry etch process and forms ditch described in the first part of groove in the epitaxial layer
The depth of the first part of slot is equivalent to the half of groove total depth;
3rd step sequentially forms third silica and the second silicon nitride in silicon chip surface, then using dry method anti-carve the second silicon nitride and
Third silica in the side wall of the first part of groove so that form side wall;
4th step etches downwards in the bottom of the first part of groove, and the region newly etched is known as the second part of groove, groove
First part and the summation of second part constitute complete groove;
5th step goes out the 4th silica in the side wall and bottom thermal oxide growth of the second part of groove;Spent silicon makes ditch
The bottom width of the second part of slot is equal to the bottom width of the first part of groove, the opening width etc. of the second part of groove
In the opening width of the first part of groove;
6th step first removes the 4th silica and side wall, then removes the second silica and the first silicon nitride in ONO layer, only retains
First silica.
2. the zanjon groove tank manufacturing method according to claim 1 for improving pattern, characterized in that in the 1st step of the method, institute
State epitaxial layer have been formed with follow-up photoetching process for alignment zero layer mark.
3. the zanjon groove tank manufacturing method according to claim 1 for improving pattern, characterized in that in the 1st step of the method, shape
Include the first silica of first thermal oxide growth or deposit at the ONO layer, then deposit the first silicon nitride, finally deposits the second oxidation
Silicon.
4. the zanjon groove tank manufacturing method according to claim 3 for improving pattern, characterized in that in the 1st step of the method, the
The thickness of silicon monoxide is 100~2000;The thickness of first silicon nitride is 100~1500;The thickness of second silica is 0.5
~3 μm.
5. the zanjon groove tank manufacturing method according to claim 1 for improving pattern, characterized in that in the 2nd step of the method,
The second silica of ONO layer the top still retains more than a half thickness after dry etching.
6. the zanjon groove tank manufacturing method according to claim 1 for improving pattern, characterized in that in the 2nd step of the method, institute
State hard mask layer of the ONO layer as the first part of etching groove.
7. the zanjon groove tank manufacturing method according to claim 1 for improving pattern, characterized in that in the 3rd step of the method, shape
Thermal oxide growth or depositing technics are used at third silica, the second silicon nitride is formed and uses depositing technics.
8. the zanjon groove tank manufacturing method according to claim 1 for improving pattern, characterized in that in the 2nd step of the method, the
The thickness of three silica is 100~2000;The thickness of second silicon nitride is 1000~5000.
9. the zanjon groove tank manufacturing method according to claim 1 for improving pattern, characterized in that in the 3rd step of the method, institute
It is using the second silicon nitride of anisotropic dry etch process pair and third silica carve to state dry method and anti-carve technique, directly
The second silicon nitride and third silica to silicon chip surface and groove first part bottom all remove, in the first part of groove
Side wall still retain side wall be formed by by the second silicon nitride and third silica.
10. the zanjon groove tank manufacturing method according to claim 1 for improving pattern, characterized in that in the 4th step of the method,
Hard mask layer of the remaining ONO layer as the second part of this etching groove after the first part of etching groove, the side wall
Protect the side wall of the first part of groove.
11. the zanjon groove tank manufacturing method according to claim 1 for improving pattern, characterized in that in the 5th step of the method,
When four silica of thermal oxide growth, silicon chip surface has ONO layer protection, the side wall of the first part of groove to have side wall protection, because
This goes out the 4th silica in the side wall of the second part of groove and bottom by thermal oxide growth.
12. the zanjon groove tank manufacturing method according to claim 1 for improving pattern, characterized in that in the 6th step of the method,
Further include that reparation oxidation is carried out to the side wall of groove.
13. it is according to claim 1 improve pattern zanjon groove tank manufacturing method, characterized in that the 6th step of the method it
Afterwards, monocrystalline silicon is filled in deep trench to form super-junction structures, the doping type for the monocrystalline silicon filled is opposite with epitaxial layer.
14. it is according to claim 13 improve pattern zanjon groove tank manufacturing method, characterized in that the 6th step of the method it
Afterwards, the extension fill process of selectivity is used to fill monocrystalline silicon in deep trench to form interstitital texture.
15. it is according to claim 14 improve pattern zanjon groove tank manufacturing method, characterized in that the 6th step of the method it
Afterwards, interstitital texture is formed later with the monocrystalline silicon on CMP process the first silica of removal, then removes hard mask layer.
16. a kind of deep trench, characterized in that it is divided into the first part of groove and the second part of groove from top to bottom, groove
The depth of first part is equivalent to the half of groove total depth, this two-part bottom width is identical, the first part of groove
Opening width is more than the bottom width of the first part of groove, and the opening width of the second part of groove is more than second of groove
The bottom width divided.
17. deep trench according to claim 16, characterized in that first part's depth of groove is equal to second of groove
Divide depth.
18. deep trench according to claim 16, characterized in that there are one bottles for the intersection tool in two parts of groove
Neck, the neck part are the bottom of the first part of groove;Lower slots width next to the neck part, should in drastically becoming larger
Drastically become larger position be groove second part opening.
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CN107359120B (en) * | 2016-05-10 | 2020-06-23 | 北大方正集团有限公司 | Super junction power device and preparation method thereof |
CN108063121A (en) * | 2016-11-08 | 2018-05-22 | 中芯国际集成电路制造(上海)有限公司 | A kind of semiconductor devices and preparation method, electronic device |
CN107248495B (en) * | 2017-06-20 | 2020-01-24 | 上海华力微电子有限公司 | Method for forming high aspect ratio isolation in high-energy ion implantation process |
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