CN104601147B - A kind of random small negative pulse of fixed cycle produces circuit - Google Patents
A kind of random small negative pulse of fixed cycle produces circuit Download PDFInfo
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- CN104601147B CN104601147B CN201510064531.1A CN201510064531A CN104601147B CN 104601147 B CN104601147 B CN 104601147B CN 201510064531 A CN201510064531 A CN 201510064531A CN 104601147 B CN104601147 B CN 104601147B
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- random
- fixed cycle
- module
- capacitance
- negative pulse
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electronic Switches (AREA)
- Electrotherapy Devices (AREA)
Abstract
The present invention relates to a kind of random small negative pulse of fixed cycle produces circuit, mainly including time block, random number module, shaping filter module and numerical control attenuation module, each module is sequentially connected with, and time block is used to export clock signal；Random number module receives clock signal, exports the random sequence of fixed cycle；Shaping filter module by random sequence by multistage electric capacity shaping, clamping diode circuit after, export undersuing；Undersuing enters line amplitude control through numerical control attenuation module, exports the random small undersuing of fixed cycle, and the circuit design is simple, sampling sensitivity is high, can be integrated in a large number, realizes the generation of multiple signals.
Description
Technical field
The invention belongs to tiny signal source circuit design field, and in particular to a kind of random small negative pulse of fixed cycle is produced
Circuit.
Background technology
Pulse signal is widely used in communication, medical treatment, Industry Control, electricity as a kind of conventional test and excitation signal
The fields such as son measurement, Power Control and conversion, for example, in the systems such as radar detection, electronic countermeasure, need with pulse signal
Rising edge and trailing edge are applied to the system testing of acquisition system as trigger.
The technical fields such as recent years, photon-electron signal detection, Radar Signal Detection are fast-developing, in such event
The electric signal that detector is produced typically all has that amplitude is weak, frequency is high, the cycle is fixed, but the signal common trait such as at random, is used for
The detector for completing such detection is typically made up of much group probe units, and detector is difficult long-time work at normal temperatures and pressures
Make, it is impossible to whole to participate in system integration test, therefore the demarcation of rear end acquisition channel is completed, it is necessary to design and detector output signal
Identical pulse generating equipment.
For the simulation of such signal, way more common at present has：
1. exported using AWG, this kind of pulse generator mostly price is high, function is complicated, volume it is larger and
The application scenario of hand-held, portable equipment or limited space is not suitable for it, it is impossible to which possessing tens generators carries out test system
Unified test is tried；
2. use PLD and high speed D/A to export, such DA complex circuit designs, the signal of generation are narrower, and
It is required that DA operating frequencies are higher, power consumption is very big, realize difficulty, and cost is high, be not easy to a large amount of uses；
3. by the way of special DDS integrated chip designs：The mode of its design with high speed D/A is similar, signal period and width
Degree sensitivity is higher but high to device speed characteristic requirements, and device buying and use cost are high, is not easy to a large amount of uses.
The content of the invention
The purpose of the present invention is a kind of fixed week proposed for technical problems such as said method design complexity, cost height
Phase, random small negative pulse produced circuit, and the circuit design is simple, sampling sensitivity is high, and circuit area is little, can be integrated in a large number,
And it is capable of achieving the generation of multiple signals.
In order to achieve the above object, the present invention proposes that a kind of random small negative pulse of fixed cycle produces circuit, mainly includes
Time block, random number module, shaping filter module and numerical control attenuation module, each module are sequentially connected with：Time block is used to produce
The stable clock signal of life, and transmit to random number module, clock signal is carried out randomization by random number module, and output is fixed
The random sequence in cycle, shaping filter module by random sequence by multistage electric capacity shaping, high speed diode clamp circuit after,
Output undersuing, numerical control attenuation module enter line amplitude control, the random small negative pulse of output fixed cycle to undersuing
Signal.
Preferably, the time block includes two-way clock signal generating circuit, wherein producing including SE555 timers all the way
Raw circuit, another road include high steady clock input, after the time threshold control end of the timer and triggering end connection, by electricity
Resistance（R2）It is connected to current input terminal（DISC）, current input terminal（DISC）By slide rheostat（R1）Connect with power supply, touch
Originator is by the first storage capacitor（C1）Ground connection.
Preferably, the power end of the timer（VCC）It is connected the first decoupling capacitor between ground（C6）, timer voltage
Adjustable side（CV）By the second storage capacitor（C2）Ground connection.
Preferably, the random number module includes random number chips W NG-8, its output Enable Pin（OE）It is drop-down by first
Resistance（R3）Ground connection, chip power end (Vdd) is by the first pull-up resistor（R4）Connection power supply, output pin（DATA）With shaping
The input of filtration module is connected.
Preferably, the shaping filter module includes first order capacitance（C3）, second level capacitance（C4）, second
Pull-up resistor（R5）, the second pull down resistor（R6）And clamp diode（V1）, one end of first order capacitance and random digital-to-analogue
The output pin of block（DATA）It is connected, the other end passes through the second pull-up resistor respectively（R5）Connect power supply, by the second pull down resistor
（R6）Ground connection, by clamp diode（V1）Ground connection, and with the second capacitance（C4）It is connected, the second capacitance（C4）It is another
One end passes through the 3rd pull-up resistor（R7）Connect power supply and be connected with the input of numerical control attenuation module.
Preferably, the numerical control attenuation module includes HMC472LP4 numerical-control attenuators（D3）, the 3rd capacitance（C5）,
4th capacitance（C7）, undersuing is through the 3rd capacitance（C5）Afterwards, it is input into numerical-control attenuator（D3）Input pipe
Pin（RF1）, numerical-control attenuator（D3）Amplitude control pin（V1~V6）Respectively by 8 line row's groups of 4.7K Ω（RN1）Connect power supply, 6
Line toggle switch is grounded.
Preferably, the 4th capacitance（C7）One end and attenuator（D3）Output end（RF2）It is connected, the other end
By the resistance of 49.9 Ω（R8）It is connected to output SMA connectors（X3）, the random small undersuing of output fixed cycle.
Compared with prior art, advantages of the present invention and good effect are：
Generation of the circuit to analog pulse signal, exports clock signal using timer, through random number module, defeated
Go out the random sequence of fixed cycle, random sequence is shaped as fixed cycle through the process such as multistage electric capacity shaping, high speed diode be clamped
Random undersuing, the random small negative pulse of the controllable fixed cycle of undersuing numerical-control attenuator amplitude output signal
Signal, circuit design is simple, low cost, and sampling sensitivity is high, and circuit area is little, can be integrated in a large number, and is capable of achieving multichannel and believes
Number generation.
Description of the drawings
Fig. 1 is that a kind of random small negative pulse of fixed cycle produces each module connection block diagram of circuit；
Fig. 2 is circuit each point signal waveform；
Fig. 3 is that a kind of random small undersuing of fixed cycle produces circuit theory diagrams.
Specific embodiment
The present invention provides a kind of random small negative pulse of fixed cycle and produces circuit, and below in conjunction with the accompanying drawings the present invention is done into one
Step ground explanation.
As shown in figure 1, connecting block diagram for circuit module provided by the present invention, mainly include：Time block, random digital-to-analogue
Block, shaping filter module and numerical control attenuation module, time block export stable clock signal A；Clock signal A passes through random number
Random sequence B of fixed cycle is exported after module；Random sequence B exports the random negative pulse of fixed cycle by shaping filter module
Signal C；Undersuing C enters line amplitude control through numerical control attenuation module, exports the random small undersuing of fixed cycle
D, wherein, the signal waveform of each main point of circuit is as shown in Figure 2.
Fig. 3 is the principle design figure that a kind of random small negative pulse of fixed cycle produces circuit, and time block therein includes
Two-way clock signal generating circuit, wherein including that SE555 timers produce circuit all the way, another road includes high steady clock input,
When multichannel synchronousness no requirement (NR), clock signal is produced from SE555 timers, when multichannel requires the complete synchronization of signal
When, selecting outer for high surely clock, the present embodiment is input into by being input into SMA connectors from the high steady clocks of GS20, function admirable,
Reliability is high, to ensure to export the synchronousness of pulse.
Timer internal（D1）SE555 is typical timing chip, timer current input terminal（DISC）Become by sliding
Resistance device（R1）It is connected with+5V power supplys；Current input terminal（DISC）With Timer Threshold end（TH）Between connect 5.1K resistance（R2）；
Timer Threshold end（TH）And triggering end（TR）Between short circuit, and pass through the first storage capacitor（C1）Ground connection.The timing of timer
Cycle is by slide rheostat（R1）, resistance（R2）With the first storage capacitor（C1）Size determine, the first storage capacitor（C1）'s
Capacitance is 0.1uF, exports the cycle of clock signal only by slide rheostat（R1）Adjust and determine, clock cycle calculated relationship
For：（（R1+2*R2）* C1）/1.49.
To ensure that chip is normally exported, make output clock more stable, timer power supply end（VCC）With output reset terminal
（RST）Connect+5V power supplys, timer ground terminal（GND）Connect the decoupling capacitor of the indirect 0.1uF on signal ground, supply pin and ground（C6）；It is fixed
When device voltage-regulation end（CV）By second storage capacitor of 0.01uF（C2）Ground connection energy storage, timer output（OUT）Clock
Wire jumper is respectively connecting to the steady clock of the height of outside input（X2）1,3 pin on；When needing to select internal clocking, emitted with wire jumper
1,2 pin of tie jumper；When needing to select external clock, with the 2 of jumper cap tie jumper, 3 pin, inside and outside clock choosing is completed
Select.
Clock signal input random number chip after selection（D2）Clock end（CLK）Randomization is carried out, at random
Change chip and select WNG-8 chips, the chip is a digital physical noise source chip, for producing true random number sequence, is letter
Indispensable device in breath safety and password product.Random number chip exports Enable Pin（OE）By the first of 4.7K the drop-down electricity
Resistance（R3）Ground connection, it is ensured that chip is normally exported, first pull-up resistor of chip power end (Vdd) by 100 Ω（R4）Meet+5V electric
Source, chip dormancy control end（INH）With two NC pins（2 pin, 3 pin）Hanging, random sequence is by random number chip
Output pin（DATA）Export to shaping filter module.
First capacitance of the random sequence through 100pF（C3）Afterwards, it is shaped as corresponding with random sequence hopping edge
, there is positive pulse in the rising edge of Serial No. in pulse signal, and negative pulse occurs in trailing edge.Pulse signal by 1K Ω second
Pull-up resistor（R5）Connect+5V power supplys, by second pull down resistor of 1K Ω（R6）Ground connection, two resistance are to the pulse after straight
Signal adds 2.5V direct current biasings, and the bias voltage is more than catching diode（V1）Conducting voltage, be in making diode pair
Conducting state, by pulse signal maximum level clamper in 0.7V or so, the high level of pulse signal, positive pulse and negative pulse bottom
Wider portion is all filtered out, and exports undersuing on the basis of 0.7V, and the signal is through 150pF second every straight electricity
Hold（C4）Afterwards, the 3rd pull-up resistor then by 2K（R7）Power supply is connect, the precipitous journey in edge of undersuing is further improved
Degree, threeth capacitance of the signal after pull-up through 22pF（C5）Numerical-control attenuator is sent into afterwards（D3）Input
（RF1）Carry out signal amplitude control.
The present embodiment numerical-control attenuator（D3）Carry out control signal amplitude from HMC472LP4 numerical-control attenuators, the attenuator
A width of 0 ~ the 3G of conduction band, can meet the conducting of high speed tiny signal and require；Attenuator is capable of achieving the numerical control of 0.5dB ~ 31.5dB and declines
Subtract, amplitude control pin of the attenuation amplitude by attenuator（V1 ~ V6 pin）Automatic level control, this grade of decay when controlling level and being low make
Can, wherein, V1 decay 16dB, V2 decay 8dB, V3 decay 4dB, V4 decay 2dB, V5 decay 1dB, V6 decay 0.5dB, complete attenuation
Measure to enable attenuation sum, the amplitude control pin of attenuator（V1~V6）Respectively by 8 line row's groups of 4.7K Ω（RN1）Meet+5V
Power supply, by 6 line toggle switch be grounded, when the corresponding amplitude control bit of toggle switch push ground when, correspondence decay position enable；When
When toggle switch is disconnected with ground, correspondence decay position failure, therefore the amplitude of output signal can be flexibly by toggle switch control real
Apply conveniently.
Pass through a 330pF electric capacity after the pin ACG1 ~ ACG4 short circuits of attenuator electric capacity（C9）Ground connection, capacitor pin
ACG5, ACG6, ACG7 pass through a 330pF electric capacity respectively（C10、C11、C12）Ground connection, attenuator power end（VDD）Meet+5V electric
Source, ground terminal（GND）Ground connection, hot weld disk（NC1~NC8）Ground connection, power end（VDD）The decoupling electricity of 1000pF is bridged between lower margin
Hold（C8）, the signal after numerical-control attenuator is by output end（RF2）Output, by the 4th of 1000pF the after signal output
Capacitance（C7）Carry out every straight, after straight signal 49.9 Ω resistance of concatenation（R8）It is connected to output SMA connectors（X3）,
Ensure that circuit output impedance is 50 Ω.
Circuit in the present embodiment is through demonstration, principle design and circuit simulation, simulation results show circuit design
It is feasible, circuit board is finally produced, circuit design verification has been carried out, circuit shows through carefully debugging, debugging result：Circuit is produced
Pulse signal frequency can set, pulse width 2ns, signal trailing edge are less than 1ns, and rising edge is less than 2ns, signal amplitude 5～
200mV can set, and circuit noise control is good, good in signal output waveform, and circuit noise level is less than 2mV, debugging result card
Bright circuit design thinking is reasonable, method is feasible.
The above, is only presently preferred embodiments of the present invention, is not the restriction for making other forms to the present invention, is appointed
What those skilled in the art possibly also with the disclosure above technology contents changed or be modified as equivalent variations etc.
Effect embodiment is applied to other fields, but every without departing from technical solution of the present invention content, according to the technical spirit of the present invention
Any simple modification, equivalent variations and the remodeling made to above example, still falls within the protection domain of technical solution of the present invention.
Claims (6)
1. a kind of random small negative pulse of fixed cycle produces circuit, it is characterised in that include：
Time block, for producing stable clock signal；
Above-mentioned clock signal is carried out randomization by random number module, exports the random sequence of fixed cycle；
Shaping filter module, including first order capacitance (C3), second level capacitance (C4), the second pull-up resistor (R5),
Second pull down resistor (R6) and clamp diode (V1), one end of first order capacitance and the output pin phase of random number module
Even, the other end power supply is connect by the second pull-up resistor (R5) respectively, is grounded by the second pull down resistor (R6), by two pole of clamper
Pipe (V1) ground connection, and be connected with the second capacitance (C4), the other end of the second capacitance (C4) is by the 3rd pull-up resistor
(R7) connect power supply and be connected with the input of numerical control attenuation module；To receive above-mentioned random sequence and carry out at shaping filter
Reason, exports undersuing；
Above-mentioned undersuing is entered line amplitude control, the random small undersuing of output fixed cycle by numerical control attenuation module.
2. a kind of random small negative pulse of fixed cycle according to claim 1 produces circuit, it is characterised in that：The timing
Module includes two-way clock signal generating circuit, wherein include that SE555 timers produce circuit all the way, when another road includes high steady
Clock is input into, and after the time threshold control end of the timer and triggering end connection, is connected to current input terminal by resistance (R2)
(DISC), current input terminal (DISC) is connected with power supply by slide rheostat (R1), and triggering end passes through the first storage capacitor
(C1) it is grounded.
3. a kind of random small negative pulse of fixed cycle according to claim 2 produces circuit, it is characterised in that：The timing
The power end (VCC) of device is connected the first decoupling capacitor (C6) between ground, and timer voltage-regulation end (CV) is by the second energy storage
Electric capacity (C2) is grounded.
4. a kind of random small negative pulse of fixed cycle according to claim 1 produces circuit, it is characterised in that：It is described random
Digital-to-analogue block includes random number chips W NG-8, and its output Enable Pin (OE) is grounded by the first pull down resistor (R3), chip power end
(Vdd) power supply is connected by the first pull-up resistor (R4), output pin (DATA) is connected with the input of shaping filter module.
5. a kind of random small negative pulse of fixed cycle according to claim 1 produces circuit, it is characterised in that：The numerical control
Attenuation module includes HMC472LP4 numerical-control attenuators (D3), the 3rd capacitance (C5), the 4th capacitance (C7), negative pulse
Signal is input into the input pin (RF1) of numerical-control attenuator (D3) after the 3rd capacitance (C5), numerical-control attenuator (D3)
Amplitude control pin (V1～V6) connects power supply, 6 line toggle switch ground connection by 8 lines row's group (RN1) of 4.7K Ω respectively.
6. a kind of random small negative pulse of fixed cycle according to claim 5 produces circuit, it is characterised in that：Described 4th
One end of capacitance (C7) is connected with the output end (RF2) of attenuator (D3), and the other end is connected by the resistance (R8) of 49.9 Ω
It is connected to output SMA connectors (X3), the random small undersuing of output fixed cycle.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510064531.1A CN104601147B (en) | 2015-02-09 | 2015-02-09 | A kind of random small negative pulse of fixed cycle produces circuit |
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| CN201510064531.1A CN104601147B (en) | 2015-02-09 | 2015-02-09 | A kind of random small negative pulse of fixed cycle produces circuit |
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| CN104601147B true CN104601147B (en) | 2017-04-05 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105929890A (en) * | 2016-04-15 | 2016-09-07 | 福建联迪商用设备有限公司 | Electronic device as well as clock signal generation circuit and method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4296384A (en) * | 1978-09-20 | 1981-10-20 | Kabushiki Kaisha Kawai Gakki Seisakusho | Noise generator |
| JP3364365B2 (en) * | 1995-07-27 | 2003-01-08 | 池上通信機株式会社 | Probability setting device for random pulse generator |
| CN101308388A (en) * | 2008-06-30 | 2008-11-19 | 中国兵器工业第二〇五研究所 | Self-restoration control circuit for photoelectric tracking instrument pitching device entering spacing zone |
| CN103630943A (en) * | 2013-02-08 | 2014-03-12 | 中国科学院电子学研究所 | Method and system for detecting thickness of lunar soil and subsurface geological structure of moon |
-
2015
- 2015-02-09 CN CN201510064531.1A patent/CN104601147B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4296384A (en) * | 1978-09-20 | 1981-10-20 | Kabushiki Kaisha Kawai Gakki Seisakusho | Noise generator |
| JP3364365B2 (en) * | 1995-07-27 | 2003-01-08 | 池上通信機株式会社 | Probability setting device for random pulse generator |
| CN101308388A (en) * | 2008-06-30 | 2008-11-19 | 中国兵器工业第二〇五研究所 | Self-restoration control circuit for photoelectric tracking instrument pitching device entering spacing zone |
| CN103630943A (en) * | 2013-02-08 | 2014-03-12 | 中国科学院电子学研究所 | Method and system for detecting thickness of lunar soil and subsurface geological structure of moon |
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