CN104536174A - 阵列基板以及显示装置 - Google Patents

阵列基板以及显示装置 Download PDF

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CN104536174A
CN104536174A CN201510041303.2A CN201510041303A CN104536174A CN 104536174 A CN104536174 A CN 104536174A CN 201510041303 A CN201510041303 A CN 201510041303A CN 104536174 A CN104536174 A CN 104536174A
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base palte
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董廷泽
黄东升
张大伟
张千
陈召
莫骏
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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Priority to CN201510041303.2A priority Critical patent/CN104536174A/zh
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Priority to US14/906,479 priority patent/US9766500B2/en
Priority to PCT/CN2015/079163 priority patent/WO2016119338A1/zh
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    • G—PHYSICS
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Abstract

本发明属于显示技术领域，具体涉及一种阵列基板以及显示装置。该阵列基板，包括显示区以及包围于所述显示区外围的非显示区，所述非显示区设置有用于连接外部控制信号的信号单元以及未设置所述信号单元的间隙区域，其中，所述间隙区域内设置有辅助单元，所述辅助单元与所述信号单元具有相同的高度且分别电性隔离，所述辅助单元表面与所述信号单元的局部表面具有相同的图案。该阵列基板在保持原有功能的基础上，使非显示区布线的差异化消除，减小或消除因外围走线不一致产生的摩擦Mura，进而使摩擦效果一致；相应的，采用该阵列基板的显示装置具有较好的显示效果。

Description

阵列基板以及显示装置
技术领域
本发明属于显示技术领域，具体涉及一种阵列基板以及显示装置。
背景技术
液晶显示装置(Liquid Crystal Display，简称LCD)是目前平板显示装置中应用最为广泛的一种。液晶显示装置的主要构成部件是液晶面板，液晶面板主要包括彩膜基板、阵列基板以及设置于二者之间的液晶。阵列基板中设置有薄膜晶体管(Thin FilmTransistor，简称TFT)，通过与薄膜晶体管相连的像素电极产生电场，从而实现对液晶的驱动控制，实现图像显示。
在液晶面板中，为了获得均匀的液晶分子排列以及初始方向，需要对液晶进行取向，现有技术一般通过取向膜控制液晶分子的初始取向。取向膜设置于彩膜基板和阵列基板朝向液晶层的一侧，并经过摩擦工艺使取向层具有取向能力。摩擦工艺中，通常利用外表面包覆有摩擦绒布的摩擦辊轮，在取向层上沿设定的方向滚动，通过绒布对取向层施加摩擦力，从而在取向层表面形成方向一致的取向槽，以使液晶分子沿着取向槽按照一定的方向排列，实现液晶取向。
在摩擦工艺中，摩擦辊轮对取向层施加垂直方向的压力，因此被摩擦面的平整度(或者平坦度)对取向槽的深度影响很大，如果被摩擦面的表面某处存在高度差，则摩擦绒布纤维将产生不一致的形变，进而导致被摩擦面上产生深浅不一致的取向槽。然而，在液晶面板的用于图像显示的显示区和包围于显示区外围的非显示区通常具有不同的平坦度。一般情况下，彩膜基板和阵列基板对应着显示区的区域较为平坦；而在非显示区，尤其是阵列基板，由于阵列基板薄膜晶体管与驱动芯片的布线原因，会导致非显示区形成包括多个不同高度的工艺段差；同时，为保证产品良率，如图1所示，通常还在非显示区中设置测试盘31(Test Pad)，测试盘31的结构与TFT的结构仅部分相同；同时，测试盘31还会根据需要设置相应的测试过孔32，通过测试过孔32加载驱动信号，以便在关键工艺后对TFT阵列进行测试。在测试盘31中设置测试过孔32时，测试过孔32与阵列基板中各工艺层会形成较大的段差。
当该阵列基板采用摩擦工艺进行摩擦取向时，摩擦绒布受基板表面较大段差的影响会产生不同的形变，因为绒布纤维形变具有一定的累加性(或叫记忆性),由段差造成的纤维形变若得不到及时缓解，一方面会使绒布的利用率和使用寿命大幅降低，导致被摩擦面产生不良的程度逐渐加剧；另一方面，这种形变会导致绒布在基板上的摩擦强度不均匀，进而造成在取向层中取向槽的深浅不一致，而取向槽深浅的不一致容易造成沿摩擦方向产生摩擦Mura(Rubbing Mura)不良，产品良率降低。
摩擦Mura不良是摩擦工艺中一个严重的品质问题，不仅严重影响产品的画面品质，而且ET检出率较低，造成后端严重的资材浪费以及品质问题。同时，在彩膜基板和阵列基板(尤其是阵列基板)采用何种布线结构能减轻摩擦Mura不良，一直是摩擦工艺中的难题。
发明内容
本发明所要解决的技术问题是针对现有技术中存在的上述不足，提供一种阵列基板以及显示装置，该阵列基板使非显示区布线的差异化消除，减小或消除因外围走线不一致产生的摩擦Mura，进而使摩擦效果一致。
解决本发明技术问题所采用的技术方案是该阵列基板，包括显示区以及包围于所述显示区外围的非显示区，所述非显示区设置有用于连接外部控制信号的信号单元以及未设置所述信号单元的间隙区域，其中，所述间隙区域内设置有辅助单元，所述辅助单元与所述信号单元具有相同的高度且分别电性隔离，所述辅助单元表面与所述信号单元的局部表面具有相同的图案。
优选的是，所述信号单元在所述非显示区的边缘设置有多个平行排列的条状接线端；
所述间隙区域对应位于所述非显示区的边缘，所述辅助单元包括多个平行排列的条状结构，多个所述条状结构的排列方向与所述条状接线端的排列方向相同，且多个所述条状结构之间的间距与所述信号单元中多个条状接线端之间的间距相同。
优选的是，多个所述条状结构的长度和宽度分别与所述条状接线端的长度和宽度对应相等。
优选的是，所述显示区设置有控制元件，所述信号单元与所述控制元件和外部控制信号供给单元连接，所述辅助单元与所述控制元件具有相同的层结构。
优选的是，所述控制元件为薄膜晶体管阵列，所述薄膜晶体管包括栅极、栅绝缘层、有源层、同层设置的源极和漏极、钝化层以及像素电极层，同行/列排列的所述薄膜晶体管的栅极与同一栅线连接；
所述辅助单元包括与所述薄膜晶体管各层对应的辅助栅极层、辅助栅绝缘层、辅助源漏电极层、辅助钝化层以及设置于所述辅助钝化层之上的辅助像素电极层，所述辅助单元中的各层的厚度与所述薄膜晶体管的对应各层的厚度分别相同。
优选的是，所述辅助单元中的各层与所述薄膜晶体管的各层分别采用相同的材料对应形成，所述辅助单元中的各层与所述薄膜晶体管的各层分别对应在同一构图工艺中形成。
优选的是，所述条状接线端开设有连接过孔；
所述条状结构在与所述条状接线端中所述连接过孔相当的位置开设有辅助过孔，所述辅助过孔与所述连接过孔具有相同的尺寸和深度。
优选的是，所述辅助过孔通过在所述辅助栅绝缘层开设辅助栅绝缘层过孔，和/或，在所述辅助钝化层开设辅助钝化层过孔而形成。
优选的是，所述非显示区中靠近所述显示区的区域还设置有测试单元，所述测试单元对应设置于与所述辅助单元中所述条状结构对应的分布区域；
所述测试单元包括多个分离设置的、用于与所述薄膜晶体管连接的测试盘，所述测试盘开设有测试过孔。
一种显示装置，包括上述的阵列基板。
本发明的有益效果是：该阵列基板在保持原有功能的基础上，使非显示区布线的差异化消除，减小或消除因外围走线不一致产生的摩擦Mura，进而使摩擦效果一致；
相应的，采用该阵列基板的显示装置具有较好的显示效果。
附图说明
图1为现有技术中阵列基板的非显示区的结构示意图；
图2为本发明实施例1中阵列基板的非显示区的结构示意图；
附图标记中：
1－信号单元；11－条状接线端；12－连接过孔；
2－间隙区域；21－条状结构；22－辅助过孔；
3－测试单元；31－测试盘；32－测试过孔。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对本发明阵列基板以及显示装置作进一步详细描述。
本发明的技术构思在于：经发明人研究发现，在分辨率较低的低端显示装置产品中，摩擦Mura不良不容易显现出来，此时阵列基板周边测试盘(Test Pad)的布线差异产生的影响不明显，并不是摩擦Mura产生的重要因素；而在分辨率较高的高端显示装置产品中，由于分辨率较高，因此阵列基板布线差异成为摩擦Mura不良的主要原因。在此研究基础上，产生摩擦Mura不良的根本原因并不在于摩擦工艺，而是因为显示区的薄膜晶体管阵列和非显示区的外围线路布线设计差异、测试盘过孔而导致摩擦一致性差，成为导致产生摩擦Mura的重要原因。
实施例1：
本实施例提供一种阵列基板，该阵列基板包括显示区以及包围于显示区外围的非显示区，参考图1，非显示区设置有用于连接外部控制信号的信号单元以及未设置信号单元的间隙区域2，其中，间隙区域2内设置有辅助单元，辅助单元与信号单元具有相同的高度且分别电性隔离，辅助单元表面与信号单元的局部表面具有相同的图案。通过将辅助单元的高度与信号单元的高度设置为相同，此时辅助单元起到了整平作用，使得非显示区中间隙区域和信号单元区域具有较好的平坦度，为有效保证摩擦辊轮的摩擦绒布状态的一致性。
如图2所示，信号单元1在非显示区的边缘设置有多个平行排列的条状接线端11；间隙区域2对应位于非显示区的边缘，辅助单元包括多个平行排列的条状结构21，多个条状结构21的排列方向与条状接线端11的排列方向相同，且多个条状结构21之间的间距与信号单元1中多个条状接线端11之间的间距相同。优选的是，多个条状结构21的长度和宽度分别与条状接线端11的长度和宽度对应相等。
在本实施例中，通过在间隙区域2增设与信号单元1对应着边缘条状接线端11具有相同图案的条状结构21，且条状结构21的延伸方向与条状接线端11的延伸方向相同、且与摩擦辊轮的运动方向平行，从而在摩擦辊轮经过边缘区域时能预先形成一致的摩擦绒布的状态(相当于通过条状结构和条状接线端预先进行相同的梳理)，以保证摩擦辊轮对阵列基板后续进入的显示区进行摩擦时具有尽可能相同的状态，保证其对取向层的摩擦效果的一致性。
在该阵列基板中，显示区设置有控制元件(图2中未示出，信号单元1与控制元件和外部控制信号供给单元(图2中未示出)连接，辅助单元与控制元件具有相同的层结构。通常情况下，信号单元1即为绑定IC，通常用于绑定外部控制信号供给单元并向显示区的薄膜晶体管传输外部控制信号，例如柔性线路板FPC作为外部控制信号供给单元。
具体的，控制元件为薄膜晶体管阵列，薄膜晶体管包括栅极、栅绝缘层、有源层、同层设置的源极和漏极、钝化层以及像素电极层，同行/列排列的薄膜晶体管的栅极与同一栅线连接；相应的，辅助单元包括与薄膜晶体管各层对应的辅助栅极层、辅助栅绝缘层、辅助源漏电极层、辅助钝化层以及设置于辅助钝化层之上的辅助像素电极层，辅助单元中的各层的厚度与薄膜晶体管的对应各层的厚度分别相同。在本实施例中，信号单元1包括多层并设置有用于向显示区的薄膜晶体管传输外部控制信号的连接线(例如与栅线或数据线的连接线)；信号单元1中处于底层的信号金属层与薄膜晶体管阵列中连接同一行/列的栅线连接，且采用相同的材料、在同一构图工艺中形成，处于该信号金属层之上的各层图案与该信号金属层的图案相同，且各层与薄膜晶体管中的各层相对应。
优选的是，辅助单元中的各层与薄膜晶体管的各层分别采用相同的材料对应形成，辅助单元中的各层与薄膜晶体管的各层分别对应在同一构图工艺中形成(只需相应地调整形成各层图案时掩模板在对应着非显示区的图案即可)，以进一步简化工艺流程。
为了实现信号单元1与外部控制信号的连接，条状接线端11开设有连接过孔12；相应的，条状结构21在与条状接线端11中连接过孔12相当的位置开设有辅助过孔22，辅助过孔22与连接过孔12具有相同的尺寸和深度，以进一步保证摩擦绒布状态的一致性。
其中，辅助过孔22通过在辅助栅绝缘层开设辅助栅绝缘层过孔，和/或，在辅助钝化层开设辅助钝化层过孔而形成。即，辅助过孔22可以通过在辅助栅绝缘层或辅助钝化层任一层开设过孔而形成，或者，可以在辅助栅绝缘层和辅助钝化层同时开设过孔而形成，只要使得辅助过孔22与连接过孔12具有相同的尺寸和深度即可，这里不做限定。
为了保证产品良率，非显示区中靠近显示区的区域还设置有测试单元，测试单元对应设置于与辅助单元中条状结构21对应的分布区域，即测试单元设置在显示区的外部且位于非显示区的边缘区域的内部的区域，且该区域与条状结构21的排列方向垂直；测试单元包括多个分离设置的、用于与薄膜晶体管连接的测试盘31，例如进行ET点灯测试；该测试盘31开设有测试过孔32，可以将多个阵列基板单元连在一起进行测试，提高测试效率。
在本实施例中的阵列基板，测试盘31与栅极、栅线同层形成，并通过栅绝缘层进行绝缘(为了便于信号传输，其中间开设有测试过孔32)，上述结构虽然与信号单元中的条状接线端11和连接过孔12仍存在差异；但是，由于该阵列基板在设置测试盘31的非显示区的边缘区域相对设置了辅助单元，利用辅助单元中条状结构21和其中的辅助过孔22与条状接线端11和连接过孔12的一致性，在摩擦辊轮经过边缘区域时能预先形成一致的摩擦绒布的状态(相当于通过条状结构和条状接线端预先进行相同的梳理)，能进一步减小摩擦Mura不良。
本实施例提供的阵列基板，提供了一种新的外围非显示区的图案设计，通过在间隙区域设置与信号单元的局部表面具有相同的图案的类长条的辅助单元，在保持原有功能的基础上(即满足原有的ET点灯、绑定等的基础上)，使非显示区布线的差异化消除，减小或消除因外围走线不一致产生的摩擦Mura，进而使摩擦效果一致，对摩擦Mura改善效果明显，使得阵列基板能获得较好取向一致性的取向层，对产品的品质和良品率的提升有很大意义；同时，还能减少对摩擦绒布的影响，延长摩擦绒布的使用寿命，提高了摩擦辊轮中摩擦绒布的利用率，对于产能提升、成本降低、品质改善有很重要的意义。
实施例2：
本实施例提供一种显示装置，包括实施例1中的阵列基板。
该显示装置可以为：液晶面板、电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
该显示装置采用具有较好取向一致性的取向层的阵列基板，因此具有较好的显示效果。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (10)

1.一种阵列基板，包括显示区以及包围于所述显示区外围的非显示区，所述非显示区设置有用于连接外部控制信号的信号单元以及未设置所述信号单元的间隙区域，其特征在于，所述间隙区域内设置有辅助单元，所述辅助单元与所述信号单元具有相同的高度且分别电性隔离，所述辅助单元表面与所述信号单元的局部表面具有相同的图案。
2.根据权利要求1所述的阵列基板，其特征在于，所述信号单元在所述非显示区的边缘设置有多个平行排列的条状接线端；
所述间隙区域对应位于所述非显示区的边缘，所述辅助单元包括多个平行排列的条状结构，多个所述条状结构的排列方向与所述条状接线端的排列方向相同，且多个所述条状结构之间的间距与所述信号单元中多个条状接线端之间的间距相同。
3.根据权利要求2所述的阵列基板，其特征在于，多个所述条状结构的长度和宽度分别与所述条状接线端的长度和宽度对应相等。
4.根据权利要求2所述的阵列基板，其特征在于，所述显示区设置有控制元件，所述信号单元与所述控制元件和外部控制信号供给单元连接，所述辅助单元与所述控制元件具有相同的层结构。
5.根据权利要求4所述的阵列基板，其特征在于，所述控制元件为薄膜晶体管阵列，所述薄膜晶体管包括栅极、栅绝缘层、有源层、同层设置的源极和漏极、钝化层以及像素电极层，同行/列排列的所述薄膜晶体管的栅极与同一栅线连接；
所述辅助单元包括与所述薄膜晶体管各层对应的辅助栅极层、辅助栅绝缘层、辅助源漏电极层、辅助钝化层以及设置于所述辅助钝化层之上的辅助像素电极层，所述辅助单元中的各层的厚度与所述薄膜晶体管的对应各层的厚度分别相同。
6.根据权利要求5所述的阵列基板，其特征在于，所述辅助单元中的各层与所述薄膜晶体管的各层分别采用相同的材料对应形成，所述辅助单元中的各层与所述薄膜晶体管的各层分别对应在同一构图工艺中形成。
7.根据权利要求5所述的阵列基板，其特征在于，所述条状接线端开设有连接过孔；
所述条状结构在与所述条状接线端中所述连接过孔相当的位置开设有辅助过孔，所述辅助过孔与所述连接过孔具有相同的尺寸和深度。
8.根据权利要求7所述的阵列基板，其特征在于，所述辅助过孔通过在所述辅助栅绝缘层开设辅助栅绝缘层过孔，和/或，在所述辅助钝化层开设辅助钝化层过孔而形成。
9.根据权利要求1-8任一项所述的阵列基板，其特征在于，所述非显示区中靠近所述显示区的区域还设置有测试单元，所述测试单元对应设置于与所述辅助单元中所述条状结构对应的分布区域；
所述测试单元包括多个分离设置的、用于与所述薄膜晶体管连接的测试盘，所述测试盘开设有测试过孔。
10.一种显示装置，其特征在于，包括权利要求1-9任一项所述的阵列基板。
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