CN104517910A - 一种防爆的半导体模块 - Google Patents
一种防爆的半导体模块 Download PDFInfo
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Abstract
一种防爆的半导体模块。本发明涉及一种半导体模块(100),其具有载体(2)、安装在所述载体(2)之上的至少一个半导体芯片(1)、金属丝(4)、模块壳体(7)以及第一消声装置(8)。所述模块壳体(7)具有壳体侧壁(71),所述金属丝(4)被设置在所述模块壳体(7)之中;并且所述第一消声装置(8)的至少一个分段被设置在所述半导体芯片(1)和所述壳体侧壁(71)之间。
Description
技术领域
本发明涉及一种半导体模块。
背景技术
在半导体模块的许多应用之中,在模块之内出现的爆炸能够损伤或者至少是污染了该模块所处于的周围环境。此类的爆炸能够例如在如下情形时出现,例如在浪涌电流负载的情况下确定的界限值被超过时。然后例如能够使得构建在半导体模块之中的半导体芯片和/或金属丝爆炸性地蒸发。在极端情况下,该模块壳体释放的导电的等离子。此外,在该模块壳体之中能够产生电弧,由于该电弧的产生将能够蒸发另外的材料并且通过所产生的压力将其从该模块壳体之中甩出。在不利的情况下,所出现的等离子能够在该模块壳体之外引起电短路。
发明内容
本发明的任务在于提供一种半导体模块,其具有好的防爆特性。该任务将通过半导体模块得以解决。本发明的设计方案和改进方案是下文的主题。
依据本发明的半导体模块包括一个载体、至少一个安装在所述载体之上的半导体芯片、一个金属丝、具有壳体侧壁的模块壳体以及第一消声装置。所述金属丝被设置在所述模块壳体之中并且所述第一消声装置或者所述第一消声装置的至少一个分段被设置在所述半导体芯片和所述壳体侧壁之间。
可选地,所述第一消声装置至少在第一方向具有与长度相关的流体阻力r,所述流体阻力大于50kPa·s·m-2和/或小于150kPa·s·m-2。
其中,所述第一方向能够基本上任意地走向,尤其是但是也能够平行于朝向载体的平的半导体底侧。此外,与长度相关的流体阻力的所提及的值域能够不仅在第一方向上,也能够在每个与朝向所述载体的所述半导体芯片的底侧平行的方向上走向。
可选地,所述第一消声装置在第一方向上或者甚至在每个与平的、朝向所述载体的半导体芯片的底侧平行地走向的第一方向上根据DIN EN 29035标准具有在大于250kPa·s·m-2和/或小于4.5kPa·s·m-2的范围内的特定的流体阻力RS。
所述第一消声装置实现了使得在所述模块壳体之内出现的爆炸的缓解并且避免或者至少缓解所引起的描述的影响。
附图说明
下面将借助于多个实施例参照所附的附图来进一步阐述本发明。并无二致地,在这些附图中相同的附图标记描述了相同的或者起相同作用的元件。附图中:
图1示出了穿过半导体模块的一个分段的纵断面,在该半导体模块的壳体之中安置有第一消声装置,该第一消声装置至少部分地处于半导体芯片和壳体侧壁之间;
图2示出了穿过半导体模块的一个分段的纵断面,在该半导体模块之中将沙子引入了该模块壳体之中;
图3示出了穿过半导体模块的一个分段的纵断面,在该半导体模块之中在半导体芯片之上安置有第二消声装置;
图4示出了穿过半导体模块的一个分段的纵断面,在该半导体模块之中该第一消声装置为无纺布(Vlies);
图5示出了穿过依据图4中以B-B切面的整个半导体模块的水平断面;
图6以在图1中所示处的切面A-A示出了半导体模块的放大的分段,该半导体模块具有含有蜂窝结构的第一消声装置,该A-A切面与朝向该载体的半导体芯片的底侧平行地走向。
具体实施方式
图1示出了穿过半导体模块的一个分段的纵断面。该半导体模块100具有一个或者多个半导体芯片1,这些半导体芯片中的每个均安装在载体2之上。
每个半导体芯片1具有第一负载连接端11和第二负载连接端12。第一负载连接端和/或第二负载连接端12能够例如分别被构造为平的芯片金属层,该芯片金属层涂覆在半导体主体10之上。该半导体主体10由任意的半导体基底材料组成,例如硅或者碳化硅,其具有用于实现电子构件的p-掺杂和n-掺杂的半导体区域。此外,在该半导体主体10之中能够集成有不同的介电层,例如由氧化硅、氮化硅等所组成的多个层。
此类的半导体芯片1能够例如为可控的半导体芯片1,在这些半导体芯片之中,电流能够在第一负载连接端11和第二负载连接端12之间所构造的负载段上借助于一个控制连接端(在此未示出)来加以控制。通过此类的控制连接端能够完全地或者部分地打开或者然而截断相应的半导体芯片1的负载段。合适的可控的半导体芯片1的例子为单极或者双极型晶体管,例如IGBT、MOSFET、结型场效应晶体管或者晶闸管。其中第一和第二负载连接端11或12分别根据所涉及的半导体芯片1的类型能够为漏极和源极、源极和漏极、发射极和集电极、集电极和发射极、阳极和阴极或者阴极和阳极。相应地,分别根据半导体芯片1的类型该控制连接端能够为栅极连接端或者基极连接端。然而,半导体芯片1不是必须是可控的。所以,该半导体芯片1也能够为二极管,在该二极管中该第一和第二负载连接端11或12表示阳极和阴极或者阴极和阳极。
在本发明的范围内,接触电极例如金属层被设置为第一负载连接端11、第二负载连接端12以及控制连接端,该金属层被涂覆在半导体主体10之上。这些接触电极在处理所涉及的半导体芯片1时例如在晶圆流水线中处理多个同类的半导体芯片1时被涂覆在该半导体芯片1的半导体主体10之上。
作为半导体芯片1也能够使用竖直的半导体芯片1,在该半导体芯片之中第一负载连接端11和第二负载连接端12被涂覆在该半导体主体10的相互相反的侧上,但是也能够使用横向的半导体芯片1,在该半导体芯片中第一负载连接端11和第二负载连接端12位于该半导体芯片1的相同的侧之上。此外,竖直的半导体芯片1和横向的半导体芯片1也能够在半导体模块100之中混合地加以使用。该多个半导体芯片1中的至少一个能够具有面对载体2的平的底侧1b。
该一个或者多个半导体芯片1安装在载体2之上能够例如借助于连接层来实现,该连接层例如被构造为焊层或者由烧结的金属粉末组成的烧结层或者粘结层。通过该连接层,所涉及的半导体芯片1在其面对载体2的底侧1b上材料连接地与该载体2相连接。其中,该连接层始终被构造在半导体芯片1和载体2之间。
可选地,该连接层能够导电。在粘结连接的情况下,该连接层能够为导电胶。只要该连接层是导电的,那么该半导体芯片1在其第二负载连接端12处与载体2导电地连接,倘若其第二负载连接端12处于其面对载体2的底侧1b之上。
载体2能够例如被构造为金属板或者其能够具有介电的陶瓷小板,在该介电的陶瓷小板之上涂覆有金属层。在该第二负载连接端12和载体2之间为导电连接的情况下,在第二负载连接端12和金属板之间的导电连接能够例如实现在第二负载连接端12和金属层之间。
一个或者多个半导体芯片1被设置在模块壳体7之中,该模块壳体具有至少一个壳体侧壁71。该模块壳体7能够由介电材料组成,例如由硬质塑料、热塑性塑料或陶瓷材料组成。
为了在半导体模块100中实现确定的电子电路而在模块壳体7之中设置一个或者多个金属丝4。原则上来说,金属丝4能够将在该模块壳体7之内的任意部分相互间导电连接。在所示出的示例中,在第一焊接位置B1处至少一个金属丝4被直接地焊接至该半导体芯片1的芯片金属层11之上,该芯片金属层11处于与载体2相对的半导体芯片1的侧之上。在另一个第二焊接位置B2处,金属丝4被直接地焊接至导电的连接板5之上。如图所示,该壳体7能够具有突起72,该突起72从该壳体侧壁71触发延伸到该模块壳体7的内部并且被用作该连接板5的载体。该连接板5被用于使得该半导体模块100朝外接触。在所示出的示例中,导电板能够置于该连接板5的阶梯51之上,该连接板5被用作该半导体模块100的电的外部连接端。
沿着该壳体侧壁71,在半导体芯片1和该壳体侧壁之间和/或在金属丝4和该壳体侧壁71之间设置有消声装置8。该消声装置8用于在该模块壳体71内部出现爆炸的情况下缓解所引起的压力波并且由此阻止该壳体侧壁71撕裂或者被吹走。为了消除由于该爆炸所产生的压力波,第一消声装置8拥有多个中间空间并且由此拥有大的表面积,该表面积用于通过变形来吸收压力波的能量。该第一消声装置8仅仅示意性地加以示出。
第一消声装置8能够例如为开放的聚合物泡沫、或者无纺布、或者矿物棉,例如石棉或者玻璃棉,或者其能够具有蜂窝结构。
为了吸收此类的压力波,第一消声装置8能够具有在第一方向x上的从50kPa·s·m-2至150kPa·s·m-2的与长度相关的流体阻力,该第一方向可选地与该载体2面对的该半导体芯片1的平的底侧2b平行地走向。原则上来说,该第一方向然而也能够任意地加以走向。同样地,该第一消声装置8能够在每个与该载体2面对的该半导体芯片1的平的底侧平行地走向的方向上具有大于50kPa·s·m-2和/或小于150kPa·s·m-2的与长度相关的流体阻力r,只要该第一消声装置8在所涉及的方向上是气体可渗透的。
同样如在图1中示意性地加以示出的那样,第一消声装置8在本发明的范围内也能够可选地具有一个或者多个以气体例如空气加以填充的中间空间81。
只要该第一消声装置8具有蜂窝结构(参见图6)或者被构造为开放的聚合物泡沫,那么该第一消声装置也能够与模块壳体7一体成型地加以构造。
与其实际的设计方案无关地,该第一消声装置8的一个分段在一个或者在每个方向x上被分配在半导体芯片1和壳体侧壁71之间和/或在金属丝4和壳体侧壁71之间,该方向x与面对载体2的芯片底侧1b平行地走向。
此外,该第一消声装置8能够在一个或者在每个与面对载体2的芯片底侧1b平行的方向x上具有至少5mm和/或最高30mm的宽度b8。
为了在模块壳体7内部爆炸的情况下实现较强地缓解压力波,能够在该模块壳体7之中设置沙子6,这在图2中借助于已经参照图1加以阐述的半导体模块100示意性地加以示出。其中,该沙子6能够以垂直于芯片底侧1b的竖直的方向v始终从该半导体芯片1延伸至该金属丝4之上和/或从载体2延伸至该金属丝4之上。在图2中—和在接下来的图3和图4中一样—该金属丝4将由该沙子6来覆盖。因此,其走向仅仅虚线地加以示出。
沙子6能够如此地引入在金属丝4和第一消声装置8之间,使得每个直的平行于芯片底侧1b的从金属丝4走向至第一消声装置8的线段g与沙子6交会。
此外在图3中借助于依据图2的实施例加以示出的是还能够在半导体模块100中设置第二消声装置9,该第二消声装置9被设置在金属丝4与载体2相远离的侧之上。通常来说,该依据图3的半导体模块100拥有相同的结构,如其已经借助于图1和图2加以阐述的那样。第二消声装置9能够由相同的材料组成,如其已经针对第一消声装置8阐述的那样。其中,消声装置的不同的设计方案的任意组合也是可能的。第二消声装置9能够与在该半导体模块100中引入或者没有引入沙子6无关地存在。
只要该半导体模块100具有第二消声装置9并且只要沙子6被引入了模块壳体7之中,那么该沙子6将位于载体2和第二消声装置9之间。
同样地,和第一消声装置8一样,可选的第二消声装置9也能够在至少一个方向上具有长度相关的流体阻力,该流体阻力依照所谓的DIN EN 29035大于50kPa·s·m-2和/或小于150kPa·s·m-2。
图4示出了半导体模块100的一种设计方案,如其已经参照前述的附图加以阐述的那样,其中,第一消声装置8和第二消声装置9分别被构造为无纺布。
图5还示意性地示出了以切面B-B来穿过依据图4的半导体模块100的水平切面。由该图示能够看出,在半导体模块100中第一消声装置8能够被构造为封闭的环,其在模块壳体7内部沿着壳体侧壁71延伸并且被构造为环,并且其中将环地围绕至少一个半导体芯片1和/或(如结合图4得出的那样)至少一个金属丝4。
同样地,图5也引出了该壳体侧壁71能够形成该半导体模块100的外壁。该壳体壁71能够例如被构造为环装,其围绕至少一个半导体芯片1和/或至少一个金属丝4。该壳体侧壁71能够可选地整体地加以构造,或者其能够由两个或者更多个部分组装而成。该半导体模块100不是必须具有如图5所示出的基本上为四边形的底面。相反地,该底面能够形成为任意形状。该底面也能够例如基本上为圆形。
此外,如借助于图1、图2、图3和图4示例性地加以示出的那样,焊接位置B2能够如此地加以设置,使得第一消声装置8的一个分段被设置在焊接位置B2和载体2之间,在该焊接位置B2处金属丝4被焊接至导电的结构之上(在此例如焊接至导电的连接板5之上)。
在整个半导体模块之中,该第一消声装置8具有一个以气体加以填充的中间空间81或者多个以气体加以填充的中间空间81,该第一消声装置8和所有其以气体加以填充的中间空间81一起占据第一空间区域,其具有第一体积V1。相应地,在整个其中沙子6被引入模块壳体7之中的半导体模块中,沙子6仅仅在以气体填充的空气能够找到,其具有第二空间区域,该第二空间区域具有第二体积V2。在此,在第二体积V2和第一体积V1之间的比例V2÷V1可选地处在1至10的范围之内。然而原则上来说,该比例也能够采用更小的或者更大的值。
图6还示出了第一消声装置8在图1中所示出的A-A切面之中的设计方案。该依据图1的半导体模块100的放大的图示基本上示出了第一消声装置也能够具有蜂窝结构。在该所示出的示例中,其为在横截面上具有六边形的蜂窝的蜂窝结构,然而原则上能够为任意其他的蜂窝结构,其具有不规则的或者规则的在横截面上例如三角形或者四边形的蜂窝。同样如从图6中所看出的那样,该蜂窝能够具有平行于竖直的方向v的走向方向。具有蜂窝结构的第一消声装置8也能够应用于本发明的所有其他的设计方案。
相应地,第二消声装置9也能够如其在图3中所阐述的那样具有这样的蜂窝结构。其中,该蜂窝的走向方向能够垂直于竖直的方向v地加以选择。
Claims (20)
1.一种半导体模块,其具有载体(2)、安装在所述载体(2)之上的至少一个半导体芯片(1)、金属丝(4)、模块壳体(7)以及第一消声装置(8),其中,
所述模块壳体(7)具有壳体侧壁(71);
所述金属丝(4)被设置在所述模块壳体(7)之中;以及
所述第一消声装置(8)的至少一个分段被设置在所述半导体芯片(1)和所述壳体侧壁(71)之间。
2.根据权利要求1所述的半导体模块,其中,所述第一消声装置(8):
-被构造为开放的聚合物泡沫;或者
-被构造为无纺布;或者
-由石棉组成;或者
-由玻璃棉组成;或者
具有以上所提及的多个结构中的至少一种。
3.根据权利要求1或2所述的半导体模块,其中,所述第一消声装置(8)至少在第一方向(x)上具有与长度相关的流体阻力(r),所述流体阻力
大于50kPa·s·m-2;和/或
小于150kPa·s·m-2。
4.根据权利要求1或2所述的半导体模块,其中,所述第一消声装置(8)具有蜂窝结构。
5.根据权利要求1或2所述的半导体模块,其中,所述第一消声装置(8)
被构造为开放的聚合物泡沫或者具有开放的聚合物泡沫,其中,所述聚合物泡沫分别被构造为与所述模块壳体(7)一体成型,或者
被构造为蜂窝结构或者具有蜂窝结构,其中,所述蜂窝结构分别被构造为与所述模块壳体(7)一体成型。
6.根据前述权利要求中任一项所述的半导体模块,其中,
所述半导体芯片(1)具有平的芯片底侧(1b),所述芯片底侧朝向所述载体(2);并且
所述第一消声装置(8)在一个或者在每个与所述芯片底侧(1b)平行的方向(x)上被设置在所述半导体芯片(1)和壳体壁(1)之间。
7.根据前述权利要求中任一项所述的半导体模块,其中,
所述半导体芯片(1)具有平的芯片底侧(1b),所述芯片底侧朝向所述载体(2);以及
所述第一消声装置(8)在一个或者在每个与所述芯片底侧(1b)平行的方向(x)上具有至少3mm的宽度(b8)。
8.根据前述权利要求中任一项所述的半导体模块,其中,
所述半导体芯片(1)具有平的芯片底侧(1b),所述芯片底侧朝向所述载体(2);以及
所述第一消声装置(8)在一个或者在每个与所述芯片底侧(1b)平行的方向(x)上具有最高30mm的宽度(b8)。
9.根据前述权利要求中任一项所述的半导体模块,其中,
所述半导体芯片(1)具有平的芯片底侧(1b),所述芯片底侧朝向所述载体(2);以及
所述消声装置(8)的一个分段在与所述芯片底侧(1b)平行的方向(x)上被设置在所述半导体芯片(1)和所述壳体侧壁(71)之间。
10.根据前述权利要求中任一项所述的半导体模块,其中,所述第一消声装置(8)被构造为封闭的环,所述封闭的环围绕所述半导体芯片(1)。
11.根据前述权利要求中任一项所述的半导体模块,其中,所述第一消声装置(8)具有以气体填充的中间空间(81)或者多个以气体填充的中间空间(81)。
12.根据前述权利要求中任一项所述的半导体模块,其中,所述金属丝(4)被焊接至所述半导体芯片(1)。
13.根据前述权利要求中任一项所述的半导体模块,其中,所述半导体芯片(1)在其朝向所述载体(2)的侧(1b)上电导通地与所述载体(2)相连接。
14.根据前述权利要求中任一项所述的半导体模块,其中,在所述模块壳体(7)中设置有沙子(6)。
15.根据权利要求14所述的半导体模块,其中,
所述半导体芯片(1)具有平的芯片底侧(1b),所述芯片底侧朝向所述载体(2);并且
所述沙子(6)以一个与所述芯片底侧(1b)垂直的竖直的方向(v)连续地从所述半导体芯片(1)和/或从所述载体(2)延伸直至超过所述金属丝(4)。
16.根据权利要求14或15中任一项所述的半导体模块,其中,
所述半导体芯片(1)具有平的芯片底侧(1b),所述芯片底侧朝向所述载体(2);并且
与所述芯片底侧(1b)平行的、从所述金属丝走向至所述消声装置(8)的每个直的线段(g)与所述沙子(6)交会。
17.根据权利要求14至16中任一项所述的半导体模块,其中,
所述第一消声装置(8)具有一个以气体填充的中间空间(81)或者多个以气体填充的中间空间(81)并且与整体上以气体来填充的中间空间一起占据第一空间区域,所述第一空间区域具有第一体积(V1);
仅仅有所述沙子(6)位于其中的、以气体填充的空隙占据第二空间区域,所述第二空间区域具有第二体积(V2);
所述第二体积(V2)和所述第一体积(V1)之间的比例(V2÷V1)处在1至10的范围内。
18.根据前述权利要求中任一项所述的半导体模块,其中,所述第一消声装置(8)在所述第一方向(x)上具有在大于250kPa·s·m-2和/或小于4.5kPa·s·m-2的范围内的特定的流体阻力(RS)。
19.根据前述权利要求中任一项所述的半导体模块,其中,
所述金属丝(4)具有焊接位置(B2);并且
所述第一消声装置(8)的一个分段被设置在所述焊接位置(B2)和所述载体(2)之间。
20.根据前述权利要求中任一项所述的半导体模块,其具有第二消声装置(9),所述第二消声装置(9)
被设置在所述金属丝(4)的与所述载体相远离的侧之上;以及
所述第二消声装置具有与长度相关的50kPa·s·m-2至150kPa·s·m-2的流体阻力(r)。
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DE102013219783A1 (de) | 2015-04-02 |
DE102013219783B4 (de) | 2020-04-16 |
US20150091148A1 (en) | 2015-04-02 |
CN104517910B (zh) | 2018-10-19 |
US9214432B2 (en) | 2015-12-15 |
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