CN104516296A - Wakeup method for microcontroller system based on peripheral module and peripheral module - Google Patents
Wakeup method for microcontroller system based on peripheral module and peripheral module Download PDFInfo
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- CN104516296A CN104516296A CN201410828154.XA CN201410828154A CN104516296A CN 104516296 A CN104516296 A CN 104516296A CN 201410828154 A CN201410828154 A CN 201410828154A CN 104516296 A CN104516296 A CN 104516296A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
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Abstract
The invention discloses a wakeup method for a microcontroller system based on a peripheral module and the peripheral module. The method comprises the following steps: under a low power consumption mode, judging whether a signal transmitted by a peripheral bus is an effective signal or not, and if the signal transmitted by the peripheral bus is the effective signal, opening a gated clock circuit to generate a low frequency clock signal; receiving the current signal, detecting the current signal, and if the current signal is detected to be the effective signal of the peripheral module, carrying out the next step; judging whether the current signal accords with wakeup conditions or not, and if the current signal accords with the wakeup conditions, generating wakeup interruption to wake up the microcontroller system. According to the wakeup method for the microcontroller system based on the peripheral module and the peripheral module disclosed by the invention, the gated clock circuit is opened to generate the low frequency clock signal only when the signal transmitted by the peripheral bus is the effective signal, and a clock is completely turned off at other periods of time, so that the system is lower in power consumption.
Description
Technical field
The present invention relates to electronic circuit technology field, particularly relate to a kind of awakening method and peripheral module of the micro controller system based on peripheral module.
Background technology
Micro controller system in the application power consumption is a major issue be concerned about.Usual user in use, in order to reduce the power consumption of system, can it be made to enter into low-power consumption mode after completing sending function system configuration, and low-power consumption mode can allow system power dissipation reach minimum by the means of closing clock.Under low-power consumption mode, if peripheral bus is in work, so likely mistake wake micro controller system make it exit data that low-power consumption mode or loss send to this equipment up.
In recent years, along with the extensive application of Mobile portable equipment, how to reduce the direction of the stand-by power consumption Shi Ge manufacturer pursuit always of equipment as much as possible.Under standby low-power consumption mode, the clock of major part function is all be in closed condition, really this can bring lower power consumption, if but indiscriminate clock of closing under low-power consumption mode is to reduce power consumption, then likely miss the valid data information of peripheral bus, cause receiving function abnormal.Time but equipment is as passive accepting device, be unknown because when peripheral bus sends valid data content, take the mode often opening clock no doubt correctly can receive data, but power consumption can increase a lot.
The mode waking micro controller system under low-power consumption mode up is varied, but is the circuit based on the level of external signal or edge change mostly, once useful signal be detected, and will waken system.The method of this waken system has in bus the arousal function disturbing or often lead to errors when target device non-equipment, allows system be in the running status of higher power dissipation, and the equipment connection mode usually for bus-type topology mode is the most obvious.
Summary of the invention
The object of the invention is to the awakening method and the peripheral module that propose a kind of micro controller system based on peripheral module, this awakening method can solve can lead to errors in existing awakening technology wake the problem making system be in the running status of higher power dissipation up.
For reaching this object, the present invention by the following technical solutions:
First aspect, the invention discloses a kind of awakening method of the micro controller system based on peripheral module, comprising:
Under low-power consumption mode, judge whether the signal that peripheral bus transmits is useful signal, if the signal of described peripheral bus transmission is useful signal, then open door control clock circuit, to produce low-frequency clock signal;
Receive current demand signal, and described current demand signal is detected, if detect that described current demand signal is the useful signal sending to this peripheral module, then perform next step;
Judge whether described current demand signal meets wake-up condition, if described current demand signal meets described wake-up condition, then produce wake-up interrupts, wake micro controller system up.
Further, also comprise:
If detect that described current demand signal is invalid crosstalk signal or the useful signal not sending to this peripheral module, then close described door control clock circuit.
Further, described under low-power consumption mode, before judging whether signal that peripheral bus transmits is useful signal, described method also comprises:
Under system running pattern, judge whether to receive the instruction entering described low-power consumption mode; If so, then close described low-frequency clock signal, if not, then continue system running pattern.
Second aspect, the invention discloses a kind of peripheral module, and described peripheral module can realize above-mentioned arbitrary described awakening method, comprising:
Significant level circuit for detecting, door control clock circuit, signal deteching circuit and wake decision circuitry up,
Described significant level circuit for detecting is connected with described door control clock circuit, and described signal deteching circuit is connected with described decision circuitry of waking up;
Described significant level circuit for detecting is used under low-power consumption mode, judges whether the signal that peripheral bus transmits is useful signal, if the signal of described peripheral bus transmission is useful signal, then opens door control clock circuit, to produce low-frequency clock signal;
Described signal deteching circuit for receiving current demand signal, and detects described current demand signal, if detect that described current demand signal is the useful signal sending to this peripheral module, then wakes up in decision circuitry described in being input to by described current demand signal;
Described decision circuitry of waking up, for judging whether described current demand signal meets wake-up condition, if described current demand signal meets described wake-up condition, then produces wake-up interrupts, wakes micro controller system up.
Further, described signal deteching circuit is connected with described significant level circuit for detecting;
If described signal deteching circuit also for detecting that described current demand signal is invalid crosstalk signal or the useful signal not sending to this peripheral module, notifying described significant level circuit for detecting, closing described door control clock circuit.
Further, described significant level circuit for detecting comprises the first trigger, three value and gate, the first phase inverter and the second phase inverter, and described first trigger comprises the first set end, the first clock end, the first trigger end, the first reset terminal and the first output terminal,
Described first set end is connected with the output terminal of described three value and gate, the output terminal of the peripheral module enable circuits in three input ends difference connected systems of described three value and gate, the low-power consumption mode circuit in system and described first phase inverter, the input end of described first phase inverter connects described peripheral bus;
Described first clock end is connected with the low consumption circuit producing described low-frequency clock signal in system;
Described first trigger end is connected with the output terminal of described second phase inverter, and the input end of described second phase inverter connects described signal deteching circuit;
Described first reset terminal is connected with described peripheral module enable circuits;
Described first output terminal is connected with described door control clock circuit.
Further, described door control clock circuit comprises the second trigger, first or door and first and door, and described second trigger comprises second clock end, the second trigger end and the second output terminal,
Described second clock end is connected for generation of the low consumption circuit of described low-frequency clock signal with system;
Described second trigger end is connected with the output terminal of described first or door, described first or the first input end of door be connected with described significant level circuit for detecting, described first or the second input end of door be connected with the enable control circuit of the clock in system;
Described second output terminal is connected with the first input end of door with described first, and described first is connected with described low consumption circuit with the second input end of door; Described first is connected with described low consumption circuit with the output terminal of door.
The awakening method of the micro controller system based on peripheral module of the present invention and peripheral module only when the signal of peripheral hardware bus transfer is useful signal, just can open door control clock circuit, to produce low-frequency clock signal, make the power consumption that system reaches lower.
Accompanying drawing explanation
In order to the technical scheme of exemplary embodiment of the present is clearly described, one is done to the accompanying drawing used required for describing in embodiment below and simply introduce.Obviously, the accompanying drawing introduced is the accompanying drawing of a part of embodiment that the present invention will describe, instead of whole accompanying drawings, for those of ordinary skill in the art, under the prerequisite not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the process flow diagram of the awakening method of the micro controller system based on peripheral module that the embodiment of the present invention one provides.
Fig. 2 is the structural drawing of the peripheral module that the embodiment of the present invention two provides.
Fig. 3 is the structural drawing of the significant level circuit for detecting of the peripheral module that the embodiment of the present invention two provides.
Fig. 4 is the structural drawing of the door control clock circuit of the peripheral module that the embodiment of the present invention two provides.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly, below with reference to the accompanying drawing in the embodiment of the present invention, by embodiment, technical scheme of the present invention is intactly described.Obviously; described embodiment is a part of embodiment of the present invention, instead of whole embodiments, based on embodiments of the invention; the every other embodiment that those of ordinary skill in the art obtain under the prerequisite not making creative work, all falls within protection scope of the present invention.
Embodiment one:
Fig. 1 is the process flow diagram of the awakening method of the micro controller system based on peripheral module that the embodiment of the present invention one provides.As shown in Figure 1, this awakening method comprises:
Step 101, under low-power consumption mode, judge whether the signal that peripheral bus transmits is useful signal, if the signal of peripheral bus transmission is useful signal, then perform following steps:
In this step, in real time the signal of peripheral hardware bus transfer is judged.Judging whether the signal that peripheral bus transmits is in the process of useful signal, do not needing to use low-frequency clock signal.
Step 102, open door control clock circuit, to produce low-frequency clock signal.
In this step, produce low-frequency clock signal, so that current demand signal can be received.
Step 103, reception current demand signal.
In this step, receive the current demand signal that the useful signal of peripheral bus transmission is corresponding.
Step 104, current demand signal to be detected.If detect that current demand signal is the useful signal sending to this peripheral module, then perform following steps:
Step 105, judge whether current demand signal meets wake-up condition.If current demand signal meets wake-up condition, then perform step 106, produce wake-up interrupts, wake micro controller system up.
Preferably, further comprising the steps of:
If detect that current demand signal is invalid crosstalk signal or the useful signal not sending to this peripheral module, then perform step 115, close door control clock circuit.
In this step, close door control clock circuit, thus low-frequency clock signal is closed.This makes while achieving arousal function, reduces the stand-by power consumption of micro controller system as much as possible.
Preferably, further comprising the steps of:
If the signal of peripheral bus transmission is not useful signal, then perform step 141, system cloud gray model low-power consumption mode.
In this step, under low-power consumption mode, if the signal of peripheral bus transmission is not useful signal, then system continues to run low-power consumption mode.
Preferably, further comprising the steps of before step 141, system cloud gray model low-power consumption mode:
Step 111, under system running pattern, judge whether to receive the instruction entering low-power consumption mode.If so, then perform step 121, close low-frequency clock signal; If not, then perform step 131, continue system running pattern.
In this step, after entering low-power consumption mode, judge whether the signal that peripheral bus transmits is that useful signal process does not need to use low-frequency clock signal.So the low-frequency clock signal of closedown in a flash before system enters low-power consumption mode, reduce system power dissipation as much as possible.
Preferably, in step 121 except closing low-frequency clock signal, also high frequency clock signal can be closed.
The awakening method of the micro controller system based on peripheral module that the embodiment of the present invention one provides, only when the signal of peripheral hardware bus transfer is useful signal, just can open door control clock circuit, to produce low-frequency clock signal, makes the power consumption that system reaches lower.
Embodiment two:
Fig. 2 is the structural drawing of the peripheral module that the embodiment of the present invention two provides.The peripheral module that the embodiment of the present invention two provides can realize the awakening method described in the embodiment of the present invention one.As shown in Figure 2, this peripheral module comprises: significant level circuit for detecting 201, door control clock circuit 202, signal deteching circuit 203 and wake decision circuitry 204 up, significant level circuit for detecting 201 is connected with door control clock circuit 202, signal deteching circuit 203 with wake decision circuitry 204 up and be connected.
Significant level circuit for detecting 201, under low-power consumption mode, judges whether the signal that peripheral bus 205 transmits is useful signal, if the signal of peripheral bus transmission is useful signal, then opens door control clock circuit 202, to produce low-frequency clock signal.
In the present embodiment, after system enters low-power consumption mode, significant level circuit for detecting 201 is started working, when the signal that peripheral bus 205 transmits is useful signal, significant level circuit for detecting 201 puts 1 by asynchronous for low-power consumption mode clock enable signal, and sends door control clock circuit 202 to, and door control clock circuit 202 now can low consumption circuit 206 in control system, low-frequency clock signal is enable, make signal deteching circuit 203 enter running status by clock signal.Be low-frequency clock signal due to what now open, the power consumption correspondingly producing the low consumption circuit 206 of low-frequency clock signal is lower, therefore the power consumption of the peripheral module that the present embodiment two provides in the process of waken system is lower.When the signal that peripheral bus 205 transmits is not useful signal, low-frequency clock signal is still in closed condition.Significant level circuit for detecting 201 is judging whether the signal that peripheral bus 205 transmits is in the process of useful signal, does not need low-frequency clock circuit.
In the present embodiment, in the normal mode of operation of system, namely under system running pattern, low consumption circuit 206 in system and high power digital circuit 207 all normally work, correspondingly, low-frequency clock signal and high frequency clock signal are all in the state opened, and now significant level circuit for detecting 201 only controls by the low-power consumption mode circuit 208 in system, now do not work, low-power consumption mode clock enable signal is invalid.Door control clock circuit 202 is only subject to the enable control signal control of clock that the clock enable control circuit 209 in system produces.System enter low-power consumption mode before in a flash low-frequency clock signal and high frequency clock signal are closed.
Signal deteching circuit 203 for receiving current demand signal, and detects current demand signal, if detect that current demand signal is the useful signal sending to this peripheral module, is then input to by current demand signal and wakes up in decision circuitry 204.
Waking decision circuitry 204 up for judging whether current demand signal meets wake-up condition, if current demand signal meets wake-up condition, then producing wake-up interrupts, waking micro controller system up.
In the present embodiment, if current demand signal meets wake-up condition, so wake decision circuitry 204 up and can put 1 by waking up low-power consumption mode signal, and send the system wake-up circuit 210 in system to, make system exit low-power consumption mode and get back to normal mode of operation, be i.e. system running pattern.
Preferably, signal deteching circuit 203 is connected with significant level circuit for detecting 201.
If signal deteching circuit 203 is also for detecting that current demand signal is invalid crosstalk signal or the useful signal not sending to this peripheral module, notice significant level circuit for detecting 201, closes door control clock circuit 202.
In the present embodiment, it is an invalid crosstalk signal or for not sending to the useful signal of this peripheral module if current, low-power consumption mode clock can be removed enable signal and put 1 by signal deteching circuit 203 under the driving of low-frequency clock signal, after level circuit for detecting 201 receives this low-power consumption mode clock removing enable signal, will by low-power consumption mode clock enable signal synchronously clear 0, door control clock circuit is finally made to close, and then control low consumption circuit 206 closes low-frequency clock signal, system is made to get back to low-power consumption mode, it is minimum that this makes the power consumption of system drop to, if current demand signal is the useful signal sending to this peripheral module, after above-mentioned flow process, low-power consumption mode clock removing enable signal can set to 0 by signal deteching circuit 203, such low-frequency clock signal would not be closed and peripheral bus 206 send to the signal of this peripheral module will be received normally, this ensure that the reception of signal, can not cause loss of data.
Fig. 3 is the structural drawing of the significant level circuit for detecting of the peripheral module that the embodiment of the present invention two provides.Preferably, as shown in Figure 3, significant level circuit for detecting 201 comprises the first trigger 211, three value and gate 221, first phase inverter 231 and the second phase inverter 241, and described first trigger 211 comprises the first set end Set1, the first clock end Clk1, the first trigger end D1, the first reset terminal Reset1 and the first output terminal Q1.
First set end Set1 is connected with the output terminal of three value and gate 221, the output terminal of the peripheral module enable circuits 301 in three input ends difference connected systems of three value and gate 221, the low-power consumption mode circuit 208 in system and the first phase inverter 231, the input end of the first phase inverter 231 connects peripheral bus 205.
First clock end Clk1 is connected with the low consumption circuit 206 producing low-frequency clock signal in system.
First trigger end D1 is connected with the output terminal of the second phase inverter 241, the input end connection signal testing circuit 203 of the second phase inverter 241.
First reset terminal Reset1 is connected with peripheral module enable circuits 301.
First output terminal Q1 is connected with door control clock circuit 202.
In the present embodiment, when peripheral module is enable and after entering low-power consumption mode, low-frequency clock signal is closed.After the signal of peripheral bus 205 transmission is low level signal, the first output terminal Q1 of the first trigger 211 is asynchronous puts 1, and makes the enable low-frequency clock signal of door control clock circuit 202, and the first trigger 211 enters synchronous driving condition.The system reset default value of enable signal removed by low-power consumption mode clock is 0, and therefore the synchronous resize first trigger end D1 of the first trigger holds and asynchronous set first set end Set1 holds and is 1, can not form competition.
Fig. 4 is the structural drawing of the door control clock circuit of the peripheral module that the embodiment of the present invention two provides.As shown in Figure 4, door control clock circuit 202 comprises the second trigger 212, first or door 222 and first and door 232, and described second trigger 212 comprises second clock end Clk2, the second trigger end D2 and the second output terminal Q2,
Second clock end Clk2 is connected with the low consumption circuit 206 for generation of low-frequency clock signal in system.
Second trigger end D2 is connected with the output terminal of first or door 222, first or the first input end of door 222 be connected with significant level circuit for detecting 201, first or the second input end of door 222 be connected with the enable control circuit 209 of the clock in system.
Second output terminal Q2 is connected with the first input end of door 232 with first, and first is connected with low consumption circuit 206 with the second input end of door 232; First is connected with low consumption circuit 206 with the output terminal of door 232.
In the present embodiment, system is in normal mode of operation, and namely under system running pattern, the enable control signal of clock of peripheral module is effective, and door control clock circuit 202 meeting output low frequency clock carrys out the low consumption circuit 206 in drive system.After system and peripheral module enter low-power consumption mode, the enable control signal of clock is invalid, and now whether the output low frequency clock of door control clock circuit 202 only depends on low-power consumption mode clock enable signal.
The peripheral module that the embodiment of the present invention two provides only when the signal of peripheral hardware bus transfer is useful signal, just can open door control clock circuit, to produce low-frequency clock signal, makes the power consumption that system reaches lower.When being made up of multiple stage peripheral module in the device network of bus-type, the peripheral module of the message reference of peripheral bus transmission just has larger probability not to be this peripheral module of access, for peripheral bus this peripheral module is exactly invalid signals, when the peripheral module that the embodiment of the present invention two provides wakes micro controller system in this environment up, power consumption can be lower.
The know-why that above are only preferred embodiment of the present invention and use.The invention is not restricted to specific embodiment described here, the various significant changes can carried out for a person skilled in the art, readjust and substitute all can not depart from protection scope of the present invention.Therefore, although be described in further detail invention has been by above embodiment, the present invention is not limited only to above embodiment, when not departing from the present invention's design, can also comprise other Equivalent embodiments more, and scope of the present invention is determined by the scope of claim.
Claims (7)
1. based on an awakening method for the micro controller system of peripheral module, it is characterized in that, comprising:
Under low-power consumption mode, judge whether the signal that peripheral bus transmits is useful signal, if the signal of described peripheral bus transmission is useful signal, then open door control clock circuit, to produce low-frequency clock signal;
Receive current demand signal, and described current demand signal is detected, if detect that described current demand signal is the useful signal sending to this peripheral module, then perform next step;
Judge whether described current demand signal meets wake-up condition, if described current demand signal meets described wake-up condition, then produce wake-up interrupts, wake micro controller system up.
2. awakening method according to claim 1, is characterized in that, also comprises:
If detect that described current demand signal is invalid crosstalk signal or the useful signal not sending to this peripheral module, then close described door control clock circuit.
3. awakening method according to claim 1 and 2, is characterized in that, described under low-power consumption mode, and before judging whether signal that peripheral bus transmits is useful signal, described method also comprises:
Under system running pattern, judge whether to receive the instruction entering described low-power consumption mode; If so, then close described low-frequency clock signal, if not, then continue system running pattern.
4. a peripheral module, described peripheral module can realize the arbitrary described awakening method of claim 1-3, it is characterized in that, comprising:
Significant level circuit for detecting, door control clock circuit, signal deteching circuit and wake decision circuitry up,
Described significant level circuit for detecting is connected with described door control clock circuit, and described signal deteching circuit is connected with described decision circuitry of waking up;
Described significant level circuit for detecting is used under low-power consumption mode, judges whether the signal that peripheral bus transmits is useful signal, if the signal of described peripheral bus transmission is useful signal, then opens door control clock circuit, to produce low-frequency clock signal;
Described signal deteching circuit for receiving current demand signal, and detects described current demand signal, if detect that described current demand signal is the useful signal sending to this peripheral module, then wakes up in decision circuitry described in being input to by described current demand signal;
Described decision circuitry of waking up, for judging whether described current demand signal meets wake-up condition, if described current demand signal meets described wake-up condition, then produces wake-up interrupts, wakes micro controller system up.
5. peripheral module according to claim 4, is characterized in that, described signal deteching circuit is connected with described significant level circuit for detecting;
If described signal deteching circuit also for detecting that described current demand signal is invalid crosstalk signal or the useful signal not sending to this peripheral module, notifying described significant level circuit for detecting, closing described door control clock circuit.
6. peripheral module according to claim 5, it is characterized in that, described significant level circuit for detecting comprises the first trigger, three value and gate, the first phase inverter and the second phase inverter, described first trigger comprises the first set end, the first clock end, the first trigger end, the first reset terminal and the first output terminal
Described first set end is connected with the output terminal of described three value and gate, the output terminal of the peripheral module enable circuits in three input ends difference connected systems of described three value and gate, the low-power consumption mode circuit in system and described first phase inverter, the input end of described first phase inverter connects described peripheral bus;
Described first clock end is connected with the low consumption circuit producing described low-frequency clock signal in system;
Described first trigger end is connected with the output terminal of described second phase inverter, and the input end of described second phase inverter connects described signal deteching circuit;
Described first reset terminal is connected with described peripheral module enable circuits;
Described first output terminal is connected with described door control clock circuit.
7. peripheral module according to claim 5, is characterized in that, described door control clock circuit comprises the second trigger, first or door and first and door, and described second trigger comprises second clock end, the second trigger end and the second output terminal,
Described second clock end is connected for generation of the low consumption circuit of described low-frequency clock signal with system;
Described second trigger end is connected with the output terminal of described first or door, described first or the first input end of door be connected with described significant level circuit for detecting, described first or the second input end of door be connected with the enable control circuit of the clock in system;
Described second output terminal is connected with the first input end of door with described first, and described first is connected with described low consumption circuit with the second input end of door; Described first is connected with described low consumption circuit with the output terminal of door.
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| CN113454723A (en) * | 2021-05-25 | 2021-09-28 | 长江存储科技有限责任公司 | Method and apparatus for power saving in semiconductor devices |
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