CN105426338A - I2C wake-up MCU circuit and wake-up method - Google Patents
I2C wake-up MCU circuit and wake-up method Download PDFInfo
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- CN105426338A CN105426338A CN201510727584.7A CN201510727584A CN105426338A CN 105426338 A CN105426338 A CN 105426338A CN 201510727584 A CN201510727584 A CN 201510727584A CN 105426338 A CN105426338 A CN 105426338A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0016—Inter-integrated circuit (I2C)
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
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- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
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- Software Systems (AREA)
- Communication Control (AREA)
Abstract
The present invention discloses an I2C wake-up MCU circuit and a wake-up method. The circuit comprises an I2C communication module, an I2C address receiving module, an address matching circuit, an interrupt control module, a clock gating module, and an MCU controller. After the I2C address receiving module receives an address of a host, the address is transmitted to the address matching circuit; the address received by the I2C is matched with an I2C address of the MCU, and if there is a match, an interrupt is generated; the interrupt is sent to the interrupt control module; then the MCU controller is woken up; after the MCU is woken up, a clock is turned on by using the clock gating module; a system resumes normal operation and the address matching interrupt is cleared; and I2C communication begins.
Description
Technical field
The invention belongs to the technical field of electric energy metrical, the computing method of particularly a kind of electric energy shunt running and control device.
Background technology
Along with the development of electronic technology, the performance of electronic product is more and more stronger, power consumption also increases thereupon, and battery capacity does not significantly promote, therefore also more and more higher to the power consumption control Capability Requirement of electronic product, the application of deep sleep mode gets more and more, and how effective being waken up by equipment becomes a problem.
Control multiple from the application of equipment for existence main equipment by I2C communication port, as shown in Figure 1, when main equipment initiating communication, allly can to receive from equipment, if from equipment adopt edge wake up or level change wake up, then allly all can be waken up from equipment, at this moment system power dissipation increases greatly.
Such as, patented claim 201410634643.1 discloses a kind of awakening method and device of terminal device, which provide a kind of awakening method and device of terminal device, described terminal device comprises the first address information, wherein, described method comprises: when described terminal device is in standby mode, receives packet; Judge whether described packet is wakeup packet; If described packet is wakeup packet, then judge that whether described first address information is consistent with the second address information; Described wakeup packet comprises the second address information; If described first address information is consistent with described second address information, then controls described terminal device and enter power on mode.The embodiment of the present invention, in order to when being waken up from standby mode by terminal device, breaks away from the dependence to telepilot.
So current awakening mode is needed badly and is improved, to reduce power consumption.
Summary of the invention
For solving the problem, the object of the present invention is to provide a kind of I2C to wake MCU circuit and awakening method up, this circuit is waken up specifically from the mode of machine by I2C, allly in can effectively avoiding once communicating all is waken up from machine, thus reduces system power dissipation.
For achieving the above object, technical scheme of the present invention is as follows.
A kind of I2C wakes MCU circuit up, it includes I2C communication module, it is characterized in that this circuit includes I2C address accept module, address matcher circuit, interruption control module, Clock gating module and MCU controller, described I2C communication module keeps communicating with main frame by I2C bus with I2C address accept module, and I2C address accept module is connected to again I2C communication module and address matcher circuit; After I2C address accept module receives the address of main frame, by address transfer to address matcher circuit, the address that I2C is received and the I2C address of MCU, be also provided with interruption control module between address matcher circuit and MCU controller, above-mentioned matching addresses then produces interruption; Interruption control module is delivered in interruption, then wakes MCU controller up, and MCU controller is connected with Clock gating module, and Clock gating module is connected to again I2C communication module; After MCU is waken up, open clock by Clock gating module, System recover normally works, and removes matching addresses interruption, starts I2C communication module and starts to carry out I2C communication.
Main frame is in normal mode of operation, when being in deep sleep mode from machine MCU, is closed by all clocks from machine MCU controller by Clock gating module, does not work owing to not having clock I2C communication module.
But, now I2C address accept module does not need clock still can receiver address, by judging START condition to SCL (clock signal), SDA (data-signal) signal, when SDA negative edge, SCL is high level, for initial conditions, then represent that communication starts, and when SDA rising edge, SCL is high, for stop condition, then represent sign off.
After receiving initial conditions, next start receiver address, after receiver address completes, address matcher circuit is delivered in the address received by I2C address accept module.The I2C address of the address that I2C receives by address matcher circuit and MCU compares, and matching addresses then produces interruption, otherwise does not produce interruption.
Interruption control module is delivered in the interruption that address matcher circuit produces, and then wakes MCU controller up.After MCU controller is waken up, open clock by Clock gating module, System recover normally works, and removes matching addresses interruption, starts to carry out I2C communication.
In the normal mode of operation, the I2C address accept module from machine can be closed, before penetration depth sleep pattern, the I2C address accept module from machine is opened.
Therefore, wake MCU circuit up for this I2C, its awakening method realized comprises the steps:
101, receiver address, the address that I2C address accept module Receiving Host is sent;
102, matching addresses, address matcher circuit is delivered in the address received by I2C address accept module, and the I2C address of the address that I2C receives by address matcher circuit and MCU controller compares;
103, produce interruption, the I2C matching addresses of the address received and MCU controller is then produced interruption by described I2C address accept module, otherwise does not produce interruption;
104, wake MUC up, interrupt delivering to interruption control module, then wake MCU controller up;
105, resume work, MCU controller oversampling clock gating module opens clock, and System recover normally works, and removes matching addresses interruption, starts I2C communication module and starts to carry out I2C communication.
In described 101 steps, I2C address accept module judges SCL (clock signal) signal, SDA (data-signal) signal, judges whether to reach initial conditions.
Further, when SDA negative edge, SCL is high level, is initial conditions, then represent that communication starts, and when SDA rising edge, SCL is high, is stop condition, then represents sign off.
Like this, the present invention, by the address accept to main frame, wakes up from machine, accurately can judge and wake up corresponding from machine, and can not cause false wake-up, effectively providing and wake efficiency up, greatly reduce system energy consumption.
Accompanying drawing explanation
Fig. 1 is the structural representation that prior art is implemented.
Fig. 2 is the structural representation that the present invention implements.
Fig. 3 is that the I2C that the present invention implements wakes judgement schematic diagram up.
Fig. 4 is the schematic diagram of the reception data that the present invention implements.
Fig. 5 be the present invention implement wake process flow diagram up.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
Please refer to shown in Fig. 2, a kind of I2C that the present invention implements wakes MCU circuit up, it includes I2C communication module, I2C address accept module, address matcher circuit, interruption control module, Clock gating module and MCU controller, described I2C communication module keeps communicating with main frame by I2C bus with I2C address accept module, and I2C address accept module is connected to again I2C communication module and address matcher circuit; After I2C address accept module receives the address of main frame, by address transfer to address matcher circuit, the address that I2C is received and the I2C address of MCU, be also provided with interruption control module between address matcher circuit and MCU controller, above-mentioned matching addresses then produces interruption; Interruption control module is delivered in interruption, then wakes MCU controller up, and MCU controller is connected with Clock gating module, and Clock gating module is connected to again I2C communication module; After MCU is waken up, open clock by Clock gating module, System recover normally works, and removes matching addresses interruption, starts I2C communication module and starts to carry out I2C communication.
Main frame is in normal mode of operation, when being in deep sleep mode from machine MCU, is closed by all clocks from machine MCU controller by Clock gating module, does not work owing to not having clock I2C communication module.
But, now I2C address accept module does not need clock still can receiver address, by judging START condition to SCL (clock signal), SDA (data-signal) signal, as shown in Figure 3, when SDA negative edge, SCL is high level, then represent that communication starts, and when SDA rising edge, SCL is high, then represent sign off.
After receiving initial conditions, next start receiver address, as shown in Figure 4, in the rising edge sampled data of SCL, first 7 is address, and in like manner, 10 bit address also can equally receive.After receiver address completes, matching addresses module is delivered in the address received by I2C address accept module.
The I2C address of the address that I2C receives by matching addresses module and MCU compares, and matching addresses then produces interruption, otherwise does not produce interruption.
Interruption control module is delivered in the interruption that matching addresses module produces, and then wakes MCU up.After MCU is waken up, open clock by Clock gating module, System recover normally works, and removes matching addresses interruption, starts to carry out I2C communication.
In the normal mode of operation, the I2C address accept module from machine can be closed, before penetration depth sleep pattern, the I2C address accept module from machine is opened.
Therefore, MCU circuit is waken up for this I2C, its awakening method realized as shown in Figure 5, when being in deep sleep mode from machine MCU, all clocks are closed from machine MCU controller by Clock gating module, but now I2C address accept module does not need clock still can receiver address, specifically comprises the steps:
101, receiver address, the address that I2C address accept module Receiving Host is sent; I2C address accept module judges SCL (clock signal) signal, SDA (data-signal) signal, judges whether to reach initial conditions.
When SDA negative edge, SCL is high level, is initial conditions, then represent that communication starts, and when SDA rising edge, SCL is high, is stop condition, then represents sign off.
102, matching addresses, address matcher circuit is delivered in the address received by I2C address accept module, and the I2C address of the address that I2C receives by address matcher circuit and MCU controller compares.
103, produce interruption, the I2C matching addresses of the address received and MCU controller is then produced interruption by described I2C address accept module, otherwise does not produce interruption.
104, wake MUC up, interrupt delivering to interruption control module, then wake MCU controller up.
105, resume work, MCU controller oversampling clock gating module opens clock, and System recover normally works, and removes matching addresses interruption, starts I2C communication module and starts to carry out I2C communication.
Like this, the present invention, by the address accept to main frame, wakes up from machine, accurately can judge and wake up corresponding from machine, and can not cause false wake-up, effectively providing and wake efficiency up, greatly reduce system energy consumption.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.
Claims (4)
1. an I2C wakes MCU circuit up, it includes I2C communication module, it is characterized in that this circuit includes I2C address accept module, address matcher circuit, interruption control module, Clock gating module and MCU controller, described I2C communication module keeps communicating with main frame by I2C bus with I2C address accept module, and I2C address accept module is connected to again I2C communication module and address matcher circuit; After I2C address accept module receives the address of main frame, by address transfer to address matcher circuit, the address that I2C is received and the I2C address of MCU, be also provided with interruption control module between address matcher circuit and MCU controller, above-mentioned matching addresses then produces interruption; Interruption control module is delivered in interruption, then wakes MCU controller up, and MCU controller is connected with Clock gating module, and Clock gating module is connected to again I2C communication module; After MCU is waken up, open clock by Clock gating module, System recover normally works, and removes matching addresses interruption, starts I2C communication module and starts to carry out I2C communication.
2. I2C wakes an awakening method for MCU circuit up, it is characterized in that the method comprises the steps:
101, receiver address, the address that I2C address accept module Receiving Host is sent;
102, matching addresses, address matcher circuit is delivered in the address received by I2C address accept module, and the I2C address of the address that I2C receives by address matcher circuit and MCU controller compares;
103, produce interruption, the I2C matching addresses of the address received and MCU controller is then produced interruption by described I2C address accept module, otherwise does not produce interruption;
104, wake MUC up, interrupt delivering to interruption control module, then wake MCU controller up;
105, resume work, MCU controller oversampling clock gating module opens clock, and System recover normally works, and removes matching addresses interruption, starts I2C communication module and starts to carry out I2C communication.
3. I2C as claimed in claim 2 wakes the awakening method of MCU circuit up, it is characterized in that, in described 101 steps, I2C address accept module judges SCL signal, SDA signal, judges whether to reach initial conditions.
4. I2C as claimed in claim 3 wakes the awakening method of MCU circuit up, and it is characterized in that, when SDA negative edge, SCL is high level, is initial conditions, then represent that communication starts, and when SDA rising edge, SCL is high, is stop condition, then represents sign off.
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| CN201510727584.7A CN105426338A (en) | 2015-10-30 | 2015-10-30 | I2C wake-up MCU circuit and wake-up method |
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Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108563598A (en) * | 2018-03-02 | 2018-09-21 | 上海芯导电子科技有限公司 | A kind of I from wake-up2C communication architecture systems |
| CN108628793A (en) * | 2017-03-20 | 2018-10-09 | 华大半导体有限公司 | SPI communication circuit and method |
| CN110865959A (en) * | 2018-08-27 | 2020-03-06 | 上海途擎微电子有限公司 | Method and circuit for waking up I2C equipment |
| CN111316252A (en) * | 2017-11-02 | 2020-06-19 | 德州仪器公司 | Digital bus activity monitor |
| CN111522757A (en) * | 2020-04-23 | 2020-08-11 | 上海琪云工业科技有限公司 | I2C bus-based interrupt reading and clearing control method |
| CN112148662A (en) * | 2020-08-17 | 2020-12-29 | 上海赛昉科技有限公司 | Low-power-consumption chip architecture awakened by I2C address matching and awakening method |
| CN112214246A (en) * | 2019-07-11 | 2021-01-12 | 深圳市航顺芯片技术研发有限公司 | Low-power-consumption multiprocessor serial port awakening method and system |
| CN112434773A (en) * | 2020-10-29 | 2021-03-02 | 北京中电华大电子设计有限责任公司 | Design method of multi-interface chip low power consumption mode |
| FR3100349A1 (en) * | 2019-08-28 | 2021-03-05 | STMicroelectronics (Grand Ouest) SAS | Communication on I2C bus |
| CN112540943A (en) * | 2020-11-16 | 2021-03-23 | 北京中电华大电子设计有限责任公司 | Circuit structure and method for preventing I2C interface from mistakenly waking up SOC (system on chip) |
| CN112948312A (en) * | 2021-04-19 | 2021-06-11 | 深圳市航顺芯片技术研发有限公司 | Chip control method and device, intelligent terminal and computer readable storage medium |
| CN113824623A (en) * | 2021-09-17 | 2021-12-21 | 辰海微电(苏州)半导体有限公司 | Low-power-consumption asynchronous communication mechanism |
| CN114328351A (en) * | 2021-12-23 | 2022-04-12 | 西安芯海微电子科技有限公司 | MCU wake-up circuit, method and electronic equipment |
-
2015
- 2015-10-30 CN CN201510727584.7A patent/CN105426338A/en active Pending
Cited By (23)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108628793B (en) * | 2017-03-20 | 2021-04-02 | 华大半导体有限公司 | SPI communication circuit and method |
| CN108628793A (en) * | 2017-03-20 | 2018-10-09 | 华大半导体有限公司 | SPI communication circuit and method |
| US11809348B2 (en) | 2017-11-02 | 2023-11-07 | Texas Instruments Incorporated | Digital bus activity monitor |
| CN111316252A (en) * | 2017-11-02 | 2020-06-19 | 德州仪器公司 | Digital bus activity monitor |
| CN111316252B (en) * | 2017-11-02 | 2024-03-01 | 德州仪器公司 | Digital bus activity monitor |
| CN108563598A (en) * | 2018-03-02 | 2018-09-21 | 上海芯导电子科技有限公司 | A kind of I from wake-up2C communication architecture systems |
| CN110865959A (en) * | 2018-08-27 | 2020-03-06 | 上海途擎微电子有限公司 | Method and circuit for waking up I2C equipment |
| CN110865959B (en) * | 2018-08-27 | 2021-10-15 | 武汉杰开科技有限公司 | Method and circuit for waking up I2C equipment |
| US11157290B2 (en) | 2018-08-27 | 2021-10-26 | Autochips Wuhan Co., Ltd. | Method and circuit for waking up I2C device |
| CN112214246A (en) * | 2019-07-11 | 2021-01-12 | 深圳市航顺芯片技术研发有限公司 | Low-power-consumption multiprocessor serial port awakening method and system |
| FR3100349A1 (en) * | 2019-08-28 | 2021-03-05 | STMicroelectronics (Grand Ouest) SAS | Communication on I2C bus |
| US11580052B2 (en) | 2019-08-28 | 2023-02-14 | STMicroelectronics (Grand Ouest) SAS | I2C communication |
| CN111522757A (en) * | 2020-04-23 | 2020-08-11 | 上海琪云工业科技有限公司 | I2C bus-based interrupt reading and clearing control method |
| CN111522757B (en) * | 2020-04-23 | 2023-08-22 | 上海琪云工业科技有限公司 | Interrupt reading and clearing control method based on I2C bus |
| CN112148662A (en) * | 2020-08-17 | 2020-12-29 | 上海赛昉科技有限公司 | Low-power-consumption chip architecture awakened by I2C address matching and awakening method |
| CN112148662B (en) * | 2020-08-17 | 2024-02-09 | 上海赛昉科技有限公司 | Low-power-consumption chip architecture and wake-up method by using I2C address matching wake-up |
| CN112434773A (en) * | 2020-10-29 | 2021-03-02 | 北京中电华大电子设计有限责任公司 | Design method of multi-interface chip low power consumption mode |
| CN112540943B (en) * | 2020-11-16 | 2023-10-10 | 北京中电华大电子设计有限责任公司 | Circuit structure and method for preventing I2C interface from waking up SOC system by mistake |
| CN112540943A (en) * | 2020-11-16 | 2021-03-23 | 北京中电华大电子设计有限责任公司 | Circuit structure and method for preventing I2C interface from mistakenly waking up SOC (system on chip) |
| CN112948312A (en) * | 2021-04-19 | 2021-06-11 | 深圳市航顺芯片技术研发有限公司 | Chip control method and device, intelligent terminal and computer readable storage medium |
| CN113824623A (en) * | 2021-09-17 | 2021-12-21 | 辰海微电(苏州)半导体有限公司 | Low-power-consumption asynchronous communication mechanism |
| CN114328351A (en) * | 2021-12-23 | 2022-04-12 | 西安芯海微电子科技有限公司 | MCU wake-up circuit, method and electronic equipment |
| CN114328351B (en) * | 2021-12-23 | 2024-06-11 | 西安芯海微电子科技有限公司 | MCU wake-up circuit, method and electronic equipment |
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Application publication date: 20160323 |