CN102799550B - Based on the waking up of chip chamber high-speed interface HSIC, hot-plug method and equipment - Google Patents
Based on the waking up of chip chamber high-speed interface HSIC, hot-plug method and equipment Download PDFInfo
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- CN102799550B CN102799550B CN201210208398.9A CN201210208398A CN102799550B CN 102799550 B CN102799550 B CN 102799550B CN 201210208398 A CN201210208398 A CN 201210208398A CN 102799550 B CN102799550 B CN 102799550B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3215—Monitoring of peripheral devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3253—Power saving in bus
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate
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Abstract
The embodiment of the present invention provides a kind of based on the waking up of chip chamber high-speed interface HSIC, hot-plug method and equipment.One method comprises: main frame obtains and is in idle condition with the external unit that described main frame is connected by chip chamber high-speed interface HSIC bus; Described main frame is in dormant state; Described main frame receives from the signal wire be connected with described external unit the look-at-me that described external unit sends; Described main frame, according to described look-at-me, wakes up from described dormant state.Realize main frame and external unit waking up and hot plug based on HSIC bus, realize saving equipment electric energy.
Description
Technical field
The present invention relates to infotech, particularly relate to a kind of based on the waking up of chip chamber high-speed interface HSIC, hot-plug method and equipment.
Background technology
At present, chip chamber high-speed interface (HighSpeedInter-Chip, HSIC) adopts chip chamber to connect (Inter-ChipConnectivity, ICC) technology, USB2.0 agreement can be realized transmit between short distance, the software compatibility that analogy USB2.0 connects can also be possessed.
In prior art, the host chip of employing HSIC interface and peripheral hardware chips welding are in same veneer, and two chips power on simultaneously, power down simultaneously, make equipment power consumption larger.
Summary of the invention
The embodiment of the present invention provides a kind of based on the waking up of chip chamber high-speed interface HSIC, hot-plug method and equipment, saves equipment electric energy.
On the one hand, the embodiment of the present invention provides a kind of awakening method based on chip chamber high-speed interface HSIC, comprising:
Main frame obtains and is in idle condition with the external unit that described main frame is connected by chip chamber high-speed interface HSIC bus;
Described main frame is in dormant state;
Described main frame receives from the signal wire be connected with described external unit the look-at-me that described external unit sends;
Described main frame, according to described look-at-me, wakes up from described dormant state.
The embodiment of the present invention also provides a kind of awakening method based on chip chamber high-speed interface HSIC, comprising:
The operational order of user is received by the external unit that chip chamber high-speed interface HSIC bus is connected with main frame;
Described external unit sends look-at-me by the signal wire be connected with described main frame to described main frame, wakes up from dormant state to make described main frame.
On the other hand, the embodiment of the present invention also provides a kind of hot-plug method based on chip chamber high-speed interface HSIC, comprising:
Main frame obtains and is in idle condition with the external unit that described main frame is connected by chip chamber high-speed interface HSIC bus, or when main frame needs to control external unit power-off according to the demand of business; External unit power-off described in described host computer control;
Described in described host computer control, HSIC bus enters original state, to wait for that described external unit powers on;
Described in described host computer control, external unit powers on.
On the other hand, the embodiment of the present invention provides a kind of main frame, comprising:
Chip chamber high-speed interface HSIC interface, is connected with external unit by HSIC bus;
Level change interface, is connected with described external unit by signal wire, for receiving the look-at-me that described external unit sends;
Processor, idle condition is in for obtaining described external unit, described main frame is in dormant state, and described level change interface receives the look-at-me of described external unit transmission from described signal wire, then control described main frame according to described look-at-me and wake up from dormant state.
The embodiment of the present invention provides a kind of external unit, comprising:
Chip chamber high-speed interface HSIC interface, is connected with main frame by HSIC bus;
Level change interface, is connected with described main frame by signal wire, under the control of described processor, produces look-at-me, and described look-at-me is sent to described external unit by described signal wire;
Processor, for receiving the operational order of user, controlling described level change interface and producing described look-at-me.
On the other hand, the embodiment of the present invention also provides a kind of main frame, comprising:
Chip chamber high-speed interface HSIC interface, is connected with external unit by HSIC bus;
Processor, is in idle condition for obtaining described external unit, or when needing to control external unit power-off according to the demand of business, controls described external unit power-off; Control described HSIC bus and enter original state, to wait for that described external unit powers on; Control described external unit to power on.
The embodiment of the present invention provides a kind of terminal, comprise: main frame and external unit, described main frame and described external unit comprise by chip chamber high speed HSIC interface, the HSIC interface of described main frame is connected by HSIC bus with the HSIC interface of described external unit, described main frame and described external unit comprise the interface that can produce level change, and the level change interface of described main frame is changed interface with the level of described external unit and is connected by signal wire.
The awakening method based on chip chamber high-speed interface HSIC that the embodiment of the present invention provides and equipment, idle condition is in the external unit that main frame is connected by HSIC bus when main frame obtains, then main frame in the dormant state, after receiving from the signal wire be connected with external unit the look-at-me that external unit sends, can according to described look-at-me, wake up from described dormant state, thus realize main frame and external unit waking up based on HSIC bus, realize the electric energy of saving equipment.
The hot-plug method based on chip chamber high-speed interface HSIC that the embodiment of the present invention provides and equipment, when obtain with main frame by the external unit that HSIC bus is connected be in idle condition or main frame need to control external unit power-off according to business demand time, main frame can control external unit power-off, thus realize the hot plug of external unit, save the electric energy of equipment.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the process flow diagram of the awakening method embodiment based on chip chamber high-speed interface HSIC provided by the invention;
Fig. 2 is the process flow diagram of another embodiment of awakening method based on chip chamber high-speed interface HSIC provided by the invention;
Fig. 3 is the process flow diagram of another embodiment of awakening method based on chip chamber high-speed interface HSIC provided by the invention;
Fig. 4 is the process flow diagram of the hot-plug method embodiment based on chip chamber high-speed interface HSIC provided by the invention;
Fig. 5 is the process flow diagram of another embodiment of hot-plug method based on chip chamber high-speed interface HSIC provided by the invention;
Fig. 6 is the structural representation of a main frame provided by the invention embodiment;
Fig. 7 is the structural representation of an external unit provided by the invention embodiment;
Fig. 8 is the structural representation of another embodiment of main frame provided by the invention;
Fig. 9 is the structural representation of this wireless terminal provided by the invention embodiment.
Embodiment
For making the object of the embodiment of the present invention, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
The main frame related in the embodiment of the present invention, can be personal computer, mobile phone, PAD, wireless router or USB (universal serial bus) (UniversalSerialBUS, USB) CPU (central processing unit) (CentralProcessingUnit, CPU) in the various terminal such as modulator-demodular unit.External unit can be the peripheral hardware chips such as Wireless Fidelity (WirelessFidelity, WiFi) chip module, bluetooth module, camera module.
Fig. 1 is the process flow diagram of the awakening method embodiment based on chip chamber high-speed interface HSIC provided by the invention, and as shown in Figure 1, the method comprises:
S101, main frame are obtained the external unit connected by chip chamber high-speed interface (HighSpeedInter-Chip, HSIC) bus with main frame and are in idle condition.
S102, main frame are in dormant state.
S103, main frame receive from the signal wire be connected with described external unit the look-at-me that described external unit sends.
S104, main frame, according to look-at-me, wake up from dormant state.
The main frame related in the present embodiment and external unit can comprise HighSpeedInter-Chip(and be called for short HSIC) interface, the HSIC interface of main frame is connected by HSIC bus with the HSIC interface of external unit, wherein, main frame and external unit can also comprise interface (such as GeneralPurposeInputOutput(the is called for short GPIO) interface or interrupt interface that can produce level change), the interface of the level change of main frame can be connected by signal wire with the interface that the level of external unit changes, this signal wire can be made up of the signal wire of two-way communication between a main frame to external unit, also can be made up of to the signal wire in main frame direction to the signal wire in external unit direction and peripheral hardware a main frame.Signal wire can be universal input/output (GeneralPurposeInputOutput, GPIO) signal wire, also can be that other can produce the signal wire of level change.
Wherein, external unit is in idle condition and can refers to: external unit does not have user to use, and waits for the scene of user, also can refer to the scene of the utilization rate of external unit lower than certain thresholding.
Main frame can acquire external unit by detection and be in idle condition, or, when external unit is in idle condition, also can by be used to indicate be in idle condition message active reporting to main frame.
After main frame acquisition external unit is in idle condition, main frame can by HSIC bus suspension (suspend), and to make HSIC bus stop data transmission, afterwards, main frame can enter dormant state.Wherein, main frame can have multiple dormant state, and for example, under one implements scene, main frame can be in power-down state, and all software does not all run, and internal memory is in self-refresh state; Under another kind implements scene, main frame can be in slow clock status.How to be in dormant state to main frame in the embodiment of the present invention not limit.
After external unit is in idle condition, dormant state can be entered.As a kind of feasible embodiment, after main frame acquisition external unit is in idle condition, external unit can be controlled and enter dormant state, for example, main frame can control external unit by software command and enter dormant state, can also control external unit enter dormant state by existing various method.As the embodiment that another kind is feasible, external unit, after HSIC bus suspension being detected, can enter dormant state.Wherein, external unit can have multiple dormant state, and for example, external unit can be in low power consumpting state, and under this state, external unit is battery saving mode, but can respond user operation.Such as: this external unit of wifi chip can reduce power in the dormant state, signaling frame elongates, and can respond user's access.
Main frame is in the process of dormant state, and external unit can send look-at-me by the signal wire be connected with main frame to main frame, and this look-at-me can be high level signal, also can be low level signal.Main frame can wake up from dormant state, after main frame is waken up, namely can be in normal mode of operation after receiving the look-at-me of external unit transmission.
After host wake-up, HSIC bus can be recovered (resume) to normal operating conditions from suspended state, transmit to make HSIC bus recovery data.
Under the enforcement scene that external unit is in dormant state, after HSIC bus is returned to normal operating conditions from suspended state by main frame, HSIC bus recovery data are transmitted, and external unit can wake up from dormant state.Concrete, after the transmission of HSIC bus recovery data, can adopt the resume agreement in HSIC agreement that external unit can be waken up from dormant state.
As a kind of feasible embodiment, main frame is by after HSIC bus suspension, and main frame first can also preserve the current state of HSIC controller, then enters dormant state.Under this enforcement scene, after main frame wakes up according to the look-at-me that external unit sends, first can recover HSIC controller according to the state of the HSIC be saved, then by the HSIC bus recovery of hang-up to normal operating conditions.
As the embodiment that another kind is feasible, main frame is by after HSIC bus suspension, and main frame can preserve the current state of HSIC controller, and the power-off of control HSIC bus, afterwards, main frame enters dormant state again.Under this enforcement scene, after main frame wakes up according to the look-at-me that external unit sends, can first control HSIC bus to power on, then according to the state of recovering state HSIC controller of the HSIC controller preserved, then by the HSIC bus recovery hung up to normal operating conditions.
Wherein, after HSIC bus recovery to normal operating conditions, external unit can enter normal duty from dormant state.
The awakening method based on chip chamber high-speed interface HSIC that the present embodiment provides, idle condition is in the external unit that main frame is connected by HSIC bus when main frame obtains, then main frame in the dormant state, after receiving from the signal wire be connected with external unit the look-at-me that external unit sends, can according to described look-at-me, wake up from described dormant state, thus realize main frame and external unit waking up based on HSIC bus, realize the electric energy of saving equipment.
Fig. 2 is the process flow diagram of another embodiment of awakening method based on chip chamber high-speed interface HSIC provided by the invention, and as Fig. 2, the method comprises:
S201, to be received the operational order of user by the external unit that chip chamber high-speed interface HSIC bus is connected with main frame;
S202, external unit send look-at-me by the signal wire be connected with main frame to main frame, wake up from dormant state to make main frame.
After external unit receives the operational order of user, look-at-me can be sent by the signal wire be connected with main frame to main frame, thus realize waking based on HSIC bus the main frame being in dormant state up.
It should be noted that, above-mentioned external unit receives the operational order of user, can refer to that external unit is in the enforcement scene of dormant state, also can refer to that external unit is in the enforcement scene of normal operating conditions, that is, the present invention sends look-at-me to main frame in what state for external unit and does not make restriction.
Implement under scene in one, when external unit is in idle condition, such as: external unit does not have user to use, wait for the scene of user, or, under the utilization rate of the external unit scene lower than certain thresholding.External unit can enter dormant state under the control of main frame; Or external unit the HSIC bus suspension be connected with main frame being detected, then can enter dormant state.
Under external unit is in dormant state enforcement scene, after main frame is waken up by the look-at-me that external unit sends, HSIC bus can be returned to normal operating conditions from suspended state by main frame.And external unit in HSIC bus from after suspended state returns to normal operating conditions, can wake up from dormant state.
The awakening method based on chip chamber high-speed interface HSIC that the present embodiment provides, be connected with main frame by chip chamber high-speed interface HSIC bus, when receiving the operational order of user, look-at-me can be sent to main frame by the signal wire be connected with main frame, wake up from dormant state to make main frame, thus realize main frame and external unit waking up based on HSIC bus, thus realize the electric energy saving external unit.
Fig. 3 is the process flow diagram of another embodiment of awakening method based on chip chamber high-speed interface HSIC provided by the invention, and as Fig. 3, present embodiments provide main frame and peripheral hardware and implement scene based on the dormancy of HSIC bus and of waking up, the method comprises:
S301, main frame obtain and are in idle condition with the external unit that main frame is connected by chip chamber high-speed interface HSIC bus.
S302, main frame, by HSIC bus suspension, stop data transmission to make HSIC bus.
The current state of HSIC controller preserved by S303, main frame.
S304, the power-off of host computer control HSIC bus.
Wherein, HSIC controller carries out the operations such as HSIC protocol processes usually, and the current state of HSIC controller device preserved by main frame, can recover current state after powering in order to HSIC bus.
S305, main frame enter dormant state.
S306, external unit detect HSIC bus suspension.
S307, external unit enter dormant state.
For example, access point (AccessPoint, the AP) module of external unit WiFi module can enter standby dormant state, waits for that user accesses, to save the electrical source consumption of WiFi module.
S308, external unit receive the operational order of user.
S309, external unit send look-at-me by signal wire to main frame.
After main frame enters standby dormant state, the look-at-me produced can be changed by the level on the signal wire between response external equipment and main frame.
When there being user operation external unit, such as, user is by access external unit WiFi chip, then external unit can send a look-at-me by signal wire to main frame and carrys out wake-up master.
S310, main frame wake up from dormant state.
S311, host computer control HSIC bus power on.
S312, main frame are according to the state of the recovering state HSIC controller of the HSIC controller preserved.
HSIC bus is returned to normal operating conditions from suspended state by S313, main frame, and to make HSIC bus recovery data transmit, external unit wakes up from dormant state.
Wherein, S304 and the S311 in above-mentioned steps can be optional step.
The awakening method based on chip chamber high-speed interface HSIC that the present embodiment provides, main frame is after acquisition external unit is in idle condition, and main frame by HSIC bus suspension, and can enter dormant state.After external unit detects HSIC bus suspension, also dormant state can be entered.After external unit receives the operational order of user, external unit can by carrying out wake-up master with the signal wire be connected between main frame to main frame transmitting terminal signal, thus realize external unit and main frame based on the dormancy of HSIC bus with wake up, realize saving equipment energy consumption.
Fig. 4 is the process flow diagram of the hot-plug method embodiment based on chip chamber high-speed interface HSIC provided by the invention, and as shown in Figure 4, the method comprises:
S401, main frame obtain and are in idle condition with the external unit that main frame is connected by chip chamber high-speed interface HSIC bus, or main frame needs to control external unit power-off according to the demand of business.
S402, the power-off of host computer control external unit.
S403, host computer control HSIC bus enter original state, to wait for that external unit powers on.
S404, host computer control external unit power on.
Between the main frame related in the present embodiment and external unit, can be connected by HSIC bus.
Wherein, external unit is in idle condition and can refers to: external unit does not have user to use, and waits for the scene of user, also can refer to the scene of the utilization rate of external unit lower than certain thresholding.Main frame can acquire external unit by direct-detection and be in idle condition, or, when external unit is in idle condition, also can by be used to indicate be in idle condition message active reporting to main frame.
In the present embodiment, external unit can have independently supply module, or external unit can have independently supply line.Main frame obtains external unit and is in idle condition, or, when main frame needs to control external unit power-off according to the demand of business, such as: know in the process of main frame and external device communication that external unit occurs that exception etc. implements scene, then main frame can control external unit power-off.For example, the supply module that main frame can control external unit stops external device powering, or main frame can the supply line of disconnecting external equipment, to make external unit power-off.
After the power-off of host computer control external unit, main frame control HSIC bus can enter original state, to wait for that external unit powers on.The HSIC bus entering original state, when external unit to power on access next time, can identify external unit, thus ensure the proper communication between main frame and external unit.Wherein, host computer control HSIC bus enters original state, can be specifically that control HSIC controller reinitializes, enter original state to realize HSIC bus.
As a kind of feasible embodiment, after host computer control HSIC bus enters original state, main frame can also preserve the current state of HSIC controller, then enters dormant state, to reduce the power consumption of main frame.Under this enforcement scene, after host wake-up, can according to the recovering state HSIC buffer status of HSIC register preserved, then control external unit and power on.
As the embodiment that another kind is feasible, after host computer control HSIC bus enters original state, main frame can preserve the current state of HSIC controller, the power-off of control HSIC bus.Afterwards, main frame can enter dormant state, to reduce the power consumption of main frame.Under this enforcement scene, after host wake-up, control HSIC bus can power on, according to the recovering state HSIC buffer status of HSIC register preserved, then control external unit and power on.
The hot-plug method based on chip chamber high-speed interface HSIC that the present embodiment provides, when obtain with main frame by the external unit that HSIC bus is connected be in idle condition or main frame need to control external unit power-off according to business demand time, main frame can control external unit power-off, thus realize the hot plug of external unit, save the electric energy of equipment.
Fig. 5 is the process flow diagram of another embodiment of hot-plug method based on chip chamber high-speed interface HSIC provided by the invention, and as shown in Figure 5, present embodiments provide main frame and peripheral hardware and implement scene based on HSIC bus one of realizing hot plug, the method comprises:
S501, main frame obtain and are in idle condition with the external unit that main frame is connected by chip chamber high-speed interface HSIC bus, or when main frame needs to control external unit power-off according to the demand of business.
S502, the power-off of host computer control external unit.
S503, host computer control HSIC bus enter original state, to wait for that external unit powers on.
The current state of HSIC controller preserved by S504, main frame.
S505, the power-off of host computer control HSIC bus.
S506, main frame enter dormant state.
S507, main frame are waken up by dormant state.
S508, host computer control HSIC bus power on.
S509, main frame are according to the recovering state HSIC buffer status of the HSIC register preserved.
S510, host computer control external unit power on.
Need the scene reused at external unit under, main frame can power on by controlling external unit.After external unit powers on, HSIC bus can detect the connection of external unit, and normally can enumerate external unit.Thus realize the warm connection function of HSIC interface.
The hot-plug method based on chip chamber high-speed interface HSIC that the present embodiment provides, main frame can under external unit be in idle shape scene, or main frame can control external unit power-off according to business demand, to save electric energy.Main frame control HSIC bus can also enter original state, so that after external unit powers on, HSIC bus can identify external unit, thus realizes HSIC interface and supports hot plug, save equipment electric energy.
Fig. 6 is the structural representation of a main frame provided by the invention embodiment, and as shown in Figure 6, this main frame comprises: HSIC interface 11, level change interface 12 and processor 13;
Chip chamber high-speed interface HSIC interface 11, is connected with external unit by HSIC bus;
Level change interface 12, is connected with external unit by signal wire, for receiving the look-at-me that external unit sends;
Processor 13, be in idle condition for obtaining external unit, main frame is in dormant state, and level change interface receives the look-at-me of external unit transmission from signal wire, then wake up from dormant state according to look-at-me main control system.
Optionally, processor 13 can also be used for: after acquisition external unit is in idle condition, controls external unit and enters dormant state.
Further or optional, before main frame is in dormant state, processor 13 can also be used for: by HSIC bus suspension, stops data transmission to make HSIC bus.
Further or optional, processor 13, by after HSIC bus suspension, can also be used for the current state of preserving HSIC controller, the power-off of control HSIC bus.
Further or optional, processor 13 is according to look-at-me, and main control system, from after dormant state is waken up, can also be used for control HSIC bus and power on, according to the state of the recovering state HSIC controller of the HSIC controller preserved.
Further or optional, processor 13 is according to after the state of the recovering state HSIC controller of the HSIC controller preserved, HSIC bus can also be used for return to normal operating conditions from suspended state, and to make HSIC bus recovery data transmit, external unit wakes up from dormant state.
The main frame that the embodiment of the present invention provides, corresponding with the awakening method based on chip chamber high-speed interface HSIC that the embodiment of the present invention provides, for the actuating equipment of the awakening method based on chip chamber high-speed interface HSIC, its perform based on the awakening method of chip chamber high-speed interface HSIC process can see Fig. 1 of the present invention and embodiment illustrated in fig. 3 in associated description, do not repeat them here.
The main frame that the present embodiment provides, when acquisition is in idle condition with the external unit that main frame is connected by HSIC bus, then main frame in the dormant state, after receiving from the signal wire be connected with external unit the look-at-me that external unit sends, can according to described look-at-me, wake up from described dormant state, thus realize main frame and external unit waking up based on HSIC bus, realize the electric energy of saving equipment.
Fig. 7 is the structural representation of an external unit provided by the invention embodiment, and as shown in Figure 7, this external unit comprises: HSIC interface 21, level change interface 22 and processor 23;
Chip chamber high-speed interface HSIC interface 21, is connected with main frame by HSIC bus;
Level change interface 22, is connected with main frame by signal wire, produces look-at-me under the control of a processor, and look-at-me is sent to external unit by signal wire;
Processor 23, for receiving the operational order of user, control level change interface produces look-at-me.
Optionally, processor 22 can also be used for: external unit is in idle condition, controls external unit and enter dormant state under the control of main frame; Or external unit is in idle condition, HSIC bus suspension detected, control external unit and enter dormant state.
Further or optional, after external unit enters dormant state, processor 23 can also be used for: in HSIC bus from after suspended state returns to normal operating conditions, control external unit and wake up from dormant state.
The external unit that the embodiment of the present invention provides, corresponding with the awakening method based on chip chamber high-speed interface HSIC that the embodiment of the present invention provides, for the actuating equipment of the awakening method based on chip chamber high-speed interface HSIC, its perform based on the awakening method of chip chamber high-speed interface HSIC process can see Fig. 2 of the present invention and embodiment illustrated in fig. 3 in associated description, do not repeat them here.
The external unit that the present embodiment provides, be connected with main frame by chip chamber high-speed interface HSIC bus, when receiving the operational order of user, look-at-me can be sent to main frame by the signal wire be connected with main frame, wake up from dormant state to make main frame, thus realize main frame and external unit waking up based on HSIC bus, thus realize the electric energy saving external unit.
Fig. 8 is the structural representation of another embodiment of main frame provided by the invention, and as shown in Figure 8, this main frame comprises: HSIC interface 31 and processor 32;
Chip chamber high-speed interface HSIC interface 31, is connected with external unit by HSIC bus;
Processor 32, is in idle condition for obtaining external unit, or when needing to control external unit power-off according to the demand of business, controls external unit power-off; Control HSIC bus enters original state, to wait for that external unit powers on; Control external unit powers on.
Optionally, processor 32 control HSIC bus enters original state and is specially: control HSIC controller reinitializes.
Further or optional, after processor 32 control HSIC bus enters original state, before main frame enters dormant state, processor is also for the current state of preserving HSIC controller; The power-off of control HSIC bus.
Further or optional, after host wake-up, before processor control external unit powers on, processor 32 can also be used for: control HSIC bus powers on; According to the recovering state HSIC buffer status of the HSIC register preserved.
The main frame that the embodiment of the present invention provides, corresponding with the dormancy hot plug based on chip chamber high-speed interface HSIC that the embodiment of the present invention provides, for the actuating equipment of the hot-plug method based on chip chamber high-speed interface HSIC, its perform based on the hot-plug method of chip chamber high-speed interface HSIC process can see Fig. 4 of the present invention and embodiment illustrated in fig. 5 in associated description, do not repeat them here.
The main frame that the present embodiment provides, when obtain with main frame by the external unit that HSIC bus is connected be in idle condition or main frame need to control external unit power-off according to business demand time, main frame can control external unit power-off, thus realizes the hot plug of external unit, saves the electric energy of equipment.
Fig. 9 is the structural representation of a wireless terminal provided by the invention embodiment, and as shown in Figure 9, this terminal can comprise: main frame 41 and external unit 42;
Main frame and external unit comprise by chip chamber high speed HSIC interface, the HSIC interface of main frame is connected by HSIC bus with the HSIC interface of external unit, main frame and external unit comprise the interface that can produce level change, and the level change interface of main frame is changed interface with the level of external unit and is connected by signal wire.
Optionally, the interface of level change can be universal input/output GPIO interface, or interrupt interface.
Further or optional, when external unit is in idle condition, main frame can by HSIC bus suspension, and main frame is in dormant state.
Further or optional, after main frame receives the look-at-me of external unit transmission by signal wire, main frame can wake up from dormant state.
Further or optional, when external unit is in idle condition, main frame can control external unit dormancy; Or
External unit detects HSIC bus state, if HSIC bus is in suspended state, external unit can be in dormant state.
Further or optional, main frame is by after HSIC bus suspension, and main frame can preserve the current state of HSIC controller, and main frame can the power-off of control HSIC bus.
Further or optional, main frame is from after dormant state is waken up, and main frame can control HSIC bus power on, and main frame according to the state of the recovering state HSIC controller of the HSIC controller preserved, can recover HSIC bus, wake external unit up.
Further or optional, Host Detection, to when being in idle condition with main frame by the external unit that chip chamber high-speed interface HSIC bus is connected, can control external unit power-off, and main frame control HSIC bus can enter original state.
Wherein, wireless terminal can be wireless router, mobile phone or USB Modem.
The terminal that the embodiment of the present invention provides, comprising main frame and the concrete structure of external unit and function see the embodiment of main frame provided by the invention and external unit, can not repeat them here.
The terminal that the embodiment of the present invention provides, idle condition is in the external unit that main frame is connected by HSIC bus when main frame obtains, then main frame in the dormant state, after receiving from the signal wire be connected with external unit the look-at-me that external unit sends, can according to described look-at-me, wake up from described dormant state, thus realize main frame and external unit waking up based on HSIC bus, realize the electric energy of saving equipment.When obtain with main frame by the external unit that HSIC bus is connected be in idle condition or main frame need to control external unit power-off according to business demand time, main frame can control external unit power-off, thus realizes the hot plug of external unit, the electric energy of saving equipment.
It should be noted that, main frame in above-described embodiment and external unit can comprise HighSpeedInter-Chip(and be called for short HSIC) interface, the HSIC interface of main frame is connected by HSIC bus with the HSIC interface of external unit, wherein, main frame and external unit can also comprise interface (such as GeneralPurposeInputOutput(the is called for short GPIO) interface that can produce level change, or interrupt interface), the interface of the level change of main frame can be connected by signal wire with the interface that the level of external unit changes.
Those skilled in the art can be well understood to, for convenience and simplicity of description, only be illustrated with the division of above-mentioned each functional module, in practical application, can distribute as required and by above-mentioned functions and be completed by different functional modules, inner structure by device is divided into different functional modules, to complete all or part of function described above.The system of foregoing description, the specific works process of device and unit, with reference to the corresponding process in preceding method embodiment, can not repeat them here.
In several embodiments that the application provides, should be understood that disclosed apparatus and method can realize by another way.Such as, device embodiment described above is only schematic, such as, the division of described module or unit, be only a kind of logic function to divide, actual can have other dividing mode when realizing, such as multiple unit or assembly can in conjunction with or another system can be integrated into, or some features can be ignored, or do not perform.Another point, shown or discussed coupling each other or direct-coupling or communication connection can be by some interfaces, and the indirect coupling of device or unit or communication connection can be electrical, machinery or other form.
The described unit illustrated as separating component or can may not be and physically separates, and the parts as unit display can be or may not be physical location, namely can be positioned at a place, or also can be distributed in multiple network element.Some or all of unit wherein can be selected according to the actual needs to realize the object of the present embodiment scheme.
In addition, each functional unit in each embodiment of the application can be integrated in a processing unit, also can be that the independent physics of unit exists, also can two or more unit in a unit integrated.Above-mentioned integrated unit both can adopt the form of hardware to realize, and the form of SFU software functional unit also can be adopted to realize.
If described integrated unit using the form of SFU software functional unit realize and as independently production marketing or use time, can be stored in a computer read/write memory medium.Based on such understanding, the part that the technical scheme of the application contributes to prior art in essence in other words or all or part of of this technical scheme can embody with the form of software product, this computer software product is stored in a storage medium, comprising some instructions in order to make a computer equipment (can be personal computer, server, or the network equipment etc.) or processor (processor) perform all or part of step of method described in each embodiment of the application.And aforesaid storage medium comprises: USB flash disk, portable hard drive, ROM (read-only memory) (ROM, Read-OnlyMemory), random access memory (RAM, RandomAccessMemory), magnetic disc or CD etc. various can be program code stored medium.
The above, above embodiment only in order to the technical scheme of the application to be described, is not intended to limit; Although with reference to previous embodiment to present application has been detailed description, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein portion of techniques feature; And these amendments or replacement, do not make the essence of appropriate technical solution depart from the spirit and scope of each embodiment technical scheme of the application.
Claims (31)
1. based on an awakening method of chip chamber high-speed interface HSIC, it is characterized in that, comprising:
Main frame obtains and is in idle condition with the external unit that described main frame is connected by chip chamber high-speed interface HSIC bus;
Described main frame is in dormant state;
Described main frame receives from the signal wire be connected with described external unit the look-at-me that described external unit sends;
Described main frame, according to described look-at-me, wakes up from described dormant state.
2. method according to claim 1, is characterized in that, described main frame acquisition and described main frame also comprise after being in idle condition by the external unit that chip chamber high-speed interface HSIC bus is connected:
Described in described host computer control, external unit enters dormant state.
3. method according to claim 1 and 2, is characterized in that, described main frame also comprises before being in dormant state:
Described main frame, by described HSIC bus suspension, stops data transmission to make described HSIC bus.
4. method according to claim 3, is characterized in that, described main frame, by after described HSIC bus suspension, also comprises:
The current state of HSIC controller preserved by described main frame;
HSIC bus power-off described in described host computer control.
5. method according to claim 4, is characterized in that, described main frame, according to described look-at-me, after described dormant state is waken up, also comprises:
Described in described host computer control, HSIC bus powers on;
The state of described main frame HSIC controller according to the recovering state of the described HSIC controller preserved.
6. method according to claim 5, is characterized in that, after the state of described main frame HSIC controller according to the recovering state of the described HSIC controller preserved, also comprises:
Described HSIC bus is returned to normal operating conditions from suspended state by described main frame, and to make described HSIC bus recovery data transmit, described external unit wakes up from dormant state.
7. based on an awakening method of chip chamber high-speed interface HSIC, it is characterized in that, comprising:
The operational order of user is received by the external unit that chip chamber high-speed interface HSIC bus is connected with main frame;
Described external unit sends look-at-me by the signal wire be connected with described main frame to described main frame, wakes up from dormant state to make described main frame.
8. method according to claim 7, is characterized in that, described receive the operational order of user by the external unit that chip chamber high-speed interface HSIC bus is connected with main frame before, also comprise:
Described external unit is in idle condition;
Described external unit enters dormant state under the control of described main frame; Or described external unit detects described HSIC bus suspension, and described external unit enters dormant state.
9. method according to claim 8, is characterized in that, described external unit also comprises after entering dormant state:
Described external unit, wakes up from after suspended state returns to normal operating conditions from dormant state in described HSIC bus.
10. based on a hot-plug method of chip chamber high-speed interface HSIC, it is characterized in that, comprising:
Main frame obtains and is in idle condition with the external unit that described main frame is connected by chip chamber high-speed interface HSIC bus, or when main frame needs to control external unit power-off according to the demand of business;
External unit power-off described in described host computer control;
Described in described host computer control, HSIC bus enters original state, to wait for that described external unit powers on;
Described in described host computer control, external unit powers on.
11. methods according to claim 10, is characterized in that, described in described host computer control, HSIC bus enters original state, comprising:
Described host computer control HSIC controller reinitializes.
12. methods according to claim 11, is characterized in that, after described in described host computer control, HSIC bus enters original state, before described main frame enters dormant state, also comprise:
The current state of HSIC controller preserved by described main frame;
HSIC bus power-off described in described host computer control.
13. methods according to claim 11 or 12, is characterized in that, after described host wake-up, before external unit powers on described in described host computer control, also comprise:
Described in described host computer control, HSIC bus powers on;
Described main frame is HSIC controller state according to the recovering state of the described HSIC controller preserved.
14. 1 kinds of main frames, is characterized in that, comprising:
Chip chamber high-speed interface HSIC interface, is connected with external unit by HSIC bus;
Level change interface, is connected with described external unit by signal wire, for receiving the look-at-me that described external unit sends;
Processor, idle condition is in for obtaining described external unit, described main frame is in dormant state, and described level change interface receives the look-at-me of described external unit transmission from described signal wire, then control described main frame according to described look-at-me and wake up from dormant state.
15. main frames according to claim 14, is characterized in that, described processor also for: after described external unit is in idle condition in acquisition, controls described external unit and enter dormant state.
16. main frames according to claims 14 or 15, is characterized in that, before described main frame is in dormant state, described processor also for: by described HSIC bus suspension, stop data transmission to make described HSIC bus.
17. main frames according to claim 16, is characterized in that, described processor, by after described HSIC bus suspension, also for preserving the current state of HSIC controller, controls the power-off of described HSIC bus.
18. main frames according to claim 17, it is characterized in that, described processor is according to described look-at-me, control described main frame from after described dormant state is waken up, also power on for controlling described HSIC bus, the state of HSIC controller according to the recovering state of the described HSIC controller preserved.
19. main frames according to claim 18, it is characterized in that, after the state of described processor HSIC controller according to the recovering state of the described HSIC controller preserved, also for described HSIC bus is returned to normal operating conditions from suspended state, to make described HSIC bus recovery data transmit, described external unit wakes up from dormant state.
20. 1 kinds of external units, is characterized in that, comprising:
Chip chamber high-speed interface HSIC interface, is connected with main frame by HSIC bus;
Level change interface, is connected with described main frame by signal wire, produces look-at-me under the control of a processor, and described look-at-me is sent to described main frame by described signal wire;
Processor, for receiving the operational order of user, controlling described level change interface and producing described look-at-me;
Described processor also for: described external unit is in idle condition, controls described external unit and enter dormant state under the control of described main frame; Or described external unit is in idle condition, described HSIC bus suspension detected, control described external unit and enter dormant state;
After described external unit enters dormant state, described processor also for: in described HSIC bus from after suspended state returns to normal operating conditions, control described external unit and wake up from dormant state.
21. 1 kinds of main frames, is characterized in that, comprising:
Chip chamber high-speed interface HSIC interface, is connected with external unit by HSIC bus;
Processor, is in idle condition for obtaining described external unit, or when needing to control external unit power-off according to the demand of business, controls described external unit power-off; Control described HSIC bus and enter original state, to wait for that described external unit powers on; Control described external unit to power on.
22. main frames according to claim 21, is characterized in that, described processor controls described HSIC bus and enters original state and be specially: control HSIC controller reinitializes.
23. main frames according to claim 22, is characterized in that, described processor controls after described HSIC bus enters original state, and before described main frame enters dormant state, described processor is also for the current state of preserving HSIC controller; Control the power-off of described HSIC bus.
24. main frames according to claim 22 or 23, is characterized in that, after described host wake-up, described processor controls before described external unit powers on, described processor also for: control described HSIC bus and power on; HSIC controller state according to the recovering state of the described HSIC controller preserved.
25. 1 kinds of wireless terminals, it is characterized in that, comprise main frame and external unit, described main frame and described external unit comprise chip chamber high speed HSIC interface, the HSIC interface of described main frame is connected by HSIC bus with the HSIC interface of described external unit, described main frame and described external unit comprise the interface that can produce level change, and the level change interface of described main frame is changed interface with the level of described external unit and is connected by signal wire;
When described external unit is in idle condition, described main frame is by described HSIC bus suspension, and described main frame is in dormant state;
After described main frame receives the look-at-me of described external unit transmission by described signal wire, described main frame wakes up from described dormant state.
26. terminals according to claim 25, is characterized in that, the interface of described level change is universal input/output GPIO interface, or interrupt interface.
27. terminals according to claim 25, is characterized in that, when described external unit is in idle condition, and external unit dormancy described in described host computer control; Or
Described external unit detects HSIC bus state, if HSIC bus is in suspended state, described external unit is in dormant state.
28. terminals according to claim 26, is characterized in that, described main frame is by after described HSIC bus suspension, and the current state of HSIC controller preserved by described main frame, HSIC bus power-off described in described host computer control.
29. terminals according to claim 26, it is characterized in that, described main frame is from after described dormant state is waken up, described in described host computer control, HSIC bus powers on, the state of described main frame HSIC controller according to the recovering state of the described HSIC controller preserved, recover described HSIC bus, wake described external unit up.
30. terminals according to claim 25, it is characterized in that, described Host Detection is to when being in idle condition with described main frame by the external unit that chip chamber high-speed interface HSIC bus is connected, and control described external unit power-off, described in described host computer control, HSIC bus enters original state.
31. according to the arbitrary described terminal of claim 25-30, and it is characterized in that, described wireless terminal is wireless router, mobile phone or USB Modem.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210208398.9A CN102799550B (en) | 2012-06-21 | 2012-06-21 | Based on the waking up of chip chamber high-speed interface HSIC, hot-plug method and equipment |
| EP13172214.2A EP2677393A1 (en) | 2012-06-21 | 2013-06-17 | Wake-up method, hot swap method, and device based on high speed inter-chip HSIC interface |
| PCT/CN2013/077539 WO2013189292A1 (en) | 2012-06-21 | 2013-06-20 | Awakening and hot-plugging method based on high speed inter-chip (hsic) and device for same |
| JP2013129370A JP5773288B2 (en) | 2012-06-21 | 2013-06-20 | Wake-up method, hot-swap method, and device based on high-speed interchip HSIC interface |
| US13/922,455 US20130346640A1 (en) | 2012-06-21 | 2013-06-20 | Wakeup method, hot swap method, and device based on high speed inter-chip hsic interface |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210208398.9A CN102799550B (en) | 2012-06-21 | 2012-06-21 | Based on the waking up of chip chamber high-speed interface HSIC, hot-plug method and equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102799550A CN102799550A (en) | 2012-11-28 |
| CN102799550B true CN102799550B (en) | 2016-01-27 |
Family
ID=47198663
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210208398.9A Active CN102799550B (en) | 2012-06-21 | 2012-06-21 | Based on the waking up of chip chamber high-speed interface HSIC, hot-plug method and equipment |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20130346640A1 (en) |
| EP (1) | EP2677393A1 (en) |
| JP (1) | JP5773288B2 (en) |
| CN (1) | CN102799550B (en) |
| WO (1) | WO2013189292A1 (en) |
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| CN102799550B (en) * | 2012-06-21 | 2016-01-27 | 华为终端有限公司 | Based on the waking up of chip chamber high-speed interface HSIC, hot-plug method and equipment |
| US9535875B2 (en) | 2012-10-04 | 2017-01-03 | Apple Inc. | Methods and apparatus for reducing power consumption within embedded systems |
| CN105446912A (en) * | 2014-09-24 | 2016-03-30 | 中兴通讯股份有限公司 | Method and device of CPU (Central Processing Unit) for connecting WIFI module through HSIC (High Speed Inter-chip) bus interface |
| CN105812172B (en) * | 2014-12-29 | 2019-05-10 | 展讯通信（上海）有限公司 | User terminal and its HSIC are from equipment obstacle management method and device |
| CN109074141B (en) * | 2016-07-13 | 2022-01-18 | 惠普发展公司，有限责任合伙企业 | Computing device with hot plug prediction circuit |
| CN109901696B (en) * | 2019-03-07 | 2023-08-22 | 成都国科微电子有限公司 | USB integrated circuit power saving method and USB integrated circuit |
| CN111045738B (en) * | 2019-11-29 | 2023-12-29 | RealMe重庆移动通信有限公司 | Electronic equipment control method and device, electronic equipment and storage medium |
| CN111897763A (en) * | 2020-08-25 | 2020-11-06 | RealMe重庆移动通信有限公司 | Control method, control device and electronic equipment |
| CN114047964B (en) * | 2022-01-13 | 2022-05-10 | 麒麟软件有限公司 | Method for enabling Android-supported camera to be hot-plugged when Linux is compatible with Android system |
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Also Published As
| Publication number | Publication date |
|---|---|
| WO2013189292A1 (en) | 2013-12-27 |
| JP5773288B2 (en) | 2015-09-02 |
| EP2677393A1 (en) | 2013-12-25 |
| US20130346640A1 (en) | 2013-12-26 |
| JP2014026648A (en) | 2014-02-06 |
| CN102799550A (en) | 2012-11-28 |
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Address after: 518129 Building 2, B District, Bantian HUAWEI base, Longgang District, Shenzhen, Guangdong. Patentee after: Huawei terminal (Shenzhen) Co.,Ltd. Address before: 518129 Building 2, B District, Bantian HUAWEI base, Longgang District, Shenzhen, Guangdong. Patentee before: HUAWEI DEVICE Co.,Ltd. |
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| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20181219 Address after: 523808 Southern Factory Building (Phase I) Project B2 Production Plant-5, New Town Avenue, Songshan Lake High-tech Industrial Development Zone, Dongguan City, Guangdong Province Patentee after: HUAWEI DEVICE Co.,Ltd. Address before: 518129 Building 2, B District, Bantian HUAWEI base, Longgang District, Shenzhen, Guangdong. Patentee before: Huawei terminal (Shenzhen) Co.,Ltd. |