CN104332457A - High-density IO interconnection package-on-package (PoP) structure and manufacturing process thereof - Google Patents
High-density IO interconnection package-on-package (PoP) structure and manufacturing process thereof Download PDFInfo
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- CN104332457A CN104332457A CN201410453946.3A CN201410453946A CN104332457A CN 104332457 A CN104332457 A CN 104332457A CN 201410453946 A CN201410453946 A CN 201410453946A CN 104332457 A CN104332457 A CN 104332457A
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
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- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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Abstract
The invention relates to a high-density IO interconnection package-on-package (PoP) structure and a manufacturing process thereof. The structure comprises an upper packaging body and a lower packaging body, and is characterized in that the lower packaging body comprises a lower packaging body substrate with an internal wiring structure, the back surface of the lower packaging body substrate is provided with a back-surface solder ball, a chip and multiple front-surface solder balls are fixed at the front surface of the lower packaging body substrate, the front-surface solder balls are provided with copper columns, the chip, the front-surface solder balls and the copper columns are plastic packaged in a plastic packaging material, the lower ends of the copper columns are fixed to the front-surface solder balls, and the upper ends of the copper columns are protruded out of the surface of the plastic packaging material; and solder balls at the back surface of the upper packaging body are connected with the upper surfaces of the copper columns in the lower packaging body. According to the invention, through a mode of coating the PoP lower packaging body with a solder paste and attaching the metal copper columns to the PoP lower packaging body, the interconnection pitch between the upper packaging body and the lower packaging body is reduced, and the I/O interconnection quantity is increased.
Description
Technical field
The present invention relates to a kind of high density I/O interconnect PoP stack package structure and manufacturing process thereof, belong to technical field of semiconductor encapsulation.
Background technology
Mobile communication product key is the problem that will solve " bandwidth ", and popular saying is exactly the ability of high speed processing signal.One of solution is exactly place one piece of memory device (being generally dynamic memory) on logical device; That is, by stacked package (Package on Package, POP encapsulation), internal memory and processor are encapsulated together, realize miniaturized, save circuit board space, minimizing number of pins, the simplification system integration and improve performance.PoP is packaged with and helps client and release compact, the radio telephone of feature richness, PDA, digital camera and MP3 player.
Along with user is to the ever-increasing demand of advanced function, the interconnection density in PoP encapsulation between logical device and memory device improves constantly.In this case, the mode by reducing size of solder ball in PoP encapsulation further promotes the restriction that interconnection I/O quantity is subject to physical characteristics of materials and apparatus and process, and interconnection I/O quantity becomes the bottleneck that restriction PoP encapsulation performance promotes gradually.
And be in the patent application document of CN102325431A in publication No., disclose a kind of method of the copper of making on circuit boards post and there is the circuit board of surface copper post, substrate is made by plating the method for copper post, thus I/O interconnect pitch can be reduced, promote interconnection quantity.But plating expends excessive, therefore be necessary to propose a kind of new copper column production mode, to solve the excessive problem of existing plating mode expense.
The stacking of device is one of main path improving Electronic Packaging high densification, and as the highly dense integrated major way of encapsulation at present, PoP encapsulation is more and more paid attention to.In prior art, typical two-layer PoP encapsulating structure is general as shown in Figure 1, and upper packaging body 1a is welded to above lower package body 3a by the reflux course of soldered ball 2a.Packaging body 1a in the chip 4a collision on lower package body 3a, the soldered ball 2a diameter of upper packaging body 1a periphery is generally designed to the height being greater than chip 4a on lower package body 3a, but so design just adds the size of soldered ball 2a and its spacing, this and encapsulation technology highly dense integrated requires opposing.Therefore be necessary to further improve above-mentioned encapsulating structure.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, a kind of high density I/O interconnect PoP stack package structure and manufacturing process thereof are provided, reduce the interconnect pitch between packaging body and lower package body, promote I/O interconnection quantity; Described manufacturing process compares electroplating substrate technique in addition, and maturity is high, and cost is low.
According to technical scheme provided by the invention, described high density I/O interconnect PoP stack package structure, comprise packaging body and lower package body, it is characterized in that: described lower package body comprises the lower package body substrate with interconnect structures, at the back side of lower package body substrate, back side soldered ball is set, at lower package body substrate front side fixed chip and multiple fronts soldered ball, front soldered ball is arranged copper post, chip, front soldered ball and copper post by plastic packaging in capsulation material, lower end and the front soldered ball of copper post are fixed, and the upper end of copper post protrudes from the surface of capsulation material; The soldered ball at the described upper packaging body back side is connected with the copper post upper surface in lower package body.
Further, the outer circumference surface of described copper post wraps up one deck plastic layer, and the upper and lower surface of copper post is exposed surface.
Further, the height of described copper post is greater than the height of chip.
Further, the thickness of described plastic layer is 10 ~ 20 μm.
The manufacturing process of described high density I/O interconnect PoP stack package structure, is characterized in that, comprise the following steps:
(1) apply solder(ing) paste at the upper surface of the lower package body substrate carrying out interconnect structures, obtain multiple fronts soldered ball;
(2) copper post is positioned over corresponding soldered ball place, front, and one end of copper post and front ball bond are fixed;
(3) in lower package body upper surface of base plate chip;
(4) adopt capsulation material by aggregates to front soldered ball, copper post and chip plastic packaging;
(5) polishing is carried out to the upper surface of capsulation material, to expose the upper surface of copper post, make the upper end of copper post protrude from the upper surface of capsulation material;
(6) carry out planting ball at lower package body base lower surface, obtain back side soldered ball, complete the making of lower package body;
(7) lower package body step (6) obtained and upper packaging body carry out stacking, and the soldered ball at the upper packaging body back side is connected with the copper post upper surface in lower package body.
Further, described copper post protrudes from the height of capsulation material upper surface is 10 ~ 20 μm.
High density I/O interconnect PoP stack package structure of the present invention and manufacturing process thereof, by applying the mode of solder(ing) paste and affixed metal copper post (or plastic cement parcel Copper column structure) in PoP lower package body, reduce the interconnect pitch between upper and lower packaging body, promote I/O interconnection quantity.Meanwhile, technique of the present invention compares electroplating substrate technique, and maturity is high, and cost is low, and the present invention provides the efficient solution of a set of reality for some high density I/O interconnect stacks encapsulate PoP product.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of two-layer PoP encapsulating structure in prior art.
Fig. 2 ~ Fig. 8 is the preparation flow figure of described high density I/O interconnect PoP stack package structure.Wherein:
Fig. 2 is the schematic diagram applying solder(ing) paste on lower package body substrate.
Fig. 3 is the schematic diagram of fixed copper post on the soldered ball of front.
Fig. 4 is the schematic diagram of chip in lower package body.
Front soldered ball, copper post and chip are carried out the schematic diagram of plastic packaging by Fig. 5.
Fig. 6 is schematic diagram capsulation material being carried out to polishing.
Fig. 7 is the schematic diagram making back side soldered ball.
Fig. 8 is the schematic diagram of high density I/O interconnect PoP stack package structure of the present invention.
Fig. 9 is the encapsulating structure schematic diagram adopting plastic core copper coating structure copper post.
Sequence number in figure: lower package body substrate 1, front soldered ball 2, copper post 3, plastic layer 3-1, chip 4, capsulation material 5, back side soldered ball 6, lower package body 7.
Embodiment
Below in conjunction with concrete accompanying drawing, the invention will be further described.
As shown in Figure 8: described high density I/O interconnect PoP stack package structure comprises packaging body 1a and lower package body 7, lower package body 7 comprises the lower package body substrate 1 carrying out interconnect structures, at the back side of lower package body substrate 1, back side soldered ball 6 is set, at lower package body substrate 1 front fixed chip 4 and multiple fronts soldered ball 2, front soldered ball 2 is arranged copper post 3, the height of copper post 3 is greater than the height of chip 4, chip 4, front soldered ball 2 and copper post 3 by plastic packaging in capsulation material 5, lower end and the front soldered ball 2 of copper post 3 are fixed, the upper end of copper post 3 protrudes from the surface of capsulation material 5, the height that copper post 3 protrudes from capsulation material 5 surface is 10 ~ 20 μm, the described soldered ball 2a at the upper packaging body 1a back side realizes being electrically connected with copper post 3 upper surface in lower package body 7, and the chip 4 in lower package body 7 can be avoided to collide upper packaging body 1a,
Described copper post 3 also can adopt structure as shown in Figure 9, wraps up one deck plastic layer 3-1 at the outer circumference surface of copper post 3, and the upper following table of copper post 3 is being exposed surface, plays protection copper post 3, the effect of anti-oxidation.
The manufacturing process of above-specified high density I/O interconnect PoP stack package structure, comprises the following steps:
(1) as shown in Figure 2, apply solder(ing) paste at the upper surface of the lower package body substrate 1 carrying out interconnect structures, obtain multiple fronts soldered ball 2;
(2) as shown in Figure 3, adopt surface mount process copper post 3 to be positioned over corresponding front soldered ball 2 place, and one end of copper post 3 and front soldered ball 2 are welded and fixed;
(3) as shown in Figure 4, in lower package body substrate 1 upper surface chip 4, concrete grammar is: adopt traditional handicraft (i.e. die attach, chip sticks together technique), lower package body substrate 1 is coated with die attach paste(crystal-bonding adhesive), then adopt the mode of pressurization to be arranged on lower package body substrate 1 chip, be cured; What adopt in Fig. 4 is flip-chip;
(4) as shown in Figure 5, adopt capsulation material 5 by aggregates to front soldered ball 2, copper post 3 and chip 4 plastic packaging; Described capsulation material 5 generally adopts epoxy molding compound;
(5) as shown in Figure 6, polishing is carried out to the upper surface of capsulation material 5, to expose the upper surface of copper post 3, make the upper end of copper post 3 protrude from the upper surface of capsulation material 5, superpose expediently to play the heap between device; The height that described copper post 3 protrudes from capsulation material 5 upper surface is probably 10 ~ 20 μm;
(6) as shown in Figure 7, carry out planting ball at lower package body substrate 1 lower surface, obtain back side soldered ball 6, complete the making of lower package body 7;
(7) as shown in Figure 8, the lower package body 7 step (6) obtained is carried out stacking with the upper packaging body 1a carrying out internal layer and outer connecting line construction, the soldered ball 2a at the upper packaging body 1a back side realizes being electrically connected with copper post 3 upper surface in lower package body 7, and the chip 4 in lower package body 7 can be avoided to collide upper packaging body 1a.
Wherein, the copper post 3 that step (2) adopts also can adopt structure as shown in Figure 9, wraps up one deck plastic layer 3-1 at the outer circumference surface of copper post 3, plays protection copper post 3, the effect of anti-oxidation; Wherein, the thickness that described plastic layer 3-1 adopts is 10 ~ 20 μm.
Claims (6)
1. a high density I/O interconnect PoP stack package structure, comprise packaging body (1a) and lower package body (7), it is characterized in that: described lower package body (7) comprises the lower package body substrate (1) with interconnect structures, at the back side of lower package body substrate (1), back side soldered ball (6) is set, in lower package body substrate (1) front fixed chip (4) and multiple fronts soldered ball (2), front soldered ball (2) is arranged copper post (3), chip (4), front soldered ball (2) and copper post (3) by plastic packaging in capsulation material (5), the lower end of copper post (3) and front soldered ball (2) are fixed, the upper end of copper post (3) protrudes from the surface of capsulation material (5), the described soldered ball (2a) at upper packaging body (1a) back side is connected with copper post (3) upper surface in lower package body (7).
2. high density I/O interconnect PoP stack package structure as claimed in claim 1, it is characterized in that: the outer circumference surface of described copper post (3) wraps up one deck plastic layer (3-1), the upper and lower surface of copper post (3) is exposed surface.
3. high density I/O interconnect PoP stack package structure as claimed in claim 1, is characterized in that: the height of described copper post (3) is greater than the height of chip (4).
4. high density I/O interconnect PoP stack package structure as claimed in claim 2, is characterized in that: the thickness of described plastic layer (3-1) is 10 ~ 20 μm.
5. a manufacturing process for high density I/O interconnect PoP stack package structure, is characterized in that, comprises the following steps:
(1) apply solder(ing) paste at the upper surface of the lower package body substrate (1) carrying out interconnect structures, obtain multiple fronts soldered ball (2);
(2) copper post (3) is positioned over corresponding front soldered ball (2) place, and one end of copper post (3) and front soldered ball (2) are welded and fixed;
(3) in lower package body substrate (1) upper surface chip (4);
(4) adopt capsulation material (5) by aggregates to front soldered ball (2), copper post (3) and chip (4) plastic packaging;
(5) polishing is carried out to the upper surface of capsulation material (5), to expose the upper surface of copper post (3), make the upper end of copper post (3) protrude from the upper surface of capsulation material (5);
(6) carry out planting ball at lower package body substrate (1) lower surface, obtain back side soldered ball (6), complete the making of lower package body (7);
(7) lower package body (7) step (6) obtained and upper packaging body (1a) carry out stacking, and the soldered ball (2a) at upper packaging body (1a) back side is connected with copper post (3) upper surface in lower package body (7).
6. the manufacturing process of high density I/O interconnect PoP stack package structure as claimed in claim 5, is characterized in that: the height that described copper post (3) protrudes from capsulation material (5) upper surface is 10 ~ 20 μm.
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