CN104317362A - Tablet personal computer with high data security - Google Patents
Tablet personal computer with high data security Download PDFInfo
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- CN104317362A CN104317362A CN201410582417.3A CN201410582417A CN104317362A CN 104317362 A CN104317362 A CN 104317362A CN 201410582417 A CN201410582417 A CN 201410582417A CN 104317362 A CN104317362 A CN 104317362A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/1613—Constructional details or arrangements for portable computers
- G06F1/1633—Constructional details or arrangements of portable computers not specific to the type of enclosures covered by groups G06F1/1615 - G06F1/1626
- G06F1/1656—Details related to functional adaptations of the enclosure, e.g. to provide protection against EMI, shock, water, or to host detachable peripherals like a mouse or removable expansions units like PCMCIA cards, or to provide access to internal components for maintenance or to removable storage supports like CDs or DVDs, or to mechanically mount accessories
- G06F1/1658—Details related to functional adaptations of the enclosure, e.g. to provide protection against EMI, shock, water, or to host detachable peripherals like a mouse or removable expansions units like PCMCIA cards, or to provide access to internal components for maintenance or to removable storage supports like CDs or DVDs, or to mechanically mount accessories related to the mounting of internal components, e.g. disc drive or any other functional module
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1408—Protection against unauthorised use of memory or access to memory by using cryptography
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/30—Authentication, i.e. establishing the identity or authorisation of security principals
- G06F21/31—User authentication
- G06F21/32—User authentication using biometric data, e.g. fingerprints, iris scans or voiceprints
Abstract
The invention provides a tablet personal computer with high data security. The tablet personal computer comprises a data self-destruct device. When a housing of the tablet personal computer is illegally opened or broken, the data self-destruct device physically destructs a data storage chip and/or a data storage medium in the tablet personal computer. The data self-destruct device needs no software control, is independent of any module or device in the tablet personal computer, is irrelevant with running state of the tablet personal computer, can normally run even if the tablet personal computer crashes or shuts down and provides high security.
Description
Technical field
The present invention relates to field of information security technology, particularly relate to a kind of panel computer with high data security.
Background technology
Panel computer (Tablet Personal Computer, be called for short Tablet PC) be the member newly increased in PC family, integrate mobile communication and mobile entertainment, having handwriting recognition and wireless communication function, is a kind of small-sized, PC of being convenient for carrying, using touch-screen as basic input equipment, the notebook computer of ratio, it is except having its all functions, and also support handwriting input or phonetic entry, movability and portability are all even better.The portability of panel computer and function have been people's heightened awareness and have become the primary technology dynamics promoting social development, and with its plurality of advantages, being subject to the welcome of final user, is the developing direction of present stage PC computer.
Develop rapidly and scientific and technical general advance along with socioeconomic, requiring the range of application of panel computer will be more and more extensive, and the application of current panel computer mainly concentrates on the aspects such as game, audio-visual amusement.
But, for some special users, as army, military project, state security department, government bodies, data security is very important.Once panel computer is lost, and data leak occurs, consequence is by hardly imaginable.And when current panel computer application is more and more general, some work must come with panel computer again.At present, these special users are badly in need of a kind of panel computer with high data security.
Summary of the invention
(1) technical matters that will solve
In view of above-mentioned technical matters, the invention provides a kind of panel computer with high data security.
(2) technical scheme
The panel computer that the present invention has high data security comprises: data self-desttruction equipment.When panel computer meets with the behavior of illegal unlatching shell or broken shell, this data self-desttruction equipment realizes the physical destroy to the pin-saving chip in panel computer and/or data storage medium.
Preferably, in panel computer of the present invention, data self-desttruction equipment comprises: self-destruction trigger circuit, when panel computer meets with the behavior of illegal unlatching shell or broken shell, and this self-destruction trigger circuit triggers one self-destruction trigger pip; The self-destruction executive circuit be electrically connected with self-destruction trigger circuit, after receiving self-destruction trigger pip, this self-destruction executive circuit introduces DC pulse high pressure, to realize the physical destroy to it to the pin-saving chip in panel computer and/or data storage medium; And provide the battery power supply system of electric energy for self-destruction executive circuit.
Preferably, in panel computer of the present invention, self-destruction trigger circuit comprise: the switch being positioned at sensitive part of several series connection.This switch is made up of upper contact and lower contact, wherein, upper contact is positioned at a sensitive part of panel computer upper shell, lower contact is positioned at the corresponding site of this sensitive part on panel computer lower house, in normal state, and this upper contact and lower contact electrical contact, this switch is in closure state, meet with illegal behavior of opening shell or broken shell at this sensitive part, this upper contact and lower contact disengage, and this switch is in off-state.
Preferably, in panel computer of the present invention, self-destruction trigger circuit comprise the switch of at least 3.Sensitive part comprises: four corners of panel computer, side, or the position of pin-saving chip and/or data storage medium.
Preferably, in panel computer of the present invention, self-destruction executive circuit comprises: detection module, boost module and pulse control module; The detection module be connected with self-destruction trigger circuit, when self-destruction trigger pip not detected, battery power supply system and boost module and pulse control circuit are isolated by this detection module; After receiving the self-destruction trigger pip of self-destruction trigger circuit, this detection module is communicated with battery power supply system and boost module and pulse control module; Be connected to the boost module of detection module, after connection battery power supply system, this boost module produces DC high voltage, and exports to pulse control circuit; Be connected to the pulse control module of boost module, after the DC high voltage receiving boost module output, this pulse control module changes this DC high voltage into DC pulse voltage, add to pin-saving chip and and/or the pin of data storage medium, to realize the physical destroy to it.
Preferably, in panel computer of the present invention, detection module comprises: the 11 resistance R11, and its first end is connected to node A, and the second end is connected to supply voltage V
bATTERY; 12 resistance R12, is connected between node A and Node B, wherein, and Node B ground connection; 11 triode Q11, its base stage is connected to node A by the 13 resistance R13; Its collector is connected to supply voltage V by the 4th resistance R4
bATTERY; Its grounded emitter; 12 P channel MOS tube M12, its G pin is connected to the collector of the 11 triode Q11 by the 15 resistance R15, its S pin is connected to power supply V
bATTERY; Its D pin is connected to the output terminal of detection module; 11 electric capacity C11, is connected between node A and Node B; Wherein, supply voltage V
bATTERYbe connected to the output terminal of battery power supply system; Node A and Node B are connected to two output terminals of self-destruction trigger circuit.
Preferably, in panel computer of the present invention, boost module comprises: energy storage inductor L31, and its first end is connected to the input end of detection module, and the second end is connected to the output terminal of boost module by 21 diode D21; Boosting driving chip U302, be EUP2586 chip, its VIN pin is connected to the first end of energy storage inductor L31; SHDN pin is connected to the input end of detection module by the 21 resistance R21, and by the 23 electric capacity C23 ground connection; SW pin is connected to second end of energy storage inductor L31; OVP pin is connected to the negative pole end of diode D1; GND pin ground connection; Tank circuit, comprise the 25 electric capacity C25 in parallel and the 26 electric capacity C26, both first ends are connected to the output terminal of boost module, the second end ground connection.
Preferably, in panel computer of the present invention, boost module also comprises: filtering circuit, and be made up of the 21 electric capacity C21 of parallel connection and the 22 electric capacity C22, both first ends are connected to the input end of detection module jointly, the second end ground connection.
Preferably, in panel computer of the present invention, boost module also comprises: negative voltage feedback network, for adjusting the amplitude of booster circuit output voltage; This negative voltage feedback network comprises: the 24 electric capacity C24, and its first end is connected to the FB pin of boosting driving chip U302; 23 resistance R23, itself and the 24 resistance R24 are connected in series, and first end is connected to the output terminal of boost module, and the second end connects the 24 resistance R24, are also connected to the FB pin of boosting driving chip U302 by the 22 resistance R22; And the 24 resistance R24, itself and the 23 resistance R23 are connected in series, and first end is connected to second end of the 23 resistance R23, the second end ground connection.
Preferably, in panel computer of the present invention, pulse control module comprises: source oscillation signal, and it produces impulse oscillation signal; Pulsed electron on-off circuit, comprise: multiple P channel MOS tube, the S pin of each P channel MOS tube is connected to the output terminal of boost module, and G pin is connected to the output terminal of boost module by resistance, and D pin is connected to different pieces of information storage chip and/or the storage medium of panel computer respectively; And the 31 triode Q31, its base stage is connected to the signal output part of source oscillation signal by the 33 resistance R33, its grounded emitter; Wherein, the G pin of the 32 P channel MOS tube M32 is connected to the collector of the 31 triode Q31 by the 35 resistance R35 and the 32 diode D32; The G pin of above-mentioned 33 P channel MOS tube M33 is connected to the collector of the 31 triode Q31 by the 34 resistance R34 and the 31 diode D31.
Preferably, in panel computer of the present invention, source oscillation signal comprises: the 31 not gate NOT the 31 and the 32 not gate NOT 32; Wherein: the 31 not gate NOT the 31 and the 32 not gate NOT 32 is end to end, and the input end of the 31 not gate NOT 31 is connected to by the 31 resistance R31 the 32 electric capacity C32 be connected with the output terminal of the 32 not gate NOT 32 connects, its output terminal is connected to the output terminal of this source oscillation signal, for exporting oscillation pulse signal; The output terminal of the 31 not gate NOT 31 is also connected to the first end of the 32 resistance R32, and second end of the 32 resistance R32 is connected between the 31 resistance R31 and the 32 electric capacity C32.
Preferably, in panel computer of the present invention, in panel computer, storage chip and/or storage medium comprise: FLASH chip and TF card; Pulsed electron on-off circuit comprises: the 32 P channel MOS tube M32, and its S pin is connected to the output terminal of boost module, and its G pin is connected to the output terminal of boost module by the 37 resistance R37, its D pin is connected to the FLASH chip of panel computer; 33 P channel MOS tube M33, its S pin is connected to the output terminal of boost module, and its G pin is connected to the output terminal of boost module by the 36 resistance R36, and its D pin is connected to the TF card of panel computer.
Preferably, in panel computer of the present invention, battery power supply system, by arranging, at least retains the electric energy of preset ratio for self-destruction executive circuit.
Preferably, panel computer of the present invention also comprises: permission control device, and this permission control device confirms user identity, and the authority that this user identity is corresponding, to determine which kind of operation user can carry out to panel computer
Preferably, in panel computer of the present invention, permission control device comprises: the fingerprint identification device obtaining the finger print information of user; Store the user ID data storehouse of the corresponding relation of user fingerprints information and user identity; Store user identity and the rights database to the corresponding relation of operating right; And the authority decision maker to be connected with rights database with fingerprint identification device, user ID data storehouse, the finger print information that this authority decision maker obtains according to fingerprint identification device, the user identity that this finger print information is corresponding is determined in user ID data storehouse, in rights database, determine the operating right that this user identity is corresponding, and stop user to conduct interviews to the sensitive data outside its operating right.
(3) beneficial effect
As can be seen from technique scheme, panel computer of the present invention has following beneficial effect:
(1) the data self-desttruction equipment of pure hardware design is adopted, when there is the behavior of data risk in panel computer experience illegal unlatching shell etc., data self-desttruction equipment will start automatically, fast physical destroy is carried out to the inner wafer of the data storage device in panel computer, it is unrepairable that this physical destroy has, irreversible feature, ensure the security of internal data to greatest extent, and, this data self-desttruction equipment need not software control, do not rely on any module in panel computer, device (as CPU), and have nothing to do with the duty of panel computer, even if in deadlock, also can normally work under off-mode,
(2) fingerprint recognition provides the control of sensitive data operating right for panel computer, forbids opening panel computer without the personnel of operating right or has the user of operating right to check sensitive data outside its operating right.
Accompanying drawing explanation
Fig. 1 is the structural representation according to embodiment of the present invention panel computer;
Fig. 2 is the framed structure schematic diagram of the self-destruction trigger circuit of self-desttruction equipment in panel computer shown in Fig. 1;
Fig. 3 is the schematic equivalent circuit of the trigger circuit of self-destruction shown in Fig. 2;
The circuit diagram of detection module in the self-destruction executive circuit that Fig. 4 is the trigger circuit of self-destruction shown in Fig. 2;
Fig. 5 shows a kind of circuit realiration structural drawing of boost module in the present invention;
Fig. 6 shows a kind of circuit realiration structural representation of pulse control circuit in the present invention.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly understand, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.It should be noted that, in accompanying drawing or instructions describe, similar or identical part all uses identical figure number.The implementation not illustrating in accompanying drawing or describe is form known to a person of ordinary skill in the art in art.In addition, although herein can providing package containing the demonstration of the parameter of particular value, should be appreciated that, parameter without the need to definitely equaling corresponding value, but can be similar to corresponding value in acceptable error margin or design constraint.
Panel computer of the present invention adopts data self-desttruction equipment and permission control device to combine and designs, for the data protection of high level of security provides a favorable security.
In one exemplary embodiment of the present invention, provide a kind of panel computer.Fig. 1 is the structural representation according to embodiment of the present invention panel computer.As shown in Figure 1, the present embodiment panel computer comprises: data self-desttruction equipment and permission control device.
Wherein, data self-desttruction equipment is used for, when panel computer meets with the behavior of illegal unlatching shell, carrying out physical destroy to the pin-saving chip in panel computer and data storage medium.Permission control device is for confirming user identity, and the authority that this user identity is corresponding, forbids opening panel computer without the personnel of operating right or has the user of operating right to check sensitive data outside its operating right.
Below each ingredient of the present embodiment panel computer is described in detail.
In the present embodiment, self-desttruction equipment comprises: battery power supply system, self-destruction trigger circuit and self-destruction executive circuit.
Battery power supply system is placed in the inside of panel computer, for panel computer provides electric energy, provides electric energy for self-destruction executive circuit starts simultaneously.Particular by arranging battery management system; battery power supply system is made will at least to retain predetermined ratio if the electric energy of 10% is for self-destruction executive circuit; and other electric energy as 90% electric energy for panel computer when normal operation; thus ensure that self-desttruction equipment all can normally start under free position, realize self-destruction protection.
Self-destruction trigger circuit, for be responsible for data security risks is detected, when panel computer meet with illegally open shell, broken shell etc. there is the behavior of security risks time, it triggers a self-destruction trigger pip, and is sent to self-destruction executive circuit.Wherein, this self-destruction trigger pip is a cut-off signal, namely in normal state, these self-destruction trigger circuit be communicated with, meet with illegally open shell, broken shell etc. there is the behavior of security risks time, these self-destruction trigger circuit disconnect.
Fig. 2 is the structural representation of the self-destruction trigger circuit of self-desttruction equipment in panel computer shown in Fig. 1.A1 is the upper shell of panel computer, and A2 is the lower house of panel computer.Upper shell A1, lower house A2 can be in and be separated and closed state.
As shown in Figure 2, self-destruction trigger circuit comprise: be arranged on four switch-K1 at panel computer upper and lower casing four corner location places, K2, K3, K4.It should be noted that, those skilled in the art can increase or reduce the number of switch as required, and adjust the position residing for switch, the pin-saving chip of such as panel computer and/or storage medium position place, side edge etc.But generally, the number of switch is no less than 3.
Please refer to Fig. 2, for one of them K switch 1, it is made up of two contacts, i.e. upper contact a and lower contact b, upper contact a is arranged on the upper shell A1 of panel computer, and lower contact b is positioned at the lower house A2 of panel computer, when upper shell A1 and lower house A2 is assembled into closure state, described upper contact a contacts with lower contact b and forms electrical contact, and then the switch that upper contact a and lower contact b is formed is in closure state; After upper shell A1 and lower house A2 is separated, upper contact a and lower contact b disengages, and makes K switch 1 be in off-state.
Fig. 3 is the schematic equivalent circuit of the trigger circuit of self-destruction shown in Fig. 2.As shown in Figure 3, exported by node A and Node B after being arranged on the K switch 1 on panel computer upper-lower casing, K2, K3, K4 series connection.This node A and Node B are connected to self-destruction executive circuit.This node A and Node B have two state-closure states (i.e. normal condition) and off-state (namely by the state illegally opened).Self-destruction executive circuit is made up of the state of switching circuitry 4 switches by detecting, as the foundation starting self-destroying function.
Under the state that panel computer shell is intact, K1, K2, K3, K4 are all in closed conducting state, and switching circuitry closes, and self-destruction executive circuit will be in holding state.When a corner any on panel computer shell takes the lead in illegally opening shell, all the switch causing this to open shell position is disconnected, trigger self-destruction executive circuit, start self-destruction immediately.
Alternatively, except this embodiment shown in Fig. 2, position that also can be residing in panel computer according to panel computer shell shape and pin-saving chip/medium, the housing of panel computer arranges the switch that multiple upper and lower contact is formed, these switches are made to form parallel circuit, and after detecting that all switches all disconnect, then produce a self-destruction trigger pip to triggering actuating unit.This is because, the special setting of some panel computer housing, and the position residing for pin-saving chip/medium determines, only after some position of housing is opened, just likely touch pin-saving chip/medium, further to the decrypt data etc. on data storage medium, therefore this setup can prevent the upper-lower casing of certain position of panel computer unintentionally separated, but this separation is when cannot touch pin-saving chip/medium, data in pin-saving chip/medium are deleted by mistake, cause unnecessary loss.
In addition, it can also be Part I switch in parallel in multiple switch, be connected in series with Part II switch more afterwards, final formation switching circuitry, when disconnecting with any one switch in Part II switch all to disconnect at Part I switch, self-destruction trigger circuit produce a self-destruction trigger pip to triggering actuating unit.This can be arranged according to concrete actual conditions.
Self-destruction executive circuit for detecting self-destruction trigger pip, and uses high voltage pulse to carry out physical damage to panel computer internal data store chip and data storage medium (as FLASH, TF card etc.) after self-destruction trigger pip being detected.The self-destruction principle of self-destruction executive circuit utilizes high voltage pulse to add to panel computer internal data store chip and data storage medium pin, cause chip and media interior wafer, device burns, realize physical damage that is quick, irreversible, unrepairable, avoid inner loss of vital data, ensure the safety of data.
Self-destruction executive circuit comprises: detection module, boost module and pulse control module.Wherein:
Detection module, is connected with self-destruction trigger circuit, and receives self-destruction trigger pip from self-destruction trigger circuit.This detection module is used for after receiving the self-destruction trigger pip of self-destruction trigger circuit, and detection module is communicated with battery power supply system and boost module and pulse control module, makes battery power supply system provide power supply for boost module and pulse control circuit.When self-destruction trigger pip not detected, battery power supply system and boost module and pulse control circuit are isolated by detection module, stop battery power supply system to be that boost module and pulse control circuit are powered;
Boost module, is connected to detection module, and after received the power supply that battery power supply system provides by detection module, produces DC high voltage pin-saving chip and data storage medium being caused to physical damage, and export to pulse control circuit;
Pulse control module, be connected to boost module, after the DC high voltage receiving boost module output, change DC high voltage into DC pulse voltage, add to the pin of pin-saving chip and data storage medium, destructive burning is caused to the wafer of their inside or device.
The circuit diagram of detection module in the self-destruction executive circuit that Fig. 4 is the trigger circuit of self-destruction shown in Fig. 2.As shown in Figure 4, this detection module comprises:
11 resistance R11, its first end is connected to node A, and the second end is connected to supply voltage V
bATTERY;
12 resistance R12, is connected between node A and Node B, wherein, and Node B ground connection;
11 electric capacity C11, is connected between node A and Node B;
11 triode Q11, its base stage is connected to node A by the 13 resistance R13; Its collector is connected to supply voltage V by the 14 resistance R14
bATTERY; Its grounded emitter;
12 P channel MOS tube M12, is equivalent to an electronic switch, and its G pin (1 pin) is connected to the collector of the 11 triode Q11 by the 15 resistance R15, and its S pin (2 pin) is connected to power supply V
bATTERY; Its D pin (3 pin) is connected to the output terminal of detection module.Be connected to the power supply side of boost module and pulse control module.
Wherein, supply voltage V
bATTERYbe connected to the output terminal of battery power supply system; Node A and Node B are connected to two output terminals of self-destruction trigger circuit; The output terminal output voltage KILL_VDD of detection module.
Alternatively, the resistance of the 11 resistance R11 and the 12 resistance R12 is 200k Ω.The resistance of the 13 resistance R13 is 2.2k Ω.The resistance of the 14 resistance R14 and the 15 resistance R15 is respectively 47k Ω and 100k Ω.The capacitance of the 11 electric capacity C11 is 0.1 μ F.11 electric capacity C11 is used for filtering clutter undesired signal, and improve the accuracy of detection module, effectively avoid self-desttruction equipment misoperation, in some cases, the 11 electric capacity C11 can omit.
Under panel computer shell serviceable condition, the switching circuitry at node A and Node B place closes, supply voltage V
bATTERYthrough the 11 resistance R11, node A and Node B are to ground, and the base stage of triode Q11 does not have inflow current and is in cut-off state, and its current collection level current potential will rise to supply voltage V
bATTERY, make voltage between the G pin of the 12 P channel MOS tube M12 and S pin (1,2 pin) be 0V.12 P channel MOS tube M12 is also in cut-off state, and the voltage that detection module output terminal exports is 0V, and final boost module and pulse control module are closed without power supply.
Meet with at panel computer shell and destroy, when the switching circuitry between node A and Node B disconnects, supply voltage V
bATTERYthe electric current produced is through the base stage of the 11 resistance R11 and the 13 resistance R13 to the 11 triode Q11,11 triode Q11 is in saturation conduction state, triode Q11 current collection level current potential will drop to 0V, make voltage difference between the G pin of the 12 P channel MOS tube M12 and S pin (1,2 pin) equal supply voltage V
bATTERY, the 12 P channel MOS tube M12 will be in saturation conduction state, supply voltage V
bATTERYthrough the 12 P channel MOS tube M12 to detection module output terminal, output voltage KILL_VDD, thus provide power supply for boost module and pulse control module, start self-destruction.
Fig. 4 illustrate only a kind of circuit realiration figure of detection module; described detection module can also be realized by other circuit; as long as those skilled in the art complete the function of aforementioned detection module, within protection scope of the present invention by usual circuit implementations.
Boost module, is connected to detection module, and after received the power supply that battery power supply system provides by detection module, for generation of high voltage pin-saving chip and data storage medium being caused to physical damage, and exports to pulse control circuit.Specifically, this boost module is by the supply voltage KILL_VDD (voltage that battery power supply system exports, be about 3V ~ 4.2V) boost to KILL-27.5V high voltage, the operating voltage of existing pin-saving chip and data storage medium (as FLASH, TF card etc.) is generally 3V ~ 5V, maximal value also can not more than 10V, adopt the high voltage of 27.5V, be enough to cause destructive destruction to the wafer of they inside.When tackling special high pressure resistant memory device, can suitably improve this voltage according to memory device characteristic, ensureing the reliability of self-destroying function.And generally, the amplitude of this DC pulse high pressure is greater than the physical destroy that 10V just can realize the pin-saving chip in panel computer and/or data storage medium substantially.
Fig. 5 shows a kind of circuit realiration structural drawing of boost module in the present invention.As shown in Figure 5, boost module comprises:
Filtering circuit, for filtering by the clutter in detection module input signal, be made up of the 21 electric capacity C21 of parallel connection and the 22 electric capacity C22, both first ends are connected to the input end of detection module jointly, the second end ground connection;
Energy storage inductor L31, its first end is connected to the input end of filtering circuit, and the second end is connected to the output terminal of boost module by the 21 diode D21;
Boosting driving chip U302, it is EUP2586 chip, and the VIN pin (pin 6) of this EUP2586 chip is connected to the first end of energy storage inductor L31; SHDN pin (pin 4) is connected to the output terminal of filtering circuit by the 21 resistance R21, and by the 23 electric capacity C23 ground connection; SW pin (pin one) is connected to second end of energy storage inductor L31; OVP pin (pin 5) is connected to the negative pole end of the 21 diode D21; GND pin (pin two) ground connection;
Negative voltage feedback network, for adjusting the amplitude of boost module output voltage, comprising: the 24 electric capacity C24, and its first end is connected to the FB pin of boosting driving chip U302, and its second end is connected to the output terminal of boost module; 23 resistance R23, itself and the 24 resistance R24 are connected in series, and first end is connected to the output terminal of boost module, and the second end connects the 24 resistance R24, are also connected to the FB pin of boosting driving chip U302 by the 22 resistance R22; 24 resistance R24, itself and the 23 resistance R23 are connected in series, and first end is connected to second end of the 23 resistance R23, the second end ground connection;
Tank circuit, comprise the 25 electric capacity C25 in parallel and the 26 electric capacity C26, both first ends are connected to the output terminal of boost module, the second end ground connection.
Wherein, EUP2586 is the important devices of this boost module circuit, it is the DC/DC converter of a built-in lower end MOS switch based on CMOS technology, the conducting resistance of its built-in lower end MOS switch is 0.3 Ω (representative value), by being the electric current of 3A to the maximum, and there is the input of 2.6V ~ 5.5V Width funtion, 1MHz switching frequency, and the feature such as high-level efficiency electric energy conversion of more than 93% can be realized.Under the occasion of the multiple memory device of reply, replaceable more high-power DC/DC converter, when avoiding starting self-destroying function, emergent power is not enough and cause boost module output voltage to reduce rapidly, causes self-destruction baulk.
In negative voltage feedback network, 24 electric capacity C24 is building-out capacitor, 23 resistance R23 is the upper offset resistance of negative voltage feedback, 24 resistance R24 is the below-center offset resistance of negative voltage feedback, by regulating the resistance of upper offset resistance and below-center offset resistance, the output voltage amplitude of boost module can be regulated.
Alternatively, in this boost module, the inductance value of energy storage inductor L31 is that the capacitance of 10 μ H, the 25 electric capacity C25 and the 26 electric capacity C26 is respectively 10 μ F and 1 μ F.The capacitance of the 21 electric capacity C21 and the 22 electric capacity C22 is respectively 10 μ F and 0.1 μ F.The resistance of the 21 resistance R21 is 10k Ω, and the capacitance of the 23 electric capacity is 1 μ F.The capacitance of the 24 electric capacity C24 is 220pF.The resistance value of the 22 resistance R22 is 1.1k Ω.The resistance value of the 23 resistance is 750k Ω.The resistance value of the 24 resistance R24 is respectively 5.49k Ω.The capacitance of the 25 electric capacity C25 and the 26 electric capacity C26 is respectively 10 μ F and 1 μ F.
Below introduce the circuit working principle of this boost module: (boosting driving chip SW pin is connected to the D level of built-in metal-oxide-semiconductor at the built-in metal-oxide-semiconductor of boosting driving chip U302, GND pin is connected to the S level of built-in metal-oxide-semiconductor) conducting time, energy storage inductor L31 and metal-oxide-semiconductor form loop, the electric current that supply voltage KILL-VDD is formed through described loop is converted into magnetic energy storage in energy storage inductor L31, when this metal-oxide-semiconductor turns off, magnetic energy in energy storage inductor L31 is converted into the two ends coating-forming voltage of electric energy at inductance, under above bearing just, this voltage superposition is at the anode of supply voltage KILL-VDD, total voltage after superposition stores via the 25 electric capacity C25 exported to after the 21 diode D21 in tank circuit and the 26 electric capacity C26, realize boost function.
It is only a kind of circuit realiration structure of boost module that Fig. 5 shows.Those skilled in the art can, according to usual technological means, adopt other circuit structure to realize boost module.As long as technological means usual in employing this area realizes the circuit structure of aforementioned boost module function, all within protection scope of the present invention.
Pulse control module, it receives the DC high voltage that described boost module exports, and after changing described DC high voltage into DC pulse voltage, add to the pin of pin-saving chip and data storage medium, destructive burning is caused to the wafer of their inside or device.
Wherein, pulse control module comprises multiple output port, and each different output port is connected on the dissimilar pin-saving chip/medium of panel computer respectively; As described in output port comprise Flash output port, for being connected to the Flash storage card of panel computer, TF card output port, is connected to the TF card etc. of panel computer.The advantage of high voltage pulse is adopted to be instantaneous power large (because output capacitance C25, the C26 by boost module provides by pulse power major part).Under being specially adapted to the occasion of multiple memory device, because each memory device electrical property there are differences, burn and must there is sequencing, the memory device burnt at first certainly will impact the memory device that other is burning, adopt high voltage pulse mode can greatly reduce this impact due to the feature that instantaneous power is large, self-destruction reliability is higher.
Fig. 6 shows a kind of circuit realiration structural representation of pulse control circuit in the present invention.As shown in Figure 6, described pulse control circuit comprises:
Source oscillation signal, it produces oscillation pulse signal, comprising: the 31 not gate NOT the 31 and the 32 not gate NOT 32.Wherein, 31 not gate NOT the 31 and the 32 not gate NOT32 is end to end, and the input end of the 31 not gate NOT 31 is connected to by the 31 resistance R31 the 32 electric capacity C32 be connected with the output terminal of described 32 not gate NOT 32 connects, its output terminal is connected to the output terminal of this oscillatory circuit, exports described oscillation pulse signal; The output terminal of the 31 not gate NOT 31 is also connected to the first end of the 32 resistance, and the second end of the 32 resistance is connected between described 31 resistance and the 32 electric capacity;
Pulsed electron on-off circuit, comprise: multiple P channel MOS tube, the S pin of each P channel MOS tube is connected to the output terminal of boost module, and G pin is connected to the output terminal of boost module by resistance, and D pin is connected to different pieces of information storage chip and/or the storage medium of panel computer respectively; The situation comprising two P channel MOS tubes has been shown in Fig. 6, be specially: the 32 P channel MOS tube M32, its S pin (2 pin) is connected to the output terminal of boost module, its G pin (1 pin) is connected to the output terminal of boost module by the 37 resistance R37, its D pin (3 pin) is connected to the FLASH chip of panel computer; 33 P channel MOS tube M33, its S pin (2 pin) is connected to the output terminal of boost module, its G pin (1 pin) is connected to the output terminal of boost module by the 36 resistance R36, its D pin (3 pin) is connected to the TF card of panel computer;
31 triode Q31, its base stage is connected to the output terminal of source oscillation signal by the 33 resistance R33, its grounded emitter, the G pin of each above-mentioned P channel MOS tube is connected to the collector of the 31 triode Q31 by resistance and diode, the G pin (1 pin) as above-mentioned 32 P channel MOS tube M32 is connected to the collector of the 31 triode by the 35 resistance R35 and the 32 diode D32; The G pin (1 pin) of above-mentioned 33 P channel MOS tube M33 is connected to the collector of the 31 triode Q31 by the 34 resistance R34 and the 31 diode D31.
In the pulse control circuit shown in Fig. 6, input end (KILL-27.5V) is connected to the output terminal of boost module, the VCC pin of the 31 not gate NOT31 and the 32 not gate NOT32 is connected to the output terminal (KILL_VDD) of detection module, its output terminal (KILL-FLASH) is connected to the FLASH chip in panel computer, and KILL_TF is connected to the TF card in panel computer.
It should be noted that, because the 31 not gate NOT31 and the 32 not gate NOT32 uses same VCC pin and GND pin on chip, as long as therefore connect described same pin when connecting circuit, therefore in Fig. 6, illustrate only the VCC pin of the 31 not gate NOT31 and the connected mode of GND pin.
Fig. 6 illustrate only the situation that panel computer comprises FLASH chip and TF card, namely illustrate only two pulsed electron on-off circuits for FLASH chip and TF card.Certainly, pulse control module of the present invention can also comprise the pulsed electron on-off circuit for other storage chips and medium, the pulsed electron on-off circuit of FLASH or the TF card shown in its structure with Fig. 6 is identical, comprise P channel MOS tube M33, and be connected in parallel with other pulsed electron on-off circuit.
Wherein, it is 2Hz that source oscillation signal produces frequency, pulsewidth is the pulse signal of 250ms, the 31 triode Q31 is exported to by the 31 not gate NOT31, drive the 33 P channel MOS tube M33, the 32 P channel MOS tube M32 by the 31 triode Q31, be 2Hz at the D pin forming frequency of the 32 P channel MOS tube M32 and the 33 P channel MOS tube M33 simultaneously, and pulsewidth is 250ms, amplitude is the pulse voltage of 27.5V, adds to corresponding memory device respectively.31 not gate NOT31 and the 32 not gate NOT32 is positioned on same chip, and both VCC pins are connected to the output terminal of battery power supply system jointly, and GND pin common ground, no longer describes in detail herein.
32 resistance R32, the 32 electric capacity C32 determine the frequency of source oscillation signal, 31 diode D31 and the 32 diode D32 plays buffer action, coordinate the 34 resistance R34, 35 resistance R35 isolates the 33 P channel MOS tube M33 jointly, the G level of the 32 P channel MOS tube M32, avoid M33 under extreme environment or condition, in M34, some metal-oxide-semiconductors damage (as G, S punctures) and have influence on the normal work of another one metal-oxide-semiconductor, make the 33 P channel MOS tube M33, 32 P channel MOS tube M32 duty is independent of each other, benefit to improve the data volume of self-destruction in this state, reduce the risk that significant data is read or deciphers to greatest extent.
Voltage KILL_Flash and KILL_TF that this pulse control circuit exports, all up to 27.5V, can cause physical damage to Flash chip and TF card respectively.It should be noted that, physical damage has rapidity and the unrepairable feature of corrupted data, and significant data can be prevented to be read or to decipher, and ensures the safety storing data to greatest extent.
Known by above-mentioned explanation, when the present embodiment panel computer meets with the situation of illegal unlatching shell, in machine, self-desttruction equipment will burn Flash and TF card automatically, ensures the safety of storage inside data.
Permission control device is for confirming user identity, and the authority that this user identity is corresponding, to determine which kind of operation user can carry out to panel computer.Please refer to Fig. 1, this permission control device comprises: fingerprint identification device, for obtaining the finger print information of user; User ID data storehouse, stores the corresponding relation of user fingerprints information and user identity; Rights database, stores user identity and the corresponding relation to operating right; Authority decision maker, for the finger print information obtained according to fingerprint identification device, the user identity that this finger print information is corresponding is determined in user ID data storehouse, in rights database, determine the operating right that this user identity is corresponding, and stop user to conduct interviews to the sensitive data outside its operating right.
For authority decision maker, above-mentioned prevention user conducts interviews to the sensitive data outside its operating right and specifically comprises: in user ID data storehouse and non-existent user, panel computer will not be started shooting; For the user existed in subscriber identity information database, permit start, only permit it and check and the sensitive data outside its operating right is locked the sensitive data that its authority is corresponding.
So far, by reference to the accompanying drawings the present embodiment has been described in detail.Describe according to above, the panel computer that those skilled in the art should have a high data security to the present invention has had clearly to be familiar with.
In addition, the above-mentioned definition to each element and method is not limited in various concrete structures, shape or the mode mentioned in embodiment, and those of ordinary skill in the art can change simply it or replace.
In sum, the invention provides a kind of panel computer, this panel computer can provide better portable operation for industry user, simultaneously user can be allowed to obtain more intuitively, more fully relevant information, the most important thing is, effectively can ensure the safety of internal information, avoid important information lose or divulge a secret and bring about great losses, be highly suitable for the librarian use of army, military project, national security part and other special industries.
Above-described specific embodiment; object of the present invention, technical scheme and beneficial effect are further described; be understood that; the foregoing is only specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any amendment made, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (16)
1. there is a panel computer for high data security, it is characterized in that, comprising: data self-desttruction equipment;
When described panel computer meets with the behavior of illegal unlatching shell or broken shell, this data self-desttruction equipment realizes the physical destroy to the pin-saving chip in described panel computer and/or data storage medium.
2. panel computer according to claim 1, is characterized in that, described data self-desttruction equipment comprises:
Self-destruction trigger circuit, when described panel computer meets with the behavior of illegal unlatching shell or broken shell, this self-destruction trigger circuit triggers one self-destruction trigger pip;
The self-destruction executive circuit be electrically connected with described self-destruction trigger circuit, after receiving described self-destruction trigger pip, this self-destruction executive circuit introduces DC pulse high pressure, to realize the physical destroy to it to the pin-saving chip in described panel computer and/or data storage medium; And
For described self-destruction executive circuit provides the battery power supply system of electric energy.
3. panel computer according to claim 2, is characterized in that, described self-destruction trigger circuit comprise: the switch being positioned at sensitive part of several series connection;
This switch is made up of upper contact and lower contact, wherein, upper contact is positioned at a sensitive part of panel computer upper shell, lower contact is positioned at the corresponding site of this sensitive part on panel computer lower house, in normal state, and this upper contact and lower contact electrical contact, this switch is in closure state, meet with illegal behavior of opening shell or broken shell at this sensitive part, this upper contact and lower contact disengage, and this switch is in off-state.
4. panel computer according to claim 3, is characterized in that, described self-destruction trigger circuit comprise the switch described at least 3.
5. panel computer according to claim 3, is characterized in that, described sensitive part comprises: four corners of panel computer, side, or the position of pin-saving chip and/or data storage medium.
6. panel computer according to claim 2, is characterized in that, described self-destruction executive circuit comprises: detection module, boost module and pulse control module;
The detection module be connected with self-destruction trigger circuit, when self-destruction trigger pip not detected, battery power supply system and boost module and pulse control circuit are isolated by this detection module; After receiving the self-destruction trigger pip of self-destruction trigger circuit, this detection module is communicated with battery power supply system and boost module and pulse control module;
Be connected to the boost module of described detection module, after connection battery power supply system, this boost module produces DC high voltage, and exports to pulse control circuit;
Be connected to the pulse control module of described boost module, after the DC high voltage receiving the output of described boost module, this pulse control module changes this DC high voltage into DC pulse voltage, add to pin-saving chip and and/or the pin of data storage medium, to realize the physical destroy to it.
7. panel computer according to claim 6, is characterized in that, described detection module comprises:
11 resistance (R11), its first end is connected to node A, and the second end is connected to supply voltage V
bATTERY;
12 resistance (R12), is connected between node A and Node B, wherein, and Node B ground connection;
11 triode (Q11), its base stage is connected to node A by the 13 resistance (R13); Its collector is connected to supply voltage V by the 14 resistance (R14)
bATTERY; Its grounded emitter;
12 P channel MOS tube (M12), its G pin is connected to the collector of described 11 triode (Q11) by the 15 resistance (R15), and its S pin is connected to power supply V
bATTERY; Its D pin is connected to the output terminal of detection module;
11 electric capacity (C11), is connected between described node A and Node B;
Wherein, supply voltage V
bATTERYbe connected to the output terminal of battery power supply system; Described node A and Node B are connected to two output terminals of self-destruction trigger circuit.
8. panel computer according to claim 6, is characterized in that, described boost module comprises:
Energy storage inductor (L31), its first end is connected to the input end of detection module, and the second end is connected to the output terminal of boost module by 21 diodes (D21);
Boosting driving chip (U302), be EUP2586 chip, its VIN pin is connected to the first end of described energy storage inductor (L31); SHDN pin is connected to the input end of detection module by the 21 resistance (R21), and by the 23 electric capacity (C23) ground connection; SW pin is connected to the second end of energy storage inductor (L31); OVP pin is connected to the negative pole end of described diode (D1); GND pin ground connection;
Tank circuit, comprise the 25 electric capacity (C25) in parallel and the 26 electric capacity (C26), both first ends are connected to the output terminal of boost module, the second end ground connection.
9. panel computer according to claim 8, is characterized in that, described boost module also comprises:
Filtering circuit, be made up of the 21 electric capacity (C21) of parallel connection and the 22 electric capacity (C22), both first ends are connected to the input end of detection module jointly, the second end ground connection.
10. panel computer according to claim 8, is characterized in that, described boost module also comprises: negative voltage feedback network, for adjusting the amplitude of booster circuit output voltage; This negative voltage feedback network comprises:
24 electric capacity (C24), its first end is connected to the FB pin of boosting driving chip (U302);
23 resistance (R23), itself and the 24 resistance (R24) are connected in series, first end is connected to the output terminal of boost module, second end connects the 24 resistance R24, is also connected to the FB pin of described boosting driving chip (U302) by the 22 resistance (R22); And
24 resistance (R24), itself and described 23 resistance (R23) are connected in series, and first end is connected to the second end of described 23 resistance (R23), the second end ground connection.
11. panel computers according to claim 6, is characterized in that, described pulse control module comprises:
Source oscillation signal, it produces impulse oscillation signal;
Pulsed electron on-off circuit, comprise: multiple P channel MOS tube, the S pin of each P channel MOS tube is connected to the output terminal of boost module, and G pin is connected to the output terminal of boost module by resistance, and D pin is connected to different pieces of information storage chip and/or the storage medium of panel computer respectively; And
31 triode (Q31), its base stage is connected to the signal output part of source oscillation signal by the 33 resistance (R33), its grounded emitter;
Wherein, the G pin of described 32 P channel MOS tube (M32) is connected to the collector of the 31 triode (Q31) by the 35 resistance (R35) and the 32 diode (D32); The G pin of above-mentioned 33 P channel MOS tube (M33) is connected to the collector of the 31 triode (Q31) by the 34 resistance (R34) and the 31 diode (D31).
12. panel computers according to claim 11, is characterized in that, described source oscillation signal comprises: the 31 not gate (NOT 31) and the 32 not gate (NOT 32); Wherein:
31 not gate (NOT 31) and the 32 not gate (NOT 32) end to end, and the input end of the 31 not gate (NOT 31) is connected to the 32 electric capacity (C32) be connected with the output terminal of described 32 not gate (NOT 32) is connected by the 31 resistance (R31), its output terminal is connected to the output terminal of this source oscillation signal, for exporting described oscillation pulse signal; The output terminal of the 31 not gate (NOT 31) is also connected to the first end of the 32 resistance (R32), and the second end of the 32 resistance (R32) is connected between described 31 resistance (R31) and the 32 electric capacity (C32).
13. panel computers according to claim 11, is characterized in that, in described panel computer, storage chip and/or storage medium comprise: FLASH chip and TF card;
Described pulsed electron on-off circuit comprises: the 32 P channel MOS tube (M32), its S pin is connected to the output terminal of boost module, its G pin is connected to the output terminal of boost module by the 37 resistance (R37), and its D pin is connected to the FLASH chip of panel computer; 33 P channel MOS tube (M33), its S pin is connected to the output terminal of boost module, and its G pin is connected to the output terminal of boost module by the 36 resistance (R36), and its D pin is connected to the TF card of panel computer.
14. panel computers according to claim 2, is characterized in that, described battery power supply system, by arranging, at least retains the electric energy of preset ratio for described self-destruction executive circuit.
15. panel computers according to any one of claim 1 to 14, is characterized in that, also comprise:
Permission control device, this permission control device confirms user identity, and the authority that this user identity is corresponding, to determine which kind of operation user can carry out to panel computer.
16. panel computers according to claim 14, is characterized in that, described permission control device comprises:
Obtain the fingerprint identification device of the finger print information of user;
Store the user ID data storehouse of the corresponding relation of user fingerprints information and user identity;
Store user identity and the rights database to the corresponding relation of operating right; And
The authority decision maker be connected with rights database with described fingerprint identification device, user ID data storehouse, the finger print information that this authority decision maker obtains according to fingerprint identification device, the user identity that this finger print information is corresponding is determined in user ID data storehouse, in rights database, determine the operating right that this user identity is corresponding, and stop user to conduct interviews to the sensitive data outside its operating right.
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| CN201410582417.3A CN104317362A (en) | 2014-10-27 | 2014-10-27 | Tablet personal computer with high data security |
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| CN201410582417.3A CN104317362A (en) | 2014-10-27 | 2014-10-27 | Tablet personal computer with high data security |
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Application publication date: 20150128 |