CN106991341B - Flash memory device with entity destroying function - Google Patents
Flash memory device with entity destroying function Download PDFInfo
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- CN106991341B CN106991341B CN201610809756.XA CN201610809756A CN106991341B CN 106991341 B CN106991341 B CN 106991341B CN 201610809756 A CN201610809756 A CN 201610809756A CN 106991341 B CN106991341 B CN 106991341B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
- G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/60—Protecting data
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Abstract
The invention provides a flash memory device with a physical destroying function, which comprises a controller, a plurality of flash memories and a voltage control circuit, wherein the controller is connected with the flash memories; the voltage control circuit comprises a booster, a step-down transformer and a voltage controller; the booster receives a system voltage to generate a first high voltage; the voltage reducer receives the first high voltage to provide an output voltage to the controller and the flash memory; the voltage controller senses the output voltage generated by the voltage reducer and generates a feedback signal, and when the voltage controller receives a control signal for physical destruction from a computer host, the voltage controller controls the voltage reducer to generate a high-level output voltage by using the feedback signal so as to burn out the controller and the semiconductor physical component of the flash memory by using the high-level output voltage.
Description
Technical Field
The present invention relates to a flash memory device, and more particularly, to a flash memory device with a physical destruction function.
Background
Flash memory devices (SSD, SD card, CF card, flash drive) are commonly used for a secure data storage application, such as: the storage purpose of financial data and military data. When a special emergency or abnormal condition occurs, an external high voltage (e.g., 24V) higher than the operating voltage of the flash memory device can be input to the flash memory device through a host computer to execute a physical destruction procedure for the flash memory device. The controller and the physical components of the flash memory inside the flash memory device will be destroyed by the external high voltage, so as to avoid the doubt that the security data stored in the flash memory device is stolen by others.
The program for executing the physical destruction by using the external high voltage is required to design a circuit capable of generating the external high voltage on the mainboard of the computer host in a customized manner. The customized motherboard will increase the cost of hardware for users with data security requirements.
In view of the above, the present invention provides an innovative physical destruction mechanism, in which the flash memory device provides a high voltage through a built-in voltage control circuit, and executes a physical destruction program through the high voltage provided by the voltage control circuit, so that the flash memory device can perform a destruction operation on the internal controller and the semiconductor physical components of the flash memory.
Disclosure of Invention
An objective of the present invention is to provide a flash memory device with a physical destruction function, wherein a voltage control circuit is built inside the flash memory device, the voltage control circuit can provide a low voltage for normal operation and a high voltage for burning the semiconductor physical components, when the flash memory device executes a physical destruction program, the voltage control circuit outputs the high voltage to the controller and the flash memory, and then the controller and the semiconductor physical components of the flash memory can be burned by the high voltage.
In order to achieve the purpose, the invention adopts the following technical scheme;
a flash memory device with a physical destruction function includes: a controller; a plurality of flash memories; and a voltage control circuit, comprising: a booster for receiving a system voltage to generate a first high voltage; the voltage reducer is connected with the booster, the controller and the flash memory, receives the first high voltage, generates an output voltage and provides the output voltage to the controller and the flash memory; and a voltage controller, connect the step-down transformer, sense the output voltage that the step-down transformer produces, produce and have a feedback signal, when the voltage controller receives a control signal of normal operation, the voltage controller utilizes the feedback signal to control the step-down transformer to produce a low-level output voltage; or, when the voltage controller receives a control signal for physical destruction, the voltage controller controls the voltage reducer to generate a high-level output voltage by using the feedback signal, wherein the low-level output voltage is a low voltage for normal operation of the flash memory device, and the high-level output voltage is a high voltage for destruction of the controller and/or the semiconductor physical component of the flash memory.
In an embodiment of the invention, the voltage controller includes a voltage dividing circuit and a switch, the voltage dividing circuit is connected with the voltage reducer and the switch and senses the output voltage of the voltage reducer, when the switch receives a control signal of normal operation, the switch operates in an off state, a feedback signal generated by the voltage dividing circuit controls the voltage reducer to generate a low-level destruction output voltage, when the switch receives a control signal of an entity, the switch operates in an on state, and the feedback signal generated by the voltage dividing circuit controls the voltage reducer to generate a high-level output voltage.
In an embodiment of the present invention, the voltage divider circuit includes a first resistor, a second resistor, and a third resistor, one end of the first resistor, one end of the second resistor, and one end of the third resistor are commonly connected to a first node, the other end of the first resistor is connected to an output terminal of the voltage reducer, the other end of the second resistor is grounded, the other end of the third resistor is grounded via the switch, a reference voltage is set on the first node, and the switch is controlled to be turned off or on by a control signal of normal operation or a control signal of physical destruction to reflect a corresponding feedback signal on the first node.
In an embodiment of the invention, the flash memory device is connected to a host computer, and the host computer outputs a control signal of normal operation or a control signal of physical destruction to a voltage control circuit of the flash memory device through an input/output port.
In an embodiment of the present invention, the input/output port is a general-purpose input/output port.
In one embodiment of the present invention, the flash memory device is connected to a computer host, the computer host includes a switch unit, when the switch unit is switched to an off state, the computer host sends a control signal for normal operation to the flash memory device, and when the switch unit is switched to an on state, the computer host sends a control signal for physical destruction to a voltage control circuit of the flash memory device.
In an embodiment of the invention, the flash memory device is connected to a host computer, the controller includes an input/output port, the host computer issues an entity destruction command to the controller via a transmission interface, and when the controller receives the entity destruction command, the controller instantiates a destruction control signal and transmits the entity destruction control signal to the voltage controller via the input/output port.
In an embodiment of the present invention, a latch circuit is disposed between the controller and the voltage controller, and the latch circuit is used for keeping the control signal of the physical destruction.
In an embodiment of the present invention, the latch circuit is a flip-flop.
The present invention further provides a flash memory device with an entity destruction function, which includes: a controller; a plurality of flash memories; and a voltage control circuit, comprising: a booster for receiving a system voltage to generate a first high voltage; the voltage reducer is connected with the booster, the controller and the flash memory, receives the first high voltage, generates an output voltage and provides the output voltage to the controller and the flash memory; and a voltage controller connected with the voltage reducer, sensing the output voltage generated by the voltage reducer and generating a feedback signal, wherein when the voltage controller receives a control signal for physical destruction, the voltage controller controls the voltage reducer to generate a high-level output voltage by using the feedback signal, and the high-level output voltage is the high voltage of a semiconductor physical component for destroying the controller and/or the flash memory.
The invention has the advantages that:
the flash memory device with the entity destroying function of the invention provides the low voltage for normal operation and the high voltage for burning the semiconductor entity components through the built-in voltage control circuit, when the flash memory device executes the entity destroying program, the voltage control circuit outputs the high voltage to the controller and the flash memory, and the semiconductor entity components of the controller and the flash memory can be burnt by the high voltage.
Drawings
FIG. 1 is a schematic structural diagram of a flash memory device according to an embodiment of the present invention.
FIG. 2 is a schematic structural diagram of a flash memory device according to another embodiment of the present invention.
Fig. 3 is a detailed structural diagram of the voltage controller of the present invention.
Detailed Description
Fig. 1 is a schematic structural diagram of a flash memory device according to an embodiment of the invention. As shown in the figure, the flash memory device 30 is electrically connected to a host computer 10, and performs data transmission with the host computer 10 through a transmission interface 101. The transmission interface 101 is a data transmission interface conforming to USB, PCIe, SATA3 or other standard specifications. In the present invention, the host computer 10 can execute a normal operation program or a destruction program of a semiconductor device with respect to the flash memory device 30.
The flash memory device 30 includes a controller 31, a plurality of flash memories 33, and a voltage control circuit 35. The voltage control circuit 35 includes a voltage booster 36, a voltage reducer 37 and a voltage controller 38, and the voltage reducer 37 is connected to the controller 31, the flash memory 33, the voltage booster 36 and the voltage controller 38, respectively. The computer host 10 can provide a system voltage Vs(e.g., 3V or 5V) to the flash memory device 30. The booster 36 receives the system voltage VsThen, for the system voltage VsBoosting to generate a first high voltage V1(e.g., 12V). The voltage reducer 37 receives the first high voltage V1To generate an output voltage V at its output terminalOUT. In the present invention, the voltage reducer 37 is an adjustable voltage reducer, and the voltage controller 38 can sense the output voltage V of the voltage reducer 37OUTAnd generates a feedback signal FBUsing the feedback signal FBRegulating the output voltage V of the step-down transformer 37OUT. In one embodiment of the present invention, the feedback signal FBOr may be a current signal.
In an embodiment of the present invention, the host computer 10 includes an input/output port 103, such as: general Purpose Input/Output (GPIO) ports. The input/output port 103 is connected to the voltage controller 38 of the flash memory device 30. The host computer 10 transmits a control signal C for normal operation via the input/output port 1031Or a control signal C for physical destruction2To the voltage control circuit 38. Control signal C for normal operation1A Low level (Low) logic signal, and a control signal C for physical destruction2Is a logic signal with high level (Hi). When the voltage controller 38 receives the control signal C for normal operation1Using a feedback signal FBThe control buck converter 37 generates a low level output voltage VOUTFor example: 1.8V or 3.3V, the low level output voltage VOUTA low voltage that provides for proper operation of the flash memory device 30. Alternatively, when the voltage controller 38 receives the control signal C for physical destruction2Using a feedback signal FBThe control voltage reducer 37 generates an output voltage V with a high levelOUTFor example: 11V or other high voltage, the output voltage of the high levelVOUTIs a high voltage capable of being used to destroy physical components of the controller 31 and/or the flash memory 33. In the present embodiment, the control signal C1、C2It can also be generated by the operation of an APP program, an operation interface or an external electronic device with a remote control interface.
Furthermore, in another embodiment of the present invention, the computer host 10 further includes a switch unit 105. The switching unit 105 is connected to the voltage controller 38 of the flash memory device 30. When the switch unit 105 is switched to an off state, the host computer 10 generates the control signal C for normal operation1And transmits a control signal C for normal operation1To the voltage controller 38; alternatively, when the switch unit 105 is switched to an on state, the host computer 10 instantiates the destruction control signal C2And transmits a control signal C for physical destruction2To the voltage controller 38.
Alternatively, as shown in fig. 2, in another embodiment of the present invention, the controller 31 of the flash memory device 30 includes an input/output port 311, such as: and (4) GPIO. The input/output port 311 is connected to the voltage controller 38. When the host computer 10 wants to execute a normal operation program for the flash memory device 30, a normal operation command 102 is transmitted to the controller 31 through the transmission interface 101. When the controller 31 receives the normal operation command 102, it will generate the control signal C for normal operation1And transmits the control signal C of normal operation through the input/output port 3111To the voltage controller 38, the voltage controller 38 will operate according to the control signal C of the normal operation1By using a feedback signal FBThe control buck converter 37 generates a low level output voltage VOUT. Alternatively, when the host computer 10 wants to execute a physical destruction program on the flash memory device 30, the transmission interface 101 is used to transmit a physical destruction command 104 to the controller 31. The controller 31 receives the entity destruction command 104 and then sends the control signal C for instantiation destruction2And transmits the control signal C for physical destruction via the input/output port 3112To the voltage controller 38, the voltage controller 38 will control the destruction according to the physical destruction control signal C2By using a feedback signal FBThe control voltage reducer 37 generates a high levelOutput voltage V of bitOUT。
Referring to fig. 2, when the host computer 10 issues the physical destruction command 104 to the flash memory device 30, the controller 31 may also be destroyed and disabled immediately, and cannot provide the control signal C for the physical destruction continuously2To the voltage controller 38 to cause the output voltage VOUTIt is not always maintained in a high voltage state, and thus some of the physical components of the flash memory 33 may not be destroyed. Thus, the flash memory device 30 of the present embodiment further includes a latch circuit 32 between the controller 31 and the voltage controller 38. The latch circuit 32 is used to hold the signal transmitted from the input/output port 311, such as: control signal C1、C2. Then, when the controller 38 has been destroyed, the latch circuit 32 can still continuously output the control signal C for physical destruction2To the voltage controller 38, so that all the physical components of the flash memory 33 can be driven by the high level output voltage VOUTAnd (4) destroying the waste gas. Furthermore, in an embodiment of the present invention, the latch circuit 32 can be a flip-flop, such as: d type flip-flop, SR flip-flop, JK flip-flop.
Fig. 3 is a schematic diagram showing a detailed structure of the voltage controller according to the present invention. As shown, the voltage controller 38 includes a voltage divider 380 and a switch 387. The voltage divider 380 is composed of a plurality of resistors, is connected to the voltage reducer 37 and the switch 387, and senses the output voltage V of the voltage reducer 37OUT. The voltage dividing resistance of the voltage dividing circuit 38 will be changed according to the on/off of the switch 387, thereby generating the feedback signal FB。
When the switch 387 receives the control signal C of normal operation1When the switch 387 is in an off state, the feedback signal F generated by the voltage divider 380BWill control the buck converter 37 to produce a low level output voltage VOUT. When the switch 387 receives the control signal C for destroying the entity2When the switch 387 is in a conducting state, the feedback signal F generated by the voltage dividing circuit 380BWill control the voltage reducer 37 to generate the output voltage V with high levelOUT。
Further, the voltage divider 380 is a packageIncludes a first resistor (R1)381, a second resistor (R2)383, and a third resistor (R3) 385. The first resistor 381, the second resistor 383 and the third resistor 385 are respectively a fixed resistor or a variable resistor. One end of the first resistor 381, one end of the second resistor 383, and one end of the third resistor 385 are commonly connected to a first node 382, the other end of the first resistor 381 is connected to an output terminal of the voltage reducer 37, the other end of the second resistor 383 is grounded, and the other end of the third resistor 385 is grounded via the switch 387. A reference voltage Vref is set on the first node 382, and the reference voltage Vref is a constant value, for example: 0.6V. By means of a control signal C1Or C2Controls the on/off of the switch 387 to respond to the corresponding feedback signal F at the first node 382B。
The voltage divider 380 of the present embodiment has a first formula (1) and a second formula (2). When switch 387 is turned off, flash memory device 30 operates in a normal operation procedure, and output voltage V of voltage reducer 37OUTWill be determined by the first equation (1).
When the switch 387 is turned on, the flash memory device 30 operates in a destruction procedure of the semiconductor physical components, and the output voltage V of the voltage reducer 37OUTWill be determined by the second equation (2).
Moreover, the structure of the voltage divider 380 is only an embodiment of the present invention. In practical application of the present invention, the number of resistors, the resistance of the resistors and the series-parallel connection between the resistors in the voltage divider 380 can be determined according to the desired output voltage VOUTThe corresponding configuration and design are performed.
In summary, the flash memory device 30 of the present invention provides a low voltage for normal operation and a high voltage for burning out semiconductor physical components through a voltage control circuit 35 built therein. When the flash memory device 30 executes a physical destruction procedure, the voltage control circuit 35 outputs a high voltage to the controller 31 and the flash memory 33, so that the semiconductor physical components of the controller 31 and the flash memory 33 can be burned by the high voltage.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, i.e., all equivalent variations and modifications in the shape, structure, characteristics and spirit of the present invention as described in the claims should be included in the scope of the present invention.
Claims (8)
1. A flash memory device having an entity destruction function, comprising:
a controller;
a plurality of flash memories; and
a voltage control circuit, comprising:
a booster for receiving a system voltage to generate a first high voltage;
the voltage reducer is connected with the booster, the controller and the flash memory, receives the first high voltage, generates an output voltage and provides the output voltage to the controller and the flash memory; and
a voltage controller connected to the voltage reducer for sensing the output voltage generated by the voltage reducer and generating a feedback signal, wherein when the voltage controller receives a control signal for normal operation, the voltage controller controls the voltage reducer to generate a low-level output voltage by using the feedback signal; or, when the voltage controller receives a control signal for physical destruction, the voltage controller controls the voltage reducer to generate a high-level output voltage by using the feedback signal, wherein the low-level output voltage is a low voltage for normal operation of the flash memory device, and the high-level output voltage is a high voltage for destruction of the controller and/or the semiconductor physical component of the flash memory;
the voltage controller comprises a voltage dividing circuit and a switch, the voltage dividing circuit is connected with the voltage reducer and the switch and senses the output voltage of the voltage reducer, when the switch receives the control signal of normal operation, the switch is operated in a cut-off state, the feedback signal generated by the voltage dividing circuit controls the voltage reducer to generate the output voltage with low level, when the switch receives the control signal of entity destruction, the switch is operated in a conducting state, and the feedback signal generated by the voltage dividing circuit controls the voltage reducer to generate the output voltage with high level.
2. The flash memory device of claim 1, wherein the voltage divider circuit comprises a first resistor, a second resistor and a third resistor, one end of the first resistor, one end of the second resistor and one end of the third resistor are connected to a first node, the other end of the first resistor is connected to an output terminal of the voltage reducer, the other end of the second resistor is grounded, the other end of the third resistor is grounded via the switch, a reference voltage is set on the first node, and the switch is controlled to turn off or on by the control signal for normal operation or the control signal for physical destruction to reflect the corresponding feedback signal on the first node.
3. The flash memory device with physical destruction function of claim 1, wherein the flash memory device is connected to a host computer, and the host computer outputs the control signal for normal operation or the control signal for physical destruction to the voltage control circuit of the flash memory device via an input/output port.
4. The flash memory device with physical destruction function of claim 3, wherein the I/O port is a general-purpose I/O port.
5. The flash memory device with entity destroying function according to claim 1, wherein said flash memory device is connected to a host computer, said host computer comprises a switch unit, when said switch unit is switched to an off state, said host computer sends out said control signal for normal operation to said flash memory device, when said switch unit is switched to an on state, said host computer sends out said control signal for entity destroying to said voltage control circuit of said flash memory device.
6. The flash memory device with entity destruction function of claim 1, wherein the flash memory device is connected to a host computer, the controller comprises an input/output port, the host computer issues an entity destruction command to the controller through a transmission interface, and when the controller receives the entity destruction command, the controller generates the control signal for entity destruction and transmits the control signal for entity destruction to the voltage controller through the input/output port.
7. The flash memory device with physical destruction function of claim 6, wherein a latch circuit is disposed between the controller and the voltage controller for keeping the control signal of physical destruction.
8. The flash memory device of claim 7, wherein the latch circuit is a flip-flop.
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| CN201610809756.XA CN106991341B (en) | 2016-09-08 | 2016-09-08 | Flash memory device with entity destroying function |
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| CN201610809756.XA CN106991341B (en) | 2016-09-08 | 2016-09-08 | Flash memory device with entity destroying function |
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| CN106991341B true CN106991341B (en) | 2020-04-24 |
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| CN111818288A (en) * | 2020-07-08 | 2020-10-23 | 上海威固信息技术股份有限公司 | Multi-format video acquisition and storage system with storage card and video acquisition card separately designed |
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