CN104298159A - Circuit structure of electromechanical equipment and working method - Google Patents
Circuit structure of electromechanical equipment and working method Download PDFInfo
- Publication number
- CN104298159A CN104298159A CN201410568500.5A CN201410568500A CN104298159A CN 104298159 A CN104298159 A CN 104298159A CN 201410568500 A CN201410568500 A CN 201410568500A CN 104298159 A CN104298159 A CN 104298159A
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- CN
- China
- Prior art keywords
- cpld
- ground
- low voltage
- lvds interface
- voltage differential
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Classifications
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0421—Multiprocessor system
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25179—Parallel
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25328—Module connected to parallel bus
Abstract
The invention discloses a circuit structure of electromechanical equipment and a working method. The circuit structure comprises a first CPLD, a second CPLD, a first LVDS interface, a second LVDS interface, a clock line and a data line. The first CPLD is electrically connected with the first LVDS interface. The second CPLD is electrically connected with the second LVDS interface. The first LVDS interface is electrically connected with the second LVDS interface through the clock line and the data line. By means of the LVDS technology, a small number of lines, namely, eight lines, are obtained; data are packaged and unpackaged through the CPLD integration technology, a large number of signals are transmitted between two places which are a certain distance away from each other, the line layout complexity in the electromechanical equipment and other devices is lowered, and meanwhile remarkable effects on improving the reliability of the system and shortening the trouble removing time are achieved.
Description
Technical field
The present invention relates to circuit structure, be specifically related to a kind of circuit structure and method of work of electromechanical integration equipment.
Background technology
Along with the raising of labor cost, the automatically processing device of requirement becomes increasingly complex, and simultaneously along with a large amount of of Embedded computer system popularize, distributed AC servo system becomes inexorable trend.Therefore in the dcs of complexity, complicacy and the reliability of wiring just become very outstanding, traditional method, each signal demand of usual outside wire, another one place (as scene) is moved to from a place (as Main Control Tank), if system has hundreds of root signal, even thousands of, this brings great difficulty certainly to remote wiring.As in embroidery machine, pattern sewing machine and vamp machine system, be arranged in on-the-spot signal to have: head signal, framework four-way are offside, trimming, button line, hook line, main shaft signal, main spindle's, frame position, clamp, etc., if all connected from main control CPU, its wiring mixes well imagines, tradition often needs master control to be positioned over scene, and this makes troubles to again the operability (figure display, the operation of various data card, network linking operation etc.) of master control.
Summary of the invention
Object of the present invention utilizes LVDS technology, realizes a small amount of several threads, is conciliate wrap in a large amount of signal of two localized transmissions separated by a distance by the packing of data, the routing complexity with reduce engine in electrical integrated and miscellaneous equipment.
The present invention is directed to the problems referred to above, provide a kind of circuit structure and method of work of electromechanical integration equipment.
According to an aspect of the present invention, provide a kind of circuit structure of electromechanical integration equipment, comprise a CPLD, the 2nd CPLD, the first Low Voltage Differential Signal LVDS interface, the second Low Voltage Differential Signal LVDS interface, clock and data line; A described CPLD is electrically connected the first Low Voltage Differential Signal LVDS interface; Described 2nd CPLD is electrically connected the second Low Voltage Differential Signal LVDS interface; Described first Low Voltage Differential Signal LVDS interface and the second Low Voltage Differential Signal LVDS interface are electrically connected by clock line and data line.
According to another aspect of the invention, provide a kind of method of work of circuit structure of electromechanical integration equipment, comprise the following steps:
S1, when all multi signal will be sent to the second ground from the first ground, has all multi signal will be sent to the first ground from the second ground simultaneously, packs, form the serial data of a string length at a CPLD at the first place to signal group; Adding check code at each serial data rear portion simultaneously, by using the high-frequency clock of CPLD inside, serial data being sent in the mode of a time clock data bit;
S2, in order to the reliability of long-distance transmissions, by the first Low Voltage Differential Signal LVDS interface by signal synchronism output;
S3, be located in second and first carry out level translation to the LVDS Low Voltage Differential Signal of the first ground transmission, the clock that utilization is brought and data are located in second the 2nd CPLD moving into the second ground serially;
S4, the second the 2nd CPLD be located in are after all receiving all signals, and code of testing is checked;
S5, in the incorrect situation of check code, the reception value that local data group retains last time is constant; When check code is correct, the new data set of reception is located in second and presents;
S6 is when being sent to the first ground from the second ground to signal group, identical with above-mentioned pattern.
Advantage of the present invention:
The present invention utilizes LVDS technology, realize 8 a small amount of lines, pack by the data of CPLD integrated technology and unpack, to transmit two local a large amount of signals (as 200) separated by a distance, routing complexity with reduce engine in electrical integrated and miscellaneous equipment, simultaneously to the reliability of system, reduce troubleshooting time there is obvious effect.
Except object described above, feature and advantage, the present invention also has other object, feature and advantage.Below with reference to figure, the present invention is further detailed explanation.
Accompanying drawing explanation
The accompanying drawing forming a application's part is used to provide a further understanding of the present invention, and schematic description and description of the present invention, for explaining the present invention, does not form inappropriate limitation of the present invention.
Fig. 1 is the electrical block diagram of a kind of electromechanical integration equipment of the present invention;
Fig. 2 is the method for work structure flow chart of the circuit of a kind of electromechanical integration equipment of the present invention.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
Embodiment 1
With reference to figure 1, the circuit structure of a kind of electromechanical integration equipment as shown in Figure 1, comprises a CPLD, the 2nd CPLD, the first Low Voltage Differential Signal LVDS interface, the second Low Voltage Differential Signal LVDS interface, clock and data line; A described CPLD is electrically connected the first Low Voltage Differential Signal LVDS interface; Described 2nd CPLD is electrically connected the second Low Voltage Differential Signal LVDS interface; Described first Low Voltage Differential Signal LVDS interface and the second Low Voltage Differential Signal LVDS interface are electrically connected by clock line and data line.
Embodiment 2
With reference to figure 2, the method for work of the circuit structure of a kind of electromechanical integration equipment as shown in Figure 2, comprises the following steps:
S1, when all multi signal will be sent to the second ground from the first ground, has all multi signal will be sent to the first ground from the second ground simultaneously, packs, form the serial data of a string length at a CPLD at the first place to signal group; Adding check code at each serial data rear portion simultaneously, by using the high-frequency clock of CPLD inside, serial data being sent in the mode of a time clock data bit;
S2, in order to the reliability of long-distance transmissions, by the first Low Voltage Differential Signal LVDS interface by signal synchronism output;
S3, be located in second and first carry out level translation to the LVDS Low Voltage Differential Signal of the first ground transmission, the clock that utilization is brought and data are located in second the 2nd CPLD moving into the second ground serially;
S4, the second the 2nd CPLD be located in are after all receiving all signals, and code of testing is checked;
S5, in the incorrect situation of check code, the reception value that local data group retains last time is constant; When check code is correct, the new data set of reception is located in second and presents;
S6 is when being sent to the first ground from the second ground to signal group, identical with above-mentioned pattern.
Ultimate principle of the present invention describes as follows: preferably have the second point (on-the-spot board) that 100 (referring between 10-1000) signals send away from the first point (master control), there is 100 Information Monitoring points second point from afar to deliver to the first point simultaneously, if adopt classic method at least to want 200 lines, obviously too complicated; If employing this method, can by the CPLD of monolithic (Complex programmable logical device) chip 100 data formed a tape verifying and packet, by LVDS (Low Voltage Differential Signal), pass with serial ports at a high speed, also the CPLD of a monolithic is had in other one end, the tape verifying received and packet carry out CPLD and unpack, and points 100 independently signal present, just achieve 100 signal transmission between two places; The transmission that rightabout 100 signals are also of this sort, so just achieves the mutual biography of 200 signals.
In LVDS serial ports transmittance process, in order to ensure the promptness of Signal transmissions, sufficiently high speed should be adopted, such as each signal wire time delay is no more than for ten thousand/second, then the standard baud rate of LVDS serial ports should be not less than 2MHz, usually can adopt the general Internet Engineering Task speed of tens to hundreds of MHz, be convenient to wire rod buying and implement.
LVDS represents differential signal, and need two lines, consider two-way clock and data-signal, therefore the program needs 8 lines altogether.Can share with internet line.
These 8 lines are actual represents 4 signals, each signal uses the differential type transmission taking 2 lines, carried out the high or low attribute of signal transmission by the bias direction of 2 signal potentials, relative to the range attenuation of conventional transmission, this transmission can improve distance and the reliability of transmission.These 4 signals are from the first ground to the serial data on the second ground and clock string respectively, from the second ground to the serial data on the first ground and clock string.Obviously, in unidirectional application scenario, only need 2 signals, 4 lines just enough.
In Fig. 1, CK1 is the clock string from the first ground to the second ground, and DA1 is the serial data from the first ground to the second ground, and CK2 is the clock string from the second ground to the first ground, and DA2 is the serial data from the second ground to the first ground.
The present invention utilizes LVDS technology, realize 8 a small amount of lines, pack by the data of CPLD integrated technology and unpack, to transmit two local a large amount of signals (as 200) separated by a distance, routing complexity with reduce engine in electrical integrated and miscellaneous equipment, simultaneously to the reliability of system, reduce troubleshooting time there is obvious effect.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (2)
1. a circuit structure for electromechanical integration equipment, is characterized in that, comprises a CPLD, the 2nd CPLD, the first Low Voltage Differential Signal LVDS interface, the second Low Voltage Differential Signal LVDS interface, clock and data line; A described CPLD is electrically connected the first Low Voltage Differential Signal LVDS interface; Described 2nd CPLD is electrically connected the second Low Voltage Differential Signal LVDS interface; Described first Low Voltage Differential Signal LVDS interface and the second Low Voltage Differential Signal LVDS interface are electrically connected by clock line and data line.
2. a method of work for the circuit structure of electromechanical integration equipment, is characterized in that, comprises the following steps:
S1, when all multi signal will be sent to the second ground from the first ground, has all multi signal will be sent to the first ground from the second ground simultaneously, packs, form the serial data of a string length at a CPLD at the first place to signal group; Adding check code at each serial data rear portion simultaneously, by using the high-frequency clock of CPLD inside, serial data being sent in the mode of a time clock data bit;
S2, in order to the reliability of long-distance transmissions, by the first Low Voltage Differential Signal LVDS interface by signal synchronism output;
S3, be located in second and first carry out level translation to the LVDS Low Voltage Differential Signal of the first ground transmission, the clock that utilization is brought and data are located in second the 2nd CPLD moving into the second ground serially;
S4, the second the 2nd CPLD be located in are after all receiving all signals, and code of testing is checked;
S5, in the incorrect situation of check code, the reception value that local data group retains last time is constant; When check code is correct, the new data set of reception is located in second and presents;
S6 is when being sent to the first ground from the second ground to signal group, identical with above-mentioned pattern.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410568500.5A CN104298159A (en) | 2014-10-23 | 2014-10-23 | Circuit structure of electromechanical equipment and working method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201410568500.5A CN104298159A (en) | 2014-10-23 | 2014-10-23 | Circuit structure of electromechanical equipment and working method |
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| CN104298159A true CN104298159A (en) | 2015-01-21 |
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| CN201410568500.5A Pending CN104298159A (en) | 2014-10-23 | 2014-10-23 | Circuit structure of electromechanical equipment and working method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106569462A (en) * | 2015-10-07 | 2017-04-19 | 宁夏琪凯节能设备有限公司 | Energy-saving electromechanical circuit |
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| CN101179340A (en) * | 2007-12-12 | 2008-05-14 | 熊猫电子集团有限公司 | Method and device for low-swing difference signal bus transfer digital intermediate frequency |
| US20080116919A1 (en) * | 2006-11-21 | 2008-05-22 | Yu Li | Fpga and method and system for configuring and debugging a fpga |
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| JP2008310130A (en) * | 2007-06-15 | 2008-12-25 | Konica Minolta Holdings Inc | Control unit and head-mounted display device |
| CN101500153A (en) * | 2009-02-20 | 2009-08-05 | 西北核技术研究所 | High frame rate high sensitivity optical fiber transmission type EMCCD camera system |
| WO2012033707A1 (en) * | 2010-09-10 | 2012-03-15 | SMSC Holdings S.à.r.l | Monitor chaining and docking mechanism |
| CN204203685U (en) * | 2014-10-23 | 2015-03-11 | 福州天虹电脑科技有限公司 | A kind of circuit structure of electromechanical integration equipment |
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2014
- 2014-10-23 CN CN201410568500.5A patent/CN104298159A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101009542A (en) * | 2006-01-27 | 2007-08-01 | 中国科学院空间科学与应用研究中心 | Extension device of data network node device port |
| US20080116919A1 (en) * | 2006-11-21 | 2008-05-22 | Yu Li | Fpga and method and system for configuring and debugging a fpga |
| JP2008310130A (en) * | 2007-06-15 | 2008-12-25 | Konica Minolta Holdings Inc | Control unit and head-mounted display device |
| CN101179340A (en) * | 2007-12-12 | 2008-05-14 | 熊猫电子集团有限公司 | Method and device for low-swing difference signal bus transfer digital intermediate frequency |
| CN101321302A (en) * | 2008-07-08 | 2008-12-10 | 浙江大学 | Three-dimensional real-time acquisition system based on camera array |
| CN101500153A (en) * | 2009-02-20 | 2009-08-05 | 西北核技术研究所 | High frame rate high sensitivity optical fiber transmission type EMCCD camera system |
| WO2012033707A1 (en) * | 2010-09-10 | 2012-03-15 | SMSC Holdings S.à.r.l | Monitor chaining and docking mechanism |
| CN204203685U (en) * | 2014-10-23 | 2015-03-11 | 福州天虹电脑科技有限公司 | A kind of circuit structure of electromechanical integration equipment |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106569462A (en) * | 2015-10-07 | 2017-04-19 | 宁夏琪凯节能设备有限公司 | Energy-saving electromechanical circuit |
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