CN106569462A - Energy-saving electromechanical circuit - Google Patents
Energy-saving electromechanical circuit Download PDFInfo
- Publication number
- CN106569462A CN106569462A CN201510655516.4A CN201510655516A CN106569462A CN 106569462 A CN106569462 A CN 106569462A CN 201510655516 A CN201510655516 A CN 201510655516A CN 106569462 A CN106569462 A CN 106569462A
- Authority
- CN
- China
- Prior art keywords
- cpld
- lvds interface
- lvds
- electrically connected
- energy
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/418—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS], computer integrated manufacturing [CIM]
- G05B19/4185—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS], computer integrated manufacturing [CIM] characterised by the network communication
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
Abstract
The invention discloses an energy-saving electromechanical circuit which comprises a first CPLD, a second CPLD, a first low-voltage difference signal (LVDS) interface, a second LVDS interface, clock and data lines, wherein the first CPLD is electrically connected to the first LVDS interface, the second CPLD is electrically connected to the second LVDS interface, and the first LVDS interface and the second LVDS interface are electrically connected through a clock line and a data line. Only eight lines are employed by using LVDS technology. Large quantity of signals are transmitted between two places with a certain distance through packing and unpacking of CPLD integration technology, so that wiring complexity of electromechanical integration and other equipment. The energy-saving electromechanical circuit is of great importance to system reliability and trouble-shooting time reduction.
Description
Technical field
The present invention relates to circuit structure, and in particular to a kind of energy-conservation electromechanical circuits.
Background technology
With the raising of labor cost, it is desirable to automatically processing device become increasingly complex, while with
A large amount of popularizations of Embedded computer system, distributed AC servo system becomes inexorable trend.Therefore multiple
In miscellaneous dcs, the complexity and reliability of wiring just become to project very much, traditional side
Method, generally one wire of outside each signal demand, move to separately from a place (such as Main Control Tank)
An outer place (such as scene), if system has hundreds of signal, even thousands of, this gives certainly
Remote wiring tape carrys out great difficulty.Such as in embroidery machine, pattern sewing machine and vamp machine system, it is arranged in
The signal at scene has:Head signal, offside framework four-way, trimming, fastening wire, hook line, main shaft signal,
Main spindle's, frame position, clamp, etc., if all connected from main control CPU, its wiring is mixed
Miscellaneous to well imagine, tradition generally requires master control to be positioned over scene, and this is again to the operability (figure of master control
Shape shows, various data cards are operated, network linking is operated etc.) make troubles.
The content of the invention
The purpose of the present invention utilizes LVDS technologies, realizes a small amount of several threads, by the packing of data and
Unpack in the substantial amounts of signal of two localized transmissions separated by a distance, with reduce electromechanical integration and its
Routing complexity in its equipment.
The present invention is directed to the problems referred to above, there is provided a kind of energy-conservation electromechanical circuits and method of work.
According to an aspect of the invention, there is provided a kind of energy-conservation electromechanical circuits, including a CPLD,
2nd CPLD, the first Low Voltage Differential Signal LVDS interface, the second Low Voltage Differential Signal LVDS interface,
Clock and data wire;First CPLD is electrically connected with the first Low Voltage Differential Signal LVDS interface;Institute
State the 2nd CPLD and be electrically connected with the second Low Voltage Differential Signal LVDS interface;The first low-voltage differential letter
Number LVDS interface and the second Low Voltage Differential Signal LVDS interface are by clock line and electrode data line is electrically connected with.
Advantages of the present invention:
The present invention utilizes LVDS technologies, a small amount of 8 piece line is realized, by the number of CPLD integrated technologies
According to packing and unpacking, to transmit a large amount of signals (such as 200) in two places separated by a distance, with
Electromechanical integration and the routing complexity in miscellaneous equipment are reduced, while the reliability, reduction to system
Troubleshooting time has obvious effect.
In addition to objects, features and advantages described above, also other purposes of the invention,
Feature and advantage.Below with reference to figure, the present invention is further detailed explanation.
Description of the drawings
The accompanying drawing for constituting the part of the application is used for providing a further understanding of the present invention, the present invention
Schematic description and description be used for explain the present invention, do not constitute inappropriate limitation of the present invention.
Fig. 1 is a kind of energy-conservation electromechanics circuit diagram of the present invention;
Fig. 2 is a kind of method of work structure flow chart of the circuit of electromechanical equipment of the present invention.
Specific embodiment
In order that the objects, technical solutions and advantages of the present invention become more apparent, below in conjunction with accompanying drawing
And embodiment, the present invention will be described in further detail.It should be appreciated that described herein concrete
Embodiment only to explain the present invention, is not intended to limit the present invention.
With reference to Fig. 1, a kind of energy-conservation electromechanical circuits as shown in Figure 1, including a CPLD, the 2nd CPLD,
First Low Voltage Differential Signal LVDS interface, the second Low Voltage Differential Signal LVDS interface, clock and data
Line;First CPLD is electrically connected with the first Low Voltage Differential Signal LVDS interface;2nd CPLD
It is electrically connected with the second Low Voltage Differential Signal LVDS interface;The first Low Voltage Differential Signal LVDS interface
With the second Low Voltage Differential Signal LVDS interface by clock line and electrode data line is electrically connected with.
With reference to Fig. 2, a kind of method of work of energy-conservation electromechanical circuits as shown in Figure 2 is comprised the following steps:
S1, when all multi signals will be sent to the second ground from the first ground, while there is all multi signals will be from second
Be sent to the first ground, the CPLD at first packs to signal group, constitute a string of length
Serial data;Simultaneously check code is added at each serial data rear portion, during by using high speed inside CPLD
Clock is sent serial data in the way of one data bit of a clock pulses;
S2, for the reliability of long-distance transmissions, will be believed by the first Low Voltage Differential Signal LVDS interface
Number synchronism output;
S3, be located in second first carries out level translation to the LVDS Low Voltage Differential Signals of the first ground transmission,
It is located in the 2nd CPLD that serially moves into the second ground second using the clock and data brought;
After all signals are received, code of testing is checked for S4, the second the 2nd CPLD being located in;
S5, in the case of check code is incorrect, the reception value that local data group retains last time is constant;
In the case of check code is correct, the new data set of reception is located in second and is presented;
S6 is identical with above-mentioned pattern when to be sent to the first ground from the second ground to signal group.
The ultimate principle of the present invention is described below:Preferably have 100 (referring between 10-1000)
The second point (live board) that signal sends away from first point (master control), while there is 100 collections
Information point second point from afar is sent at first point, if at least wanting 200 lines using traditional method,
Obviously it is excessively complicated;If using this method, could be by the CPLD (Complex programmable logical device) of monolithic
Chip forms 100 data the packet of one tape verifying sum, by LVDS (Low Voltage Differential Signal),
Passed with the serial ports of high speed, also have the CPLD of a monolithic in other end, the band for receiving
The packet of verification sum carries out CPLD unpackings, and point 100 independent signals are presented, and are just realized
100 signal transmissions between two places;The also of this sort transmission of rightabout 100 signals,
So just realize the mutual biography of 200 signals.
In LVDS serial ports transmittance process, in order to ensure the promptness of signal transmission, should adopt sufficiently high
Speed, such as each holding wire time delay is less than a ten thousandth second, then the standard baud of LVDS serial ports
Rate should be not less than 2MHz, can generally adopt general tens to hundreds of MHz Internet Engineering Task speed,
It is easy to wire rod buying and implements.
LVDS represents differential signal, needs both threads, it is considered to two-way clock and data signal, therefore
The program needs 8 lines altogether.Can share with the Internet line.
This 8 lines are actual to represent 4 signals, and each signal is transmitted using the differential type for taking 2 lines,
By the bias direction of 2 signal potentials come the high or low attribute of transmission signal, relative to conventional transmission
Range attenuation, this transmission can improve the distance and reliability of transmission.This 4 signals are respectively
Serial data and clock string from the first ground to the second ground, the serial data and clock from the second ground to the first ground
String.Obviously, in unidirectional application scenario, 2 signals, 4 lines are only needed just enough.
In Fig. 1, CK1 is the clock string from the first ground to the second ground, and DA1 is from the first ground to the second ground
Serial data, CK2 is the clock string from the second ground to the first ground, and DA2 is from the second ground to the first ground
Serial data.
The present invention utilizes LVDS technologies, a small amount of 8 piece line is realized, by the number of CPLD integrated technologies
According to packing and unpacking, to transmit a large amount of signals (such as 200) in two places separated by a distance, with
Electromechanical integration and the routing complexity in miscellaneous equipment are reduced, while the reliability, reduction to system
Troubleshooting time has obvious effect.
Presently preferred embodiments of the present invention is the foregoing is only, it is all at this not to limit the present invention
Within bright spirit and principle, any modification, equivalent substitution and improvements made etc. should be included in
Within protection scope of the present invention.
Claims (1)
1. a kind of energy-conservation electromechanical circuits, it is characterised in that including a CPLD, the 2nd CPLD, first
Low Voltage Differential Signal LVDS interface, the second Low Voltage Differential Signal LVDS interface, clock and data wire;Described
One CPLD is electrically connected with the first Low Voltage Differential Signal LVDS interface;It is low that 2nd CPLD is electrically connected with second
Pressure reduction sub-signal LVDS interface;The first Low Voltage Differential Signal LVDS interface and the second Low Voltage Differential Signal
LVDS interface is by clock line and electrode data line is electrically connected with.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201510655516.4A CN106569462A (en) | 2015-10-07 | 2015-10-07 | Energy-saving electromechanical circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN201510655516.4A CN106569462A (en) | 2015-10-07 | 2015-10-07 | Energy-saving electromechanical circuit |
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CN106569462A true CN106569462A (en) | 2017-04-19 |
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CN201510655516.4A Pending CN106569462A (en) | 2015-10-07 | 2015-10-07 | Energy-saving electromechanical circuit |
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN202548627U (en) * | 2012-04-01 | 2012-11-21 | 上海市电力公司 | EtherCAT network control unit of power quality regulation device |
CN203070047U (en) * | 2012-11-07 | 2013-07-17 | 国网智能电网研究院 | EtherCAT communication management device for dual-core based power electronic equipment |
CN104298159A (en) * | 2014-10-23 | 2015-01-21 | 福州天虹电脑科技有限公司 | Circuit structure of electromechanical equipment and working method |
-
2015
- 2015-10-07 CN CN201510655516.4A patent/CN106569462A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN202548627U (en) * | 2012-04-01 | 2012-11-21 | 上海市电力公司 | EtherCAT network control unit of power quality regulation device |
CN203070047U (en) * | 2012-11-07 | 2013-07-17 | 国网智能电网研究院 | EtherCAT communication management device for dual-core based power electronic equipment |
CN104298159A (en) * | 2014-10-23 | 2015-01-21 | 福州天虹电脑科技有限公司 | Circuit structure of electromechanical equipment and working method |
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Application publication date: 20170419 |
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