CN104655951A - System and method for testing differential signal of connection interface - Google Patents
System and method for testing differential signal of connection interface Download PDFInfo
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- CN104655951A CN104655951A CN201310594987.XA CN201310594987A CN104655951A CN 104655951 A CN104655951 A CN 104655951A CN 201310594987 A CN201310594987 A CN 201310594987A CN 104655951 A CN104655951 A CN 104655951A
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Abstract
The invention discloses a system and method for testing a differential signal of a connection interface. The system and the method are characterized by electrically connecting the connection interface to a circuit device and a test end, generating a random binary sequence by the test end and testing the connection interface in a boundary scanning manner so as to obtain a bit error rate of the connection interface, the short-circuit state and the open-circuit state of a differential signal circuit according to the circuit device, thereby achieving the technical effect of increasing the test coverage rate of the differential signal.
Description
Technical field
The present invention relates to a kind of signal test system and method thereof, refer to differential signal test macro and the method thereof of the connecting interface of the differential signal lines according to differential signal test connecting interface especially.
Background technology
In recent years, universal and flourish along with hard disk, traditional bus-bar does not apply gradually and uses on frequency range, therefore, frequency range and the compatibility of expansion bus-bar become common recognition, such as: the interface specification that International Standards Organization proposes " SFF-8639 ", to support the interface such as " PCI Express ", " SATA " and " SAS " simultaneously.But while raising frequency range and compatibility, how testing connecting interface quickly and efficiently just becomes one of Ge Jia manufacturer problem of desiring most ardently solution.
Whether generally speaking, traditional connecting interface test mode is that use one station server and a large amount of hard disks realize, test connecting interface meet the requirements by reality connection hard disk.But this mode requires a great deal of time and carries out testing and use a large amount of hard disks, therefore has testing efficiency problem low and with high costs.
In view of this, Bian You manufacturer proposes a kind of test lead equipment, carries out signal testing in the mode of probe to connecting interface, connects a large amount of hard disks without the need to reality, so can save a large amount of test durations and cost.But there is the not good problem of the test coverage of differential signal in this mode.
In sum, there is the problem that the test coverage of differential signal is not good since known prior art is medium-term and long-term, therefore the real technological means being necessary to propose to improve, solves this problem always.
Summary of the invention
The present invention discloses a kind of differential signal test macro and method thereof of connecting interface.
First, the present invention discloses a kind of differential signal test macro of connecting interface, there is in order to test the connecting interface of differential signal lines, this system comprises: loop apparatus and test lead, described loop apparatus and connecting interface are electrically connected, in order to receive differential signal from connecting interface, and by differential signal synchronous feedback to connecting interface.Described test lead is in order to be electrically connected with connecting interface, and this test lead comprises: the first test module and the second test module.Wherein, first test module is in order to produce one group of pseudo-random binary sequence (Pseudo Random Binary.Sequence, PRBS), and this group pseudo-random binary sequence is sent to connecting interface as differential signal, and the bit error rate (Bit Error Rate, BER) of the tandem channel transfer of connecting interface is tested according to the differential signal of feedback; Second test module, in order to use boundary scan (Boundary Scan) mode, tests short circuit and the open-circuit condition of the single signal circuit in every a pair differential signal lines on connecting interface.
In addition, the present invention discloses a kind of differential signal method of testing of connecting interface, and have the connecting interface of differential signal lines in order to test, its step comprises: loop apparatus and connecting interface are electrically connected, and test lead and connecting interface is electrically connected; Test lead produces one group of pseudo-random binary sequence, and this group pseudo-random binary sequence is sent to connecting interface as differential signal; Loop apparatus receives differential signal from connecting interface, and by differential signal synchronous feedback to connecting interface; Test lead is according to the bit error rate of the tandem channel transfer of the differential signal test connecting interface of feedback; Test lead uses boundary scan mode, the short circuit of the single signal circuit in every a pair differential signal lines on test connecting interface and open-circuit condition.
System and method for disclosed by the present invention as above, be that the present invention is by being electrically connected loop apparatus and test lead at connecting interface with the difference of prior art, and produce pseudo-random binary sequence by test lead and use boundary scan mode to test connecting interface, to obtain the bit error rate of connecting interface and the short circuit of differential signal lines and open-circuit condition according to the differential signal of loop apparatus feedback.
By above-mentioned technological means, the present invention can reach the technology effect of the test coverage improving differential signal.
Accompanying drawing explanation
Fig. 1 is the system block diagrams of the differential signal test macro of connecting interface of the present invention.
Fig. 2 is the method flow diagram of the differential signal method of testing of connecting interface of the present invention.
Fig. 3 is the circuit diagram of the differential signal test of connecting interface of the present invention.
[symbol description]
110 connecting interfaces
111 differential signal lines
120 loop apparatus
130 test leads
131 first test modules
132 second test modules
133 signal Port Multipliers
300 Signal Regulation retimers
Embodiment
Graphic and embodiment below will be coordinated to describe embodiments of the present invention in detail, by this to the present invention how application technology means solve technical matters and the implementation procedure reaching technology effect can fully understand and implement according to this.
Before the differential signal test macro that the connecting interface disclosed by the present invention is described and method thereof, first the noun of self-defining of the present invention is explained, connecting interface of the present invention also can be described as and connects backboard, connection slot, connectivity port etc., and it has differential signal lines.To meet the connecting interface of " SFF-8639 " interface specification, this connecting interface can support the hard disk unit of the interface such as use " PCI Express ", " SATA " and " SAS " simultaneously.
The graphic differential signal test macro to connecting interface of the present invention and method thereof is below coordinated to be described further, refer to " Fig. 1 ", the system block diagrams of the differential signal test macro that " Fig. 1 " is connecting interface of the present invention, have the connecting interface 110 of differential signal lines in order to test, this system comprises: loop apparatus 120 and test lead 130.Wherein, loop apparatus 120 and connecting interface 110 are electrically connected, in order to receive differential signal from connecting interface 110, and by differential signal synchronous feedback to connecting interface 110.On reality is implemented, one end of connecting interface 110 is electrically connected loop apparatus 120, and the other end of connecting interface 110 is then electrically connected test lead 130, and this electric connection mode meets " SFF-8639 " interface specification.In other words, the signal that test lead 130 produces first can be resent to loop apparatus 120 via connecting interface 110, and loop apparatus 120 then directly by this signal back connecting interface 110, then is sent to test lead 130 by connecting interface 110.
As for the part at test lead 130, test lead 130 is in order to be electrically connected with connecting interface 110, and this test lead 130 comprises: the first test module 131 and the second test module 132.Wherein, first test module 131 is in order to produce one group of pseudo-random binary sequence (Pseudo Random Binary.Sequence, PRBS), and this group pseudo-random binary sequence is sent to connecting interface 110 as differential signal, and the bit error rate (Bit Error Rate, BER) of the tandem channel transfer of connecting interface 110 is tested according to the differential signal of feedback.On reality is implemented, differential signal lines for connecting interface can adopt the speed of 2.5G, 5.0G and 8.0Gbps to verify the signal characteristic of each bar differential signal lines under high-speed-differential pattern respectively, and learns the quality of differential signal lines according to bit error rate.
Second test module 132, in order to use boundary scan (Boundary Scan) mode, tests short circuit and the open-circuit condition of the single signal circuit in every a pair differential signal lines on connecting interface 110.On reality is implemented, this boundary scan is test ac-coupled circuit according to the ascending velocity of differential signal, its test mode is according to joint test working group (Joint Test Action Group, JTAG) 1149.6 standards formulated realize, belong to a kind of test mode of differential signal, the characteristic test exchanging coupling circuit can be realized.Because this 1149.6 standard is known technology, therefore much more no longer to repeat at this.
Be noted that especially, on reality is implemented, test lead 130 more comprises signal Port Multiplier 133, in order to control the Signal transmissions by the first test module 131 and the second test module 132, that is, the pseudo-random binary sequence that first test module 131 can produce by signal Port Multiplier 133 and the second test module 132 use the signal produced during boundary scan mode, be sent to connecting interface 110 in the mode of multichannel and receive the signal fed back, the signal of feedback being sent to corresponding first test module 131 or the second test module 132.
Then, refer to " Fig. 2 ", the differential signal method of testing that " Fig. 2 " is connecting interface of the present invention, its step comprises: loop apparatus 120 and connecting interface 110 are electrically connected, and test lead 130 and connecting interface 110 is electrically connected (step 210); Test lead 130 produces one group of pseudo-random binary sequence, and this group pseudo-random binary sequence is sent to connecting interface 110 as differential signal (step 220); Loop apparatus 120 receives differential signal from connecting interface 110, and by differential signal synchronous feedback to connecting interface 110(step 230); Test lead 130 is according to the bit error rate (step 240) of the tandem channel transfer of the differential signal test connecting interface 110 of feedback; Test lead 130 uses boundary scan mode, the short circuit of the single signal circuit in every a pair differential signal lines on test connecting interface 110 and open-circuit condition (step 250).Pass through above-mentioned steps, namely by being electrically connected loop apparatus 120 and test lead 130 at connecting interface 110, and produce pseudo-random binary sequence by test lead 130 and use boundary scan mode to test connecting interface 110, to obtain the bit error rate of connecting interface 110 and the short circuit of differential signal lines and open-circuit condition according to the differential signal that loop apparatus 120 feeds back, and then to improve the test coverage of differential signal.
Below coordinate " Fig. 3 " to illustrate as follows by way of example, refer to " Fig. 3 ", the circuit diagram that the differential signal that " Fig. 3 " is connecting interface of the present invention is tested.On reality is implemented, first test module 131 of test lead 130 and the second test module 132 can use the Signal Regulation retimer 300(that anticipates as shown in the figure 3 as chip " IDT 89HT0816P ") produce the test model of differential signal, that is: the signal of pseudo-random binary sequence and boundary scan, and this test model is sent to connecting interface 110(via signal Port Multiplier 133 and also can be described as end to be measured) differential signal lines 111, then feed back via the loop (Loopback) of loop apparatus 120 again.As for the differential signal fed back then first through the differential signal lines 111 of connecting interface 110, again through the signal Port Multiplier 133 of test lead 130, finally received by the receiving end of the Signal Regulation retimer 300 of test lead 130, to judge the bit error rate of the tandem channel transfer of connecting interface 110, and judge short circuit and the open-circuit condition of the single signal circuit in every a pair differential signal lines 111 on connecting interface 110.In other words, by the test controlling described Signal Regulation retimer 300 and complete pseudo-random binary sequence under circuit pattern and boundary scan, the high coverage rate test of differential signal is realized.
In sum, difference between known the present invention and prior art is by being electrically connected loop apparatus and test lead at connecting interface, and produce pseudo-random binary sequence by test lead and use boundary scan mode to test connecting interface, so that the differential signal according to loop apparatus feedback obtains the bit error rate of connecting interface and the short circuit of differential signal lines and open-circuit condition, the problem existing for prior art can be solved by this technological means, and then reach the technology effect of the test coverage improving differential signal.
Although the present invention discloses as above with aforesaid embodiment; so itself and be not used to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; when doing a little change and retouching, therefore scope of patent protection of the present invention must be as the criterion depending on this instructions appending claims person of defining.
Claims (10)
1. a differential signal test macro for connecting interface, have a connecting interface of differential signal lines in order to test, it is characterized in that, this system comprises:
Primary Ioops device, this loop apparatus and this connecting interface are electrically connected, in order to receive a differential signal from this connecting interface, and by this differential signal synchronous feedback to this connecting interface; And
One test lead, in order to be electrically connected with this connecting interface, this test lead comprises:
One first test module, in order to produce one group of pseudo-random binary sequence, and this group pseudo-random binary sequence is sent to this connecting interface as this differential signal, and tests the bit error rate of the tandem channel transfer of this connecting interface according to this differential signal of feedback; And
One second test module, in order to use boundary scan mode, tests short circuit and the open-circuit condition of the single signal circuit in every a pair differential signal lines on this connecting interface.
2. the differential signal test macro of connecting interface according to claim 1, is characterized in that, the electric connection mode of this loop apparatus and this connecting interface, and the electric connection mode of this connecting interface and this test lead all meets SFF-8639 interface specification.
3. the differential signal test macro of connecting interface according to claim 1, is characterized in that, this boundary scan is test ac-coupled circuit according to the ascending velocity of this differential signal.
4. the differential signal test macro of connecting interface according to claim 1, is characterized in that, the speed of this differential signal at least comprises 2.5G, 5.0G and 8.0Gbps.
5. the differential signal test macro of connecting interface according to claim 1, is characterized in that, this test lead more comprises a signal Port Multiplier, in order to control the Signal transmissions of this first test module and this second test module.
6. a differential signal method of testing for connecting interface, have a connecting interface of differential signal lines in order to test, it is characterized in that, step comprises:
Primary Ioops device and this connecting interface are electrically connected, and a test lead and this connecting interface are electrically connected;
This test lead produces one group of pseudo-random binary sequence, and this group pseudo-random binary sequence is sent to this connecting interface as a differential signal;
This loop apparatus receives this differential signal from this connecting interface, and by this differential signal synchronous feedback to this connecting interface;
This test lead tests the bit error rate of the tandem channel transfer of this connecting interface according to this differential signal of feedback; And
This test lead uses boundary scan mode, tests short circuit and the open-circuit condition of the single signal circuit in every a pair differential signal lines on this connecting interface.
7. the differential signal method of testing of connecting interface according to claim 6, is characterized in that, the electric connection mode of this loop apparatus and this connecting interface, and the electric connection mode of this connecting interface and this test lead all meets SFF-8639 interface specification.
8. the differential signal method of testing of connecting interface according to claim 6, is characterized in that, this boundary scan is test ac-coupled circuit according to the ascending velocity of this differential signal.
9. the differential signal method of testing of connecting interface according to claim 6, is characterized in that, the speed of this differential signal at least comprises 2.5G, 5.0G and 8.0Gbps.
10. the differential signal method of testing of connecting interface according to claim 6, is characterized in that, the Signal transmissions of this group pseudo-random binary sequence and boundary scan mode is controlled by a signal Port Multiplier.
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| CN201310594987.XA CN104655951A (en) | 2013-11-21 | 2013-11-21 | System and method for testing differential signal of connection interface |
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Cited By (4)
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| CN109901048A (en) * | 2017-12-09 | 2019-06-18 | 英业达科技有限公司 | With the system and method for different scanning chain test differential line |
| CN111104279A (en) * | 2018-10-29 | 2020-05-05 | 英业达科技有限公司 | SAS connector conduction detection system and method thereof |
| US10896107B1 (en) * | 2020-06-15 | 2021-01-19 | Inventec (Pudong) Technology Corporation | Backplane testing system and method thereof |
| CN114047460A (en) * | 2022-01-12 | 2022-02-15 | 长芯盛（武汉）科技有限公司 | Device and method for detecting high-speed differential signal |
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Application publication date: 20150527 |