CN103678081B - For detection system and the method thereof of peripheral interconnect standard slot - Google Patents

For detection system and the method thereof of peripheral interconnect standard slot Download PDF

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Publication number
CN103678081B
CN103678081B CN201210347965.9A CN201210347965A CN103678081B CN 103678081 B CN103678081 B CN 103678081B CN 201210347965 A CN201210347965 A CN 201210347965A CN 103678081 B CN103678081 B CN 103678081B
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electrically connected
interface
test card
peripheral interconnect
interconnect standard
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CN103678081A (en
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张天超
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Inventec Pudong Technology Corp
Inventec Corp
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Inventec Pudong Technology Corp
Inventec Corp
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Abstract

A kind of detection system for peripheral interconnect standard slot and method thereof, have in the main test card of complete detection PCI-E slot function, there is provided sub-test card complete detection PCI-E slot function by virtual switch bridge or nontransparent bridge, the technique effect of the detection mode resource effectively reducing existing PCI-E slot can be reached thus.

Description

For detection system and the method thereof of peripheral interconnect standard slot
Technical field
The present invention relates to a kind of detection system and method thereof, particularly relate to a kind of detection system for peripheral interconnect standard slot and method thereof.
Background technology
At present for peripheral interconnect standard (PCI Express, PCI-E) detection mode of slot, it is the standard detection card first designing a complete measuring ability, and after standard detection card is electrically connected at PCI-E slot, complete detection can be carried out to this PCI-E slot, and as when having multiple PCI-E slot and needing to detect, then need the standard detection card of multiple to carry out the detection of multiple PCI-E slot respectively.
But, in the production run of reality, when often needing many preparation standard detection cards, then indirectly can cause the increase of production cost, needing under the consideration reduced costs, then need to be improved the detection mode of existing PCI-E slot, to make to carry out, outside complete detection, more can reducing production cost to PCI-E slot.
In sum, the detection mode that always there is existing PCI-E slot since known prior art is medium-term and long-term expends the problem of excess resource, is therefore necessary the technological means proposing to improve, solves this problem.
Summary of the invention
Because the detection mode that prior art exists existing PCI-E slot expends the problem of excess resource, the present invention discloses a kind of detection system for peripheral interconnect standard slot and method thereof then, wherein:
The detection system for peripheral interconnect standard slot disclosed by the present invention, it comprises: at least one sub-test card and main test card.
Sub-test card has peripheral interconnect standard interface and main card is electrically connected interface, and sub-test card is electrically connected on PCI-E slot by PCI-E interface.
Main test card has PCI-E interface and subcard is electrically connected interface, and main test card is electrically connected by subcard the main card electric connection interface that interface is electrically connected at sub-test card, and main test card is electrically connected on PCI-E slot by PCI-E interface, wherein:
PCI-E Switching Module is in order to enable (enable) and disable (disable) virtual switch bridge (Virtual Switch Bridging) pattern or nontransparent bridge (Non-transparent Bridging) pattern, and entity is exchanged bridge and entity port is electrically connected, entity port is in order to be electrically connected with the PCI-E interface of main test card, detect with the PCI-E slot carrying out being electrically connected with main test card, wherein:
Virtual switch pattern is in order to configure multiple virtual switch bridge, the corresponding virtual port of each virtual switch bridge, virtual port is electrically connected in order to be electrically connected interface with subcard, detects with the PCI-E slot carrying out being electrically connected with corresponding sub-test card; And
Nontransparent bridge mode is in order to exchange bridge additional configuration virtual port by entity, virtual port is electrically connected in order to be electrically connected interface with subcard, detects with the PCI-E slot carrying out being electrically connected with corresponding sub-test card.
The detection method for peripheral interconnect standard slot disclosed by the present invention, it comprises the following step:
First, have at least one the sub-test card that peripheral interconnect standard interface and main card are electrically connected interface, sub-test card is electrically connected on PCI-E slot by PCI-E interface;
Then, there is the main test card that PCI-E interface and subcard are electrically connected interface, and main test card is electrically connected by subcard the main card electric connection interface that interface is electrically connected at sub-test card, main test card is electrically connected on PCI-E slot by PCI-E interface, wherein:
PCI-E Switching Module in order to enable with disable virtual switch bridge pattern or nontransparent bridge pattern, and entity is exchanged bridge and entity port is electrically connected, entity port is in order to be electrically connected with the PCI-E interface of main test card, detect with the PCI-E slot carrying out being electrically connected with main test card, wherein:
Virtual switch pattern is in order to configure multiple virtual switch bridge, the corresponding virtual port of each virtual switch bridge, virtual port is electrically connected in order to be electrically connected interface with subcard, detects with the PCI-E slot carrying out being electrically connected with corresponding sub-test card; And
Nontransparent bridge mode is in order to exchange bridge additional configuration virtual port by entity, virtual port is electrically connected in order to be electrically connected interface with subcard, detects with the PCI-E slot carrying out being electrically connected with corresponding sub-test card.
System and method for disclosed by the present invention as above, and the difference between prior art is that the present invention can provide the effect detected PCI-E slot complete function by main test card, and coordinate in the autonomous test card of sub-test card simplified and obtain PCI-E slot complete function is detected, namely main test card adopts virtual switch bridge and nontransparent bridge to detect PCI-E slot complete function to provide sub-test card, and the detection mode that effectively can reduce existing PCI-E slot thus expends excess resource.
By above-mentioned technological means, the present invention can reach the technique effect of the detection mode resource effectively reducing existing PCI-E slot.
Accompanying drawing explanation
Figure 1 shows that the detection system configuration diagram of the present invention for peripheral interconnect standard slot.
Figure 2 shows that the detection method process flow diagram of the present invention for peripheral interconnect standard slot.
Figure 3 shows that the present invention exchanges bridge configuration schematic diagram for the detection of peripheral interconnect standard slot.
Critical piece Reference numeral:
10 main test card
11 PCI-E interface
12 subcards are electrically connected interface
121 internal integrated circuit interfaces
122 mini string type transmission interfaces
13 PCI-E Switching Modules
131 entities exchange bridge
132 entity ports
133 virtual switch bridges
134 virtual ports
20 sub-test card
21 PCI-E interface
22 main cards are electrically connected interface
221 internal integrated circuit interfaces
222 mini string type transmission interfaces
31 first sub-test card
32 second sub-test card
33 the 3rd sub-test card
41 the one PCI-E X8 slots
42 the 2nd PCI-E X4 slots
43 the 3rd PCI-E X4 slots
51 main PCI-E X16 slots
Step 110 has at least one the sub-test card that peripheral interconnect standard interface and main card are electrically connected interface, and sub-test card is electrically connected on PCI-E slot by PCI-E interface
Step 120 has the main test card that PCI-E interface and subcard are electrically connected interface, and main test card is electrically connected by subcard the main card that interface is electrically connected at sub-test card is electrically connected interface, and main test card is electrically connected on PCI-E slot by PCI-E interface
Step 131 PCI-E Switching Module in order to enable with disable virtual switch bridge pattern or nontransparent bridge pattern
Entity is exchanged bridge to step 132 and entity port is electrically connected, and entity port, in order to be electrically connected with the PCI-E interface of main test card, detects with the PCI-E slot carrying out being electrically connected with main test card
Step 133 virtual switch pattern is in order to configure multiple virtual switch bridge, the corresponding virtual port of each virtual switch bridge, virtual port is electrically connected in order to be electrically connected interface with subcard, detects with the PCI-E slot carrying out being electrically connected with corresponding sub-test card
The nontransparent bridge mode of step 134 is in order to exchange bridge additional configuration virtual port by entity, virtual port is electrically connected in order to be electrically connected interface with subcard, detects with the PCI-E slot carrying out being electrically connected with corresponding sub-test card
Step 135 virtual port quantity is no more than the maximal value that PCI-E Switching Module can provide and the maximum transmitted number of channels being no more than PCI-E Switching Module
Embodiment
Describe embodiments of the present invention in detail below with reference to drawings and Examples, with this to the present invention how application technology means solve technical matters and the implementation procedure reaching technique effect can fully understand and implement according to this.
First the detection system framework for peripheral interconnect standard slot disclosed by the present invention below to be described, and please refer to shown in Fig. 1, Figure 1 shows that the detection system configuration diagram of the present invention for peripheral interconnect standard slot.
The detection system for peripheral interconnect standard slot disclosed by the present invention, it comprises: at least one sub-test card 20 and main test card 10.
Sub-test card 20 has peripheral interconnect standard interface 21 and is electrically connected interface 22 with main card, sub-test card 20 is electrically connected on PCI-E slot by PCI-E interface, it is internal integrated circuit (Inter-Integrated Circuit that main card is electrically connected interface 22, I2C) interface 221 and multiple mini string type transmission (Mini-SAS) interface 222, sub-test card 20 is in order to detect the PCI-E slot be electrically connected.
Main test card 10 has PCI-E interface 11 and is electrically connected interface 12 with subcard, main test card 10 is electrically connected on PCI-E slot by PCI-E interface 11, it is internal integrated circuit interface 121 and multiple mini string type transmission interface 122 that subcard is electrically connected interface 12, and main test card 10 is in order to detect the PCI-E slot be electrically connected.
Main test card 10 is electrically connected by subcard the main card electric connection interface 22 that interface 12 is electrically connected at sub-test card 20, namely the internal integrated circuit interface 121 of main test card 10 can be electrically connected to each other with the internal integrated circuit interface 221 of sub-test card 20, and the mini string type transmission interface 122 of main test card 10 can be electrically connected to each other with the mini string type transmission interface 222 of sub-test card 20.
The mini string type transmission interface 122 of main test card 10 can and the mini string type transmission interface 222 of the sub-test card 20 electric connection quantity that be electrically connected to each other can be electrically connected at PCI-E slot and difference to some extent according to sub-test card 20 by PCI-E interface.
Specifically, suppose sub-test card 20 by PCI-E interface electrically for PCI-E X4 is connected to PCI-E X4 slot, namely only need the mini string type transmission interface 222 of single sub-test card 20 to be mutually electrically connected with the mini string type transmission interface 122 of main test card 10.
Suppose sub-test card 20 by PCI-E interface electrically for PCI-E X8 is connected to PCI-E X8 slot, then need the mini string type transmission interface 222 of two sub-test card 20 and the mini string type transmission interface 122 of two main test card 10 to be mutually electrically connected.
Suppose sub-test card 20 by PCI-E interface electrically for PCI-E X16 is connected to PCI-E X16 slot, then need the mini string type transmission interface 222 of four sub-test card 20 and the mini string type transmission interface 122 of four main test card 10 to be mutually electrically connected.
And first entity can be exchanged bridge 131 with entity port one 32 at the PCI-E Switching Module 13 of main test card 10 and be electrically connected, entity port one 32, in order to be electrically connected with the PCI-E interface 11 of main test card 10, detects with the PCI-E slot carrying out being electrically connected with main test card 10.
The PCI-E Switching Module 13 of main test card 10 in order to enable with disable virtual switch bridge pattern or nontransparent bridge pattern, when virtual switch pattern is enabled, except entity exchanges bridge 131, also configure multiple virtual switch bridge 133, the corresponding virtual port 134 of each virtual switch bridge 133, virtual port 134 is in order to be electrically connected with mini string type transmission interface 122, and be electrically connected by subcard the main card that interface 12 is electrically connected at sub-test card 20 by main test card 10 and be electrically connected interface 22, detect with the PCI-E slot carrying out being electrically connected with corresponding sub-test card 20.
When nontransparent bridge mode is enabled, bridge 131 additional configuration virtual port 134 can be exchanged at entity, virtual port 134 is in order to be electrically connected with mini string type transmission interface 122, and be electrically connected by subcard the main card that interface 12 is electrically connected at sub-test card 20 by main test card 10 and be electrically connected interface 22, detect with the PCI-E slot carrying out being electrically connected with corresponding sub-test card 20.
The PCI-E Switching Module 13 of main test card 10 can enable virtual switch bridge pattern and nontransparent bridge pattern simultaneously, and the virtual port quantity that PCI-E Switching Module 13 configures is no more than maximal value that PCI-E Switching Module 13 can provide (i.e. main test card 10 preset the maximum quantity of virtual port) and is no more than maximum transmitted passage (lane) quantity of PCI-E Switching Module 13.
Then, below will explain orally function mode of the present invention and flow process with an embodiment, following embodiment illustrate by while composition graphs 1 and Fig. 2 shown in be described, Figure 2 shows that the detection method process flow diagram of the present invention for peripheral interconnect standard slot.
Please refer to shown in Fig. 3, Figure 3 shows that the present invention exchanges bridge configuration schematic diagram for the detection of peripheral interconnect standard slot.
First sub-test card 31 is PCI-E X8 interfaces 21, first sub-test card 31 is electrically connected on a PCI-E X8 slot 41, and the main card of the first sub-test card 31 electric connection interface 22 is internal integrated circuit interface 221 and two mini string type transmission interface 222(steps 110).
Second sub-test card 32 is PCI-E X4 interfaces 21, second sub-test card 32 is electrically connected on the 2nd PCI-E X4 slot 42, and the main card of the second sub-test card 32 electric connection interface 22 is internal integrated circuit interface 221 and a mini string type transmission interface 222(step 110).
3rd sub-test card 33 is PCI-E X4 interfaces 21,3rd sub-test card 33 is electrically connected on the 3rd PCI-E X4 slot 43, and the main card of the 3rd sub-test card 32 electric connection interface 22 is internal integrated circuit interface 221 and a mini string type transmission interface 222(step 110).
Main test card 10 is PCI-E X16 interfaces 11, main test card 10 is electrically connected on main PCI-E X16 slot 51, and the subcard of main test card 10 electric connection interface 12 is internal integrated circuit interface 121 and four mini string type transmission interface 122(steps 120).
The internal integrated circuit interface 221 of the sub-test card 32 of internal integrated circuit interface 221, second of sub-test card 31 and the internal integrated circuit interface 221 of the 3rd sub-test card 33 are electrically connected (step 120) with first respectively for the internal integrated circuit interface 121 of main test card 10.
Two of sub-test card 31 mini string type transmission interfaces 222 are electrically connected first of main test card 10 with first respectively with second mini string type transmission interface 122; 3rd mini string type transmission interface 122 of main test card 10 and the mini string type transmission interface 222 of the second sub-test card 32 are electrically connected; 4th mini string type transmission interface 122 of main test card 10 and the mini string type transmission interface 222 of the 3rd sub-test card 33 are electrically connected (step 120).
PCI-E Switching Module 13 enable virtual switch bridge pattern and the nontransparent bridge pattern (step 131) simultaneously of main test card 10.
At the PCI-E Switching Module 13 of main test card 10, entity is exchanged bridge 131 to be electrically connected with entity port one 32, entity port one 32, in order to be electrically connected with the PCI-E X16 interface 11 of main test card 10, detects (step 132) with the main PCI-E X16 slot 51 carrying out being electrically connected with main test card 10.
Configure two virtual switch bridges 133 and the corresponding virtual port 134 of difference, virtual port 134 is in order to be electrically connected with the 3rd mini string type transmission interface 122, and be electrically connected by subcard the main card that interface 12 is electrically connected at the second sub-test card 32 by main test card 10 and be electrically connected interface 22, the 2nd PCI-E X4 slot 42 be electrically connected to carry out the second sub-test card 32 detects (step 133); Virtual port 134 is in order to be electrically connected with the 4th mini string type transmission interface 122, and be electrically connected by subcard the main card that interface 12 is electrically connected at the 3rd sub-test card 33 by main test card 10 and be electrically connected interface 22, the 3rd PCI-E X4 slot 43 be electrically connected to carry out the 3rd sub-test card 33 detects (step 133).
And exchange bridge 131 also additional configuration virtual port 134 at entity, virtual port 134 is in order to be electrically connected with second mini string type transmission interface 122 with first, and be electrically connected by subcard the main card that interface 12 is electrically connected at the first sub-test card 31 by main test card 10 and be electrically connected interface 22, the PCI-E X8 slot 41 be electrically connected to carry out the first sub-test card 31 detects (step 134).
The PCI-E Switching Module 13 of main test card 10 can enable virtual switch bridge pattern and nontransparent bridge pattern simultaneously, and the virtual port quantity that PCI-E Switching Module 13 configures is no more than maximal value that PCI-E Switching Module 13 can provide (i.e. main test card 10 preset the maximum quantity of virtual port) and is no more than the maximum transmitted number of channels (step 135) of PCI-E Switching Module 13.
In sum, difference between known the present invention and prior art is that the present invention can provide the effect detected PCI-E slot complete function by main test card, and coordinate in the autonomous test card of sub-test card simplified and obtain PCI-E slot complete function is detected, namely main test card adopts virtual switch bridge and nontransparent bridge to detect PCI-E slot complete function to provide sub-test card, and the detection mode that effectively can reduce existing PCI-E slot thus expends excess resource.
The detection mode that can solve existing PCI-E slot existing for prior art by this technological means expends the problem of excess resource, and then reaches the technique effect of the detection mode resource effectively reducing existing PCI-E slot.
Although the embodiment disclosed by the present invention is as above, but described content be not used to directly limit scope of patent protection of the present invention.Any those skilled in the art, under the prerequisite not departing from the spirit and scope disclosed by the present invention, can do some variations in the formal and details implemented.Scope of patent protection of the present invention, still must be construed as limiting with appending claims and be as the criterion.

Claims (8)

1. for a detection system for peripheral interconnect standard slot, it is characterized in that, comprise:
At least one sub-test card, described sub-test card has peripheral interconnect standard interface and main card is electrically connected interface, and described sub-test card is electrically connected on peripheral interconnect standard slot by described peripheral interconnect standard interface; And
Main test card, described main test card has peripheral interconnect standard interface and subcard is electrically connected interface, and described main test card is electrically connected by described subcard the described main card electric connection interface that interface is electrically connected at described sub-test card, described main test card is electrically connected on peripheral interconnect standard slot by described peripheral interconnect standard interface, wherein:
Peripheral interconnect standard Switching Module in order to enable with disable virtual switch bridge pattern or nontransparent bridge pattern, and entity is exchanged bridge and entity port is electrically connected, described entity port is in order to be electrically connected with the described peripheral interconnect standard interface of described main test card, detect with the peripheral interconnect standard slot carrying out being electrically connected with described main test card, wherein:
Virtual switch pattern is in order to configure multiple virtual switch bridge, the corresponding virtual port of each virtual switch bridge, described virtual port is electrically connected in order to be electrically connected interface with described subcard, detects with the peripheral interconnect standard slot carrying out being electrically connected with corresponding described sub-test card; And
Nontransparent bridge mode is in order to exchange bridge additional configuration virtual port by entity, described virtual port is electrically connected in order to be electrically connected interface with described subcard, detects with the peripheral interconnect standard slot carrying out being electrically connected with corresponding described sub-test card.
2. as claimed in claim 1 for the detection system of peripheral interconnect standard slot, it is characterized in that, it is internal integrated circuit interface and multiple mini string type transmission interface that described subcard is electrically connected interface.
3. as claimed in claim 1 for the detection system of peripheral interconnect standard slot, it is characterized in that, it is internal integrated circuit interface and multiple mini string type transmission interface that described main card is electrically connected interface.
4. as claimed in claim 1 for the detection system of peripheral interconnect standard slot, it is characterized in that, described virtual port quantity is no more than the maximal value that peripheral interconnect standard Switching Module can provide and the maximum transmitted number of channels being no more than peripheral interconnect standard Switching Module.
5. for a detection method for peripheral interconnect standard slot, it is characterized in that, comprise the following step:
Have at least one the sub-test card that peripheral interconnect standard interface and main card are electrically connected interface, described sub-test card is electrically connected on peripheral interconnect standard slot by described peripheral interconnect standard interface; And
There is the main test card that peripheral interconnect standard interface and subcard are electrically connected interface, and described main test card is electrically connected by described subcard the described main card electric connection interface that interface is electrically connected at described sub-test card, described main test card is electrically connected on peripheral interconnect standard slot by described peripheral interconnect standard interface, wherein:
Peripheral interconnect standard Switching Module in order to enable with disable virtual switch bridge pattern or nontransparent bridge pattern, and entity is exchanged bridge and entity port is electrically connected, described entity port is in order to be electrically connected with the described peripheral interconnect standard interface of described main test card, detect with the peripheral interconnect standard slot carrying out being electrically connected with described main test card, wherein:
Virtual switch pattern is in order to configure multiple virtual switch bridge, the corresponding virtual port of each virtual switch bridge, described virtual port is electrically connected in order to be electrically connected interface with described subcard, detects with the peripheral interconnect standard slot carrying out being electrically connected with corresponding described sub-test card; And
Nontransparent bridge mode is in order to exchange bridge additional configuration virtual port by entity, described virtual port is electrically connected in order to be electrically connected interface with described subcard, detects with the peripheral interconnect standard slot carrying out being electrically connected with corresponding described sub-test card.
6. as claimed in claim 5 for the detection method of peripheral interconnect standard slot, it is characterized in that, it is internal integrated circuit interface and multiple mini string type transmission interface that described subcard is electrically connected interface.
7. as claimed in claim 5 for the detection method of peripheral interconnect standard slot, it is characterized in that, it is internal integrated circuit interface and multiple mini string type transmission interface that described main card is electrically connected interface.
8. as claimed in claim 5 for the detection method of peripheral interconnect standard slot, it is characterized in that, described virtual port quantity is no more than the maximal value that peripheral interconnect standard Switching Module can provide and the maximum transmitted number of channels being no more than peripheral interconnect standard Switching Module.
CN201210347965.9A 2012-09-18 2012-09-18 For detection system and the method thereof of peripheral interconnect standard slot Active CN103678081B (en)

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Publication number Priority date Publication date Assignee Title
CN108153624B (en) * 2016-12-02 2021-04-27 英业达科技有限公司 Test circuit board suitable for NGFF slot
CN108152702B (en) * 2016-12-06 2020-06-12 英业达科技有限公司 Test system suitable for NGFF slot in expansion circuit board
CN113806273B (en) * 2020-06-16 2024-04-09 英业达科技有限公司 Fast peripheral component interconnect data transfer control system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101025706A (en) * 2006-02-22 2007-08-29 广达电脑股份有限公司 High speed peripheral component interconnect interface debug card
CN101030159A (en) * 2006-02-28 2007-09-05 环达电脑(上海)有限公司 Apparatus and system for testing host slot
CN101739324A (en) * 2008-11-21 2010-06-16 神讯电脑(昆山)有限公司 Extension interface detection device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101025706A (en) * 2006-02-22 2007-08-29 广达电脑股份有限公司 High speed peripheral component interconnect interface debug card
CN101030159A (en) * 2006-02-28 2007-09-05 环达电脑(上海)有限公司 Apparatus and system for testing host slot
CN101739324A (en) * 2008-11-21 2010-06-16 神讯电脑(昆山)有限公司 Extension interface detection device

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