CN104254911B - Sorting chips device and chip classification method - Google Patents
Sorting chips device and chip classification method Download PDFInfo
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- CN104254911B CN104254911B CN201380021965.2A CN201380021965A CN104254911B CN 104254911 B CN104254911 B CN 104254911B CN 201380021965 A CN201380021965 A CN 201380021965A CN 104254911 B CN104254911 B CN 104254911B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67271—Sorting devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Do not carry out weaving into again of stock, it is prevented that the chip damage produced when weaving into the chip transfer caused again.Having: classification quantity control optimization arithmetic element (921), it carries out distributing the computing as the classification quantity of each grade of the classification expenditure quantity according to this performance data so that do not produce the sheet that the number of chips of expenditure is fewer than minimum reference number；With taxon (923), it carrys out control tactics according to this classification expenditure quantity calculated and processes.
Description
Technical field
The present invention relates to from being mounted with in the supply unit that wafer cuts off and is pasted on the multiple semiconductor chips obtained adhesive sheet, semiconductor chip is transferred to successively the sorting chips device on such as different grades of arrangement platform, and uses the chip classification method of this sorting chips device, describe and have for making computer perform the control program of processing sequence of each operation of this chip classification method and storage has the readable storage medium storing program for executing that computer can be utilized to be read out of this control program.
Background technology
Existing sorting chips device can load cut-out wafer on the X/Y plane being made up of orthogonal X-axis and Y-axis in the supply unit of movement.According to the cut-out wafer overhead view image from the ccd video camera being fixed on pedestal, the storage information of the grade of the tape test result corresponding with chip address is differentiated, utilize robots arm to wait by its chip of each hierarchical selection, transfer load to supply unit on the grade sheet on other arrangement platform.
On grade sheet, chip-count reaches maximum prescribed quantity, or when already ensuring that the expenditure quantity of wafer chip of more than minimum prescribed quantity, can pay, but on grade sheet chip-count less than minimum prescribed quantity can not pay and become stock.
Fig. 8 is an illustration for the flow chart of the action example of existing sorting chips device.
As shown in Figure 8, it is stored in the data base completing grade separation in the way of corresponding with the chip address on wafer with the information of the grade in such as light characteristic inspection or electrical characteristics inspection.
First, in step S101, classification process is carried out by each grade in light characteristic inspection or electrical characteristics inspection.That is, the chip address according to each grade of the grade separation data base that controlled oneself, selects the chip of same grade from the wafer that cuts off in the donor sheet supply unit, transfers load on the grade sheet on other arrangement platform.
Then, volume check process is carried out in step S102.That is, whether chip-count on grade sheet is reached maximum prescribed quantity, or be whether that the expenditure quantity of grade final piece and the wafer chip already ensuring that more than minimum prescribed quantity judges.
Then, expenditure process is carried out in step S103.That is, on grade sheet, chip-count reaches maximum prescribed quantity or for grade final piece and when already ensuring that the expenditure quantity of wafer chip of more than minimum prescribed quantity, pay.
Afterwards, in step S104, it is determined whether have been completed all process, if having been completed all process (being (YES)) in step S104, then terminate to process.If additionally, be not fully complete all process (no (NO)) in step S104, then the classification returning next step S101 processes, and carries out classification next time and processes.
Additionally, carry out stock processing in step S105.That is, the result in the volume check of step S102 is that chip-count is less than minimum prescribed quantity in grade final piece, using the chip on this grade sheet as stock.
Further, carry out multiple grade sheets of same grade are transferred to regathering and weaving into process again of a grade sheet in step S106.
Then, volume check process is carried out in step S107.That is, whether chip-count on grade sheet is reached maximum prescribed quantity or it is whether that the expenditure quantity of grade final piece and the chip already ensuring that more than minimum prescribed quantity judges.
Then, expenditure process is carried out in step S108.That is, on grade sheet, chip-count reaches maximum prescribed quantity or when already ensuring that the expenditure quantity of wafer chip of more than minimum prescribed quantity, the expenditure carrying out the chip on grade sheet processes.
Additionally, the chip-count on step S107 grade sheet does not arrive minimum prescribed quantity, return step S105, this chip carried out stock processing.Repeating step S105～step S107, when the chip-count on grade sheet is more than minimum prescribed quantity, the expenditure carrying out the chip on grade sheet in step S108 processes.
Further, in step S109, it is determined whether have been completed all process, if having been completed all process (YES) in step S109, then terminate to process.If additionally, be not fully complete all process (no) in step S109, then return next step S101, be transferred to classification next time and process.
Fig. 9 is an illustration for the flow chart of other action example of existing sorting chips device.
Complete in grade separation data base as it is shown in figure 9, be stored in the way of corresponding with the chip address on wafer with the information of the grade in such as light characteristic inspection or electrical characteristics inspection.
First, in step S201, carry out device setting process.That is, one or more grade sheets are prepared by each grade in advance.If not carrying out the preparation of grade sheet, then needing to temporarily cease sorting chips device, after supplementing the grade sheet of not enough grade, sorting chips device being restarted.
Then, in step S202, each grade in checking by light characteristic inspection or electrical characteristics, carry out the classification of sorting chips to different grades of arrangement platform being processed from supply unit.That is, the chip address according to each grade of the grade separation data base that controlled oneself, selects the chip of same grade from the wafer that cuts off in the donor sheet the supply unit loading dividing semiconductor wafer, transfers load on the grade sheet on other arrangement platform.
Then, volume check process is carried out in step S203.That is, whether chip-count on grade sheet is reached maximum prescribed quantity, or be whether that the expenditure quantity of grade final piece and the wafer chip already ensuring that more than minimum prescribed quantity judges.
In a word, sorting chips is carried out to now or to the classification chip not having same grade in supply unit.
Afterwards, expenditure process is carried out in step S204.That is, on grade sheet, chip-count reaches maximum prescribed quantity, or when being grade final piece and the expenditure quantity of wafer chip already ensuring that more than minimum prescribed quantity, pay.
Afterwards, in step S205, it is determined whether have been completed all process, if having been completed all process (YES) in step S205, then terminate to process.If additionally, be not fully complete all process (no) in step S205, being then transferred to the process of next step S206.
Further, the inspection process of preparation grade sheet is carried out in step S206.That is, by the presence or absence of the grade sheet of different brackets inspection preparation, if there being the grade sheet of preparation, the volume check being transferred to step S203 after the classification proceeding next step S207 processes processes.
On the other hand, stock processing is carried out in step S208.That is, the result in the volume check of step S203 is that chip-count is less than minimum prescribed quantity in grade final piece, using this chip as stock.
Further, carry out multiple grade sheets of same grade are transferred to regathering and weaving into process again of a grade sheet in step S209.
Then, volume check process is carried out in step S210.That is, whether chip-count on grade sheet is reached maximum prescribed quantity, or be whether that the expenditure quantity of grade final piece and the chip already ensuring that more than minimum prescribed quantity judges.
Afterwards, expenditure process is carried out in step S211.That is, on grade sheet, chip-count reaches maximum prescribed quantity or when already ensuring that the expenditure quantity of wafer chip of more than minimum prescribed quantity, the expenditure carrying out the chip on grade sheet processes.
Additionally, when the result of the volume check of step S210 be the chip-count in grade final piece do not arrive minimum prescribed quantity, return step S208, this chip carried out stock processing.Repeating step S208～step S210, when the chip-count in grade final piece is more than minimum prescribed quantity, the expenditure carrying out the chip on grade sheet in step S211 processes.
Further, in step S212, it is determined whether have been completed all process, if having been completed all process (YES) in step S212, then terminate to process.If additionally, be not fully complete all process (no) in step S212, then the classification being transferred to next step S202 processes.
On the other hand, in patent documentation 1, existing sorting chips device can load cut-off wafer on the platform of movement on the X/Y plane of two orthogonal axles and X-axis and Y-axis formation, the ccd video camera being fixed on pedestal is utilized to differentiate the good, bad of semiconductor chip, robot etc. is utilized to hold this wafer, first, this wafer is transferred load to for the time being the aligning platform being fixed on pedestal.There is the press section of benchmark in orthogonal both direction, utilize the positioning table being fixed on pedestal, mechanically press chip in this both direction and position, afterwards, use the transfer mechanisms such as other robot instead and hold semiconductor chip, semiconductor chip is transferred load to the place of regulation.
Prior art literature
Patent documentation
Patent documentation 1: Japanese Unexamined Patent Publication 09-036203 publication
Summary of the invention
Invent technical problem to be solved
In above-mentioned existing sorting chips device, as expenditure be loaded in the grade final piece becoming stock chip go out pallet piling up method, same grade sheet being weaved into again, guaranteeing, the basis of minimum prescribed quantity of wafer chip is paid, but utilize this to go out pallet piling up method, for minority, grade stock does not eliminate, total for having state in stock, it is necessary to repeatedly to weave into again.
That is, the chip in the grade final piece of not met minimum prescribed quantity becomes stock.Weave into again together with stock in the grade final piece of the same grades that this stock is criticized with difference, thus, on grade sheet, chip-count reaches maximum prescribed quantity or when already ensuring that the expenditure quantity of chip of more than minimum prescribed quantity, can pay, but owing to when weaving into, chip is picked and placeed for transfer again every time, so chip sustains damage.
On the other hand, the above-mentioned existing sorting chips device disclosed in patent documentation 1 is the device about sorting mechanism, and the relation about chip expenditure with stock does not have any record.
The present invention is the invention for solving above-mentioned existing problem, therefore its object is to provide and do not weave into it is thus possible to the sorting chips device of the chip damage produced when preventing from weaving into again the chip transfer caused in stock again, and use the chip classification method of this sorting chips device, describe and have for making computer perform the control program of processing sequence of each operation of this chip classification method and storage has the readable storage medium storing program for executing that computer can be utilized to be read out of this control program.
For solving the means of technical problem
The sorting chips device of the present invention is classified by the grade of each regulation from each having the overall of the intrinsic performance data of chip by the grade of each regulation, this sorting chips device includes: classification quantity control arithmetic element, it carries out paying the quantity computing as the classification quantity of each grade according to the distribution classification of this performance data so that do not produce the sheet that the number of chips of expenditure is fewer than minimum reference number；And taxon, it carrys out control tactics according to this classification expenditure quantity calculated and processes, and thus reaches above-mentioned purpose.
Furthermore it is preferred that the classification quantity control arithmetic element of the sorting chips device of the present invention is before above-mentioned taxon performs above-mentioned classification process, by the grade of each above-mentioned regulation, above-mentioned totally part or all is implemented the computing about above-mentioned classification quantity.
Further, the classification quantity control arithmetic element computing as follows above-mentioned classification quantity of the said chip sorter of the preferred present invention: classify by maximum base value from first the grade sheet carrying out above-mentioned classification process, the chip-count being placed at least two grade sheet from finally is averaged divided by remaining grade sheet number by remaining all chip-count, the chip-count of the remainder not eliminated is added at least in any one grade sheet.
Further, the classification quantity control arithmetic element computing as follows above-mentioned classification quantity of the sorting chips device of the preferred present invention: all number of chips of different brackets (each grade) that will be placed on all of grade sheet carrying out above-mentioned classification process, it is averaged divided by all grade sheet numbers of different brackets (this each grade) by all chip-count of different brackets (this each grade), the chip-count of the remainder not eliminated is added at least in any one grade sheet.
Further, the sorting chips device of the preferred present invention also has device setup unit, this device setup unit is for before processing in above-mentioned classification, according to above-mentioned overall different grades of all number of chips, precalculate the quantity of grade sheet required for carrying out each grade of this classification process, prepare the quantity of this required grade sheet.
Further, it is preferable that the classification of the sorting chips device of the present invention processes and utilizes carrying arm the supply unit being mounted with the multiple semiconductor chips after wafer cuts off, and this semiconductor chip is transferred to successively the grade sheet on arrangement platform by different regulation grades.
The chip classification method of the present invention is the method carrying out classifying from the overall grade by each regulation each with the intrinsic performance data of chip, this chip classification method includes: classification quantity control operational process, classification quantity control arithmetic element carries out paying the quantity computing as the classification quantity of each grade according to the distribution classification of this performance data so that do not produce the sheet that the number of chips of expenditure is fewer than minimum reference number；With classification operation, taxon is carried out control tactics according to this classification expenditure quantity calculated and is processed, and thus reaches above-mentioned purpose.
In addition, it is preferably as follows mode: in the classification quantity control operational process in the chip classification method of the present invention, before above-mentioned taxon performs above-mentioned classification process, above-mentioned totally part or all is implemented the computing about above-mentioned classification quantity by the grade of each above-mentioned regulation by above-mentioned classification quantity control arithmetic element.
Further, it is preferably as follows mode: in the classification quantity control operational process in the said chip sorting technique of the present invention, computing above-mentioned classification quantity as follows: classify by maximum base value from first the grade sheet carrying out above-mentioned classification process, the chip-count being placed at least two grade sheet from finally is averaged divided by remaining grade sheet number by remaining all chip-count, the chip-count of the remainder not eliminated is added at least in any one grade sheet.
Further, it is preferably as follows mode: in the classification quantity control operational process in the sorting chips of the present invention, computing above-mentioned classification quantity as follows: the different grades of all number of chips on all of grade sheet carrying out above-mentioned classification process will be placed on, it is averaged divided by different grades of all grade sheet numbers by different grades of all chip-count, the chip-count of the remainder not eliminated is added at least in any one grade sheet.
Further, the chip classification method of the preferred present invention also has device and sets operation, this device sets operation for before processing in above-mentioned classification, device setup unit is according to above-mentioned overall different grades of all number of chips, precalculate the quantity of grade sheet required for carrying out each grade of this classification process, prepare the quantity of this required grade sheet.
The above-mentioned control program of the present invention is the program of the processing sequence of each operation describing the said chip sorting technique for making the computer execution present invention, thus reaches above-mentioned purpose.
The readable storage medium storing program for executing of the present invention is the above-mentioned control program that storage has the present invention, the storage medium that computer can be utilized to be read out, and thus reaches above-mentioned purpose.
According to said structure, below the effect of the present invention is illustrated.
In the present invention, the sorting chips device classified has carrying out from the overall grade by each regulation each with the intrinsic performance data of chip: classification quantity control arithmetic element, it carries out paying the quantity computing as the classification quantity of each grade according to the distribution classification of this performance data so that do not produce the sheet that the number of chips of expenditure is fewer than minimum reference number；And taxon, it carrys out control tactics according to this classification expenditure quantity calculated and processes.
Thus, because carrying out control tactics process based on according to performance data distribution classification expenditure quantity as the operation result of the classification quantity of each grade, make to produce the sheet that the number of chips of expenditure is fewer than minimum reference number, so weaving into again of stock need not be carried out, it is possible to the chip damage produced when preventing from weaving into again the chip transfer caused.
The effect of invention
Thus, by the present invention, pay quantity as the classification quantity of each grade according to the performance data distribution classification that chip is intrinsic, so there is no stock, weaving into again of stock need not be carried out as prior art, it is possible to the chip damage produced when preventing from weaving into again the chip transfer caused.
Accompanying drawing explanation
Fig. 1 is the floor map of the major part structure example of the sorting chips device roughly representing embodiments of the present invention 1.
Fig. 2 is that the sorting chips in the sorting chips device of Fig. 1 controls hardware structure diagram.
Fig. 3 indicates that about the number of chips of each wafer of grade A～I, the number of chips of every batch and the every chart of number of chips of many batches.
Fig. 4 indicates that the table of every batch of number of chips about grade A～I.
Fig. 5 is an illustration for the flow chart of the action in the control portion of the sorting chips device of Fig. 1.
The sorting chips that Fig. 6 is the sorting chips device of embodiments of the present invention 2 controls hardware structure diagram.
Fig. 7 is an illustration for the flow chart of the action in the control portion of the sorting chips device of Fig. 6.
Fig. 8 is an illustration for the flow chart of the action example of existing sorting chips device.
Fig. 9 is an illustration for the flow chart of other action example of existing sorting chips device.
The explanation of accompanying drawing labelling
1,1A sorting chips device
2 supply units
21 cut off wafer
3 arrangement platforms
31 grade sheets
4 carrying arms
41 hold assemblies (collet)
5 supply side image processing parts
6 arrangement side image processing parts
7 uninstalling portion
8 unloading extraction arm
9,9A controls device
90 input portions
91 display parts
92,92A control portion (CPU)
921 classification quantity control optimization arithmetic elements
922 device setup units
923 taxons
93RAM
94ROM
95 data bases
Detailed description of the invention
Hereinafter, the embodiment 1,2 with reference to the accompanying drawing sorting chips device to the present invention and chip classification method is described in detail.It addition, component parts and respective thickness and length etc. in figure are from the view point of drawing makes, it is not limited to the structure of diagram.
(embodiment 1)
Fig. 1 is the floor map of the major part structure example roughly representing the sorting chips device in embodiments of the present invention 1.The sorting chips that Fig. 2 is the sorting chips device of Fig. 1 controls hardware structure diagram.
At Fig. 1, the sorting chips device 1 of present embodiment 1 has: supply unit 2, and it is mounted with the multiple LED chips as semiconductor chip (hereinafter simply referred to as chip) cutting off wafer 21 being secured in adhesive sheet；Arrangement platform 3, it is for uses such as grade A, luminosity its second highest grade Bs high according to such as luminosity, successively by arrangements of chips on different grades of grade sheet 31；Carrying arm 4, it utilizes the hold assembly 41 being arranged on leading section attract and keep chip, turns to from supply unit 2 and transports on the different grades of grade sheet 31 arrangement platform 3；The supply side image processing part 5 cutting off wafer 21 in shooting supply unit 2；The arrangement side image processing part 6 of the chip of the same grade of shooting grade sheet 31 arrangement on arrangement platform 3；It is mounted with the uninstalling portion 7 of the grade sheet 31 of preparation；Unloading extraction arm 8, the grade sheet 31 of the preparation in uninstalling portion 7 is transferred on arrangement platform 3 by it；With control device 9, it controls these parts, to classify by the grade of each regulation from each having intrinsic the overall of performance data (test result), the mode that chip is transferred to arrangement platform 3 from supply unit 2 is controlled.
Cutting off wafer 21 has been the cut-out wafer after expanding/testing.Metal ring posts adhesive sheet, becomes the state being pasted with multiple chip on the cut-out wafer 21 on the surface of this adhesive sheet.Cutting off wafer 21, when LED chip, the placement number of the chip on a wafer is about 30000～120000.
Supply unit 2 is configured to move in X-direction and Y direction, and is configured to rotate with Qi Tai center for center of rotation.The X-direction of supply unit 2 be moved through not shown supply unit X-axis motor rotation drive, be mounted with supply unit 2 X-axis base movement together with carry out.Additionally, the Y direction of supply unit 2 be moved through not shown supply unit Y-axis motor rotation drive, be mounted with supply unit 2 and X-axis base Y-axis base movement together with carry out.Further, the spinning movement of supply unit 2 is driven by the rotation of not shown supply unit θ rotation motor, be mounted with supply unit 2, X-axis base and Y-axis base θ rotation base rotation together with carry out.In a word, supply unit 2 is positioned according to the supply side image information from supply side image processing part 5, moves so that next chip of same grade is positioned at the position that the hold assembly 41 of carrying arm 4 arrives successively.
Arrangement platform 3 is configured to move in X-direction and Y direction, and is configured to rotate with Qi Tai center for center of rotation.The rotation being moved through not shown arrangement platform X-axis motor of the X-direction of arrangement platform 3 drives, and carries out together with the movement with the X-direction of the X-axis base being mounted with arrangement platform 3.Additionally, the rotation being moved through not shown arrangement platform Y-axis motor of the Y direction of arrangement platform 3 drives, carry out together with the movement with the Y direction of the Y-axis base being mounted with arrangement platform 3 and X-axis base thereof.Further, the spinning movement of arrangement platform 3 is driven by the rotation of not shown arrangement platform θ rotation motor, be mounted with arrangement platform 3, its X-axis base and Y-axis base thereof θ rotation base rotation together with carry out.In a word, arrangement platform 3 is positioned according to the arrangement side image information carrying out self-align side image processing part 6, moves so that the position that chip is shipped by next arrangements of chips of same grade in the hold assembly 41 of carrying arm 4 successively.
At carrying arm 4, the hold assembly 41 being adsorbed by chip and keeping it is provided with in front end, carrying arm 4 is can be constituted in the way of rotating, to make hold assembly 41 rotate between supply unit 2 and arrangement platform 3 and to make hold assembly 41 can be constituted in the way of moving in the vertical direction.The rotation being moved through arm Z axis motor of the above-below direction of carrying arm 4 drives, and utilizes rack-and-pinion to carry out.Additionally, the spinning movement of carrying arm 4 is driven by the rotation of arm θ rotation motor, gear is utilized to carry out.
It is made up of computer system as in figure 2 it is shown, control device 9, has: the keyboard of various input instruction and/or the input portion 90 of mouse, picture input equipment etc. can be carried out；The display part 91 of initial picture, the selection various images such as guide picture and result picture can be shown on display picture according to various input instructions；CPU (central operation process device) as the control portion 92 carrying out classification quantity control optimization calculation process and classification process together with overall control；As the RAM93 of temporary, this temporary when CPU starts as working storage action；As the ROM94 of readable storage medium storing program for executing (memory element), this readable storage medium storing program for executing storage has the control program for making CPU start and uses the various data etc. of this control program, it is possible to utilize computer to be read out；With the information for storing the grade in checking with such as light characteristic inspection or electrical characteristics in the way of corresponding with the chip address on wafer, and can with reference to the data base 95 completing grade separation of this information, this control device 9 is controlled as follows: in the mode carrying out classifying from the overall grade by each regulation each with intrinsic performance data (test result, the class information corresponding with chip address), from supply unit 2, chip is transferred to arrangement platform 3.It addition, this data base 95 is arranged respectively with RAM93 and ROM94, but data base 95 can also in RAM93, it is also possible in ROM94.
Control portion 92 has: as the classification quantity control optimization arithmetic element 921 of classification quantity control arithmetic element, its based on from input portion 90 input instruction, read out to the control program in RAM93 and use the various data of this control program in ROM94, carry out the computing as the classification quantity of each grade of the performance data distribution classification expenditure quantity according to chip, make not produce the number of chips of expenditure and be used for the sheet that the minimum prescribed quantity (herein, being 1000) of minimum reference number is few；With the taxon 923 as sorting control, sorting chips process is controlled by it according to this classification expenditure quantity calculated.
ROM94 is made up of readable storage medium storing program for executing (memory element) such as hard disk, CD, disk and IC memorizeies.This control program and use its various data both can be loaded in ROM94 from the CD carried freely, disk and IC memorizer etc., it is also possible to be loaded in ROM94 from the hard disk of computer, it is also possible to through wirelessly or non-wirelessly, be loaded in ROM94 under Internet etc..
Herein, further the classification quantity control optimization calculation process utilizing classification quantity control optimization arithmetic element 921 to carry out computing in advance before being transferred to classification process is described in detail.
In a word, classification quantity control optimization arithmetic element 921 performs in taxon 923 before classification process, overall part or all of the intrinsic performance data (test result, for the class information of chip address) of chip is implemented the computing about classification quantity by the grade of each regulation.
So-called classification refers to, on the grade sheet 31 being picked up by each grade by the chip of the same grade from segmentation wafer 21 and being positioned on arrangement platform 3, is arranged in order.
So-called grade sheet 31 refers to, by the sheet on the arrangement platform 3 after each grade separation.There is the sheet of the classification quantity of grade.According to device, additionally it is possible to load the grade sheet of preparation.
The so-called data base 95 having completed grade separation refers to, comprises the view data (mapdata) of test data result, as the class information corresponding with chip address, stores the data obtained after the classification of with good grounds regulation is rated.It is rated accordingly with chip address and is stored in the data base 95 that completes grade separation.
So-called batch refers to, the multiple wafer number unit in the process being brought together.Herein, a collection of is 12 (or 25) wafers.
About overall part or all of the intrinsic performance data of chip, classify by each chip level.If considered with batch unit, then the performance data of a wafer is an overall part, and the collective data of the performance data of a batch (12 wafers) is overall whole.
So-called minimum prescribed quantity is minimum reference quantity, the necessary least unit of later half assembling determine.Herein, number of chips is such as 1000.Stock is become when number of chips is below specified quantity.
So-called maximum prescribed quantity is maximum benchmark quantity, is the quantity determined by expenditure space (making the region of the arrangements of chips on grade sheet 31).Herein, number of chips is such as 10000.By the upper limit determining quantity relative to the chip area of loading space and the interval of arrangement.
Automatically pay when reaching maximum prescribed quantity, but batch last, the grade sheet 31 that there is below minimum prescribed quantity in the prior art can not be paid and become the situation of stock.
On grade sheet 31, the chip-count of same grade reaches maximum prescribed quantity (here for 10000), or when being able to ensure that the expenditure quantity of wafer chip of more than minimum prescribed quantity (here for 1000), can pay, but on grade sheet, chip-count is less than minimum prescribed quantity, can not pay, become stock.To this, use the sorting chips device 1 of present embodiment 1, the classification quantity of managing chip so that chip does not become stock.Fig. 3～Fig. 5 is used further this to be described in detail.
Fig. 3 indicates that the number of chips of each wafer corresponding with grade A～I, the number of chips of every batch and the every chart of number of chips of many batches.Fig. 4 indicates that the table of the number of chips of every batch with grade A～corresponding for I.
As shown in Figure 3 and Figure 4, about grade A, although pay quantity by wafer units less than chip, but by batch unit (12 wafers), number of chips is 6000, is 1000 at each grade sheet 31 chip, it is possible to pay with 6 grade sheets 31.
In addition, about grade B, pay 10000 chips by batch unit (12 wafers) at initial grade sheet 31, become 999 chips at second grade sheet 31, this meets the situation that number of chips is unsatisfactory for 1000 of minimum prescribed quantity, it is impossible to pays and becomes stock.In order to prevent this situation, afterwards the calculation process of the sorting chips device 1 of present embodiment 1 is illustrated.
Further, about grade I, being 300 by batch unit (12 wafers) number of chips, be unsatisfactory for 1000 of chip expenditure quantity, by many batches of units, number of chips is 1300, becomes chip expenditure quantity more than 1000, it is possible to pay.
About grade B, the calculation process of the sorting chips device 1 of present embodiment 1 is described.That is, calculate classification expenditure quantity as classification quantity according to the performance data of chip, perform classification expenditure so that do not produce the grade sheet 31 that the quantity of expenditure is fewer than minimum reference number.Although before it is stated that but before performing classification process, overall part or all of the performance data of the chip in the data base 95 completing grade separation is implemented the computing about classification quantity.
Specifically, classification quantity control optimization arithmetic element 921 carries out classifying (here for 10000) to maximum base value (maximum prescribed quantity) from first the grade sheet 31 carrying out classification process, the number of chips being placed at least two grade sheet 31 from finally is averaged in the way of remaining all chip-count are divided by remaining grade sheet number, the chip-count of the remainder not eliminated is added in the grade sheet 31 of at least one in remaining grade sheet number.Taxon 923 is based on the classification expenditure quantity obtained plus remainder after remaining all number of chips are averaged, and control tactics processes.
Or, the all number of chips being placed on all of grade sheet 31 carrying out sorting chips process are averaged by classification quantity control optimization arithmetic element 921 in the way of different grades of all chip-count are divided by different grades of all grade sheet numbers, the remaining chip-count not eliminated are added at least in any one grade sheet.Taxon 923 is based on the classification expenditure quantity obtained plus remainder after all number of chips are averaged, and control tactics processes.
Such as, till carrying out being classified to maximum prescribed quantity (here for 10000) from first, front grade sheet 31, the number of chips being placed on latter two grade sheet 31 is averaged.In this case, when being 10999 by the number of chips of batch unit (12 wafers), grade B, the number of chips that first the grade sheet 31 that be in advance loads is 5500, and the number of chips loaded at second grade sheet 31 is 5499.The two grade sheet 31 all can carry out expenditure process.They with by identical for average by the gross process.
In addition, such as when being 20999 by the number of chips of batch unit (12 wafers), regulation grade, the number of chips that first the grade sheet 31 that be in advance loads is 10000, loading 5500 at second grade sheet 31, the number of chips loaded at Three Estate sheet 31 is 5499.In the indivisible situation of chip number on each grade sheet 31 of from finally second and the 3rd, the chip number on former successor one grade sheet 31 has more one of remainder or the mode of few loads chip.In a word, in from finally two grade sheets 31, the number of chips comprising a maximum prescribed quantity (here for 10000) is assigned in each grade sheet 31 of two.
Further, for instance till carrying out being classified to maximum prescribed quantity (here for 10000) from first, front grade sheet 31, the number of chips being placed on last Three Estate sheet 31 is averaged.In this case, when being 10999 by the number of chips of batch unit (12 wafers), grade B, the number of chips that first the grade sheet 31 that be in advance loads is 3667, the number of chips loaded at second grade sheet 31 is 3666, and the number of chips loaded at Three Estate sheet 31 is 3666.These three grade sheet 31 all can carry out expenditure process.They with by identical for average by the gross process.
In addition, such as when being 20999 by the number of chips of batch unit (12 wafers), regulation grade, the number of chips that first the grade sheet 31 that be in advance loads is 10000,3667 are loaded at second grade sheet 31, the number of chips loaded at Three Estate sheet 31 is 3666, and the number of chips loaded at the 4th grade sheet 31 is 3666.In the indivisible situation of chip number on each grade sheet 31 of second～the 4th, the mode of or less that in the past, the chip number on successor one grade sheet 31 has more remainder loads chip.In a word, at Three Estate sheet 31 from finally, the number of chips comprising a maximum prescribed quantity (here for 10000) is assigned in each grade sheet 31 of three.
According to said structure, below its action is illustrated.
Fig. 5 is an illustration for the flow chart of the action in the control portion of the sorting chips device of Fig. 1.
As it is shown in figure 5, the information with the grade in such as light characteristic inspection or electrical characteristics inspection is stored in the data base 95 completing grade separation in the way of corresponding with the chip address on wafer.
First, in step S1, classification quantity control optimization arithmetic element 921 carries out classification quantity control optimization calculation process.That is, utilize grader, calculate the classification expenditure number of chips of the best according to the test result in wafer images so that the quantity not producing to pay is a small amount of sheet, it is achieved occur without the classification expenditure of waste.In a word, the chip count according to same grade precalculates and asks for the expenditure quantity of every grade sheet number so that do not produce minimum prescribed quantity (here for such as 1000) grade sheet 31 below.
Specifically, when being 10999 by the number of chips of batch unit (12 wafers), grade B, two grade sheets 31 distribute number of chips, making the number of chips such as loaded at first grade sheet 31 is 5999, and the number of chips loaded on second grade sheet 31 is 5000.Thus, the grade sheet 31 that two is expenditure quantity (more than 1000) is formed, so that do not produce the grade sheet 31 of below minimum prescribed quantity, it is possible to make not produce stock.
Then, in step S2, taxon 923 carries out classification process by each grade of light characteristic inspection or electrical characteristics inspection.That is, the chip address according to each grade of the data base 95 of grade separation of having controlled oneself, selects the chip of same grade from the wafer that cuts off in the donor sheet supply unit 2, is arranged in order and transfers load on the grade sheet 31 on other arrangement platform 3.
Then, expenditure process is carried out in step S3.Namely, on grade sheet 31, chip-count reaches maximum prescribed quantity, or on the previous grade sheet 31 of grade final piece and grade final piece, already ensure that the expenditure quantity of the chip of more than minimum prescribed quantity (here for 1000), therefore do not become stock, all pay.
Afterwards, judging whether being complete all process in step S4, in step S4, if completing all process (being (YES)), then terminating to process.Additionally, in step S4, if being not fully complete all process (no (NO)), then return next step S1, be transferred to classification quantity control optimization calculation process next time.
In a word, chip classification method has: classification quantity control operational process, classification quantity control arithmetic element 921 carries out paying the quantity computing as the classification quantity of each grade according to performance data distribution classification so that do not produce the sheet that the number of chips of expenditure is fewer than minimum reference number；With classification operation, classification process is controlled by taxon 923 according to this classification expenditure quantity calculated.
Above, according to present embodiment 1, having: classification quantity control arithmetic element 921, it carries out paying the quantity computing as the classification quantity of each grade according to performance data distribution classification so that do not produce the sheet that the number of chips of expenditure is fewer than minimum reference number；With taxon 923, classification process is controlled by it according to this classification expenditure quantity calculated.
Thus, before proceeding by classification process, press different brackets according to the chip count of same grade and calculate expenditure quantity (number of categories is divided by grade sheet) so that do not produce to be unsatisfactory for the grade sheet 31 of minimum prescribed quantity.
Therefore, owing to carrying out control tactics process based on according to performance data distribution classification expenditure quantity as the operation result of the classification quantity of each grade, make to produce the sheet that the number of chips of expenditure is fewer than minimum reference number, so not carrying out weaving into again of stock, it is possible to the chip damage produced when preventing from weaving into again the chip transfer caused.
Further, owing to being prevented from continuing to store stock (stock continues to become stock), therefore, it is possible to improve productivity ratio, and stock control expense (number in man-hour) can be cut down.
(embodiment 2)
The sorting chips that Fig. 6 is the sorting chips device of embodiments of the present invention 2 controls hardware structure diagram.It addition, to the component parts playing the action effect identical with the component parts of Fig. 1 and Fig. 2, illustrate with marking identical accompanying drawing labelling.
Control device 9A in Fig. 6, the sorting chips device 1A of present embodiment 2 is made up of computer system, has: can carry out keyboard and/or the input portion 90 such as mouse, picture input equipment of various input instruction；The display part 91 of initial picture, the selection various images such as guide picture and result picture can be shown on display picture according to various input instructions；CPU (central operation process device) as the control portion 92A of the control carrying out entirety；As the RAM93 of temporary, its when CPU starts as working storage action；As the ROM94 of readable storage medium storing program for executing (memory element), its storage has the control program for making CPU start and uses the various data etc. of this control program, it is possible to utilize computer to be read out；With the information for storing the grade in checking with such as light characteristic inspection or electrical characteristics in the way of corresponding with the chip address on wafer, and can with reference to the data base 95 completing classification of this information, and it is controlled as follows: from each having intrinsic performance data (test result, the class information corresponding with chip address) overall (test result information) classify by the grade of each regulation, chip is transferred to arrangement platform 3 from supply unit 2.It addition, this data base 95 is arranged respectively with RAM93 and ROM94, but data base 95 can also in RAM93, it is also possible in ROM94.
Control device 92A to have: as the classification quantity control optimization arithmetic element 921 of classification quantity control arithmetic element, its based on from input portion 90 input instruction, read out to the control program in RAM93 and use the various data of this control program in ROM94, carry out the performance data distribution classification expenditure quantity according to chip as the computing of the classification quantity of each grade so that the number of chips not producing to pay is used for the sheet that the minimum prescribed quantity (here for 1000) of minimum reference number is few；Device setup unit 922, it is prepared for precalculating the quantity of the one or more grade sheets 31 required for each grade；With the taxon 923 as sorting control, sorting chips process is controlled by it according to this classification expenditure quantity calculated.
According to said structure, below its action is illustrated.
Fig. 7 is an illustration for the flow chart of the action of the control portion 92A of the sorting chips device 1A of Fig. 6.
As it is shown in fig. 7, the information with the grade in such as light characteristic inspection or electrical characteristics inspection is stored in the data base 95 completing grade separation in the way of corresponding with the chip address on wafer.
First, in step S11, classification quantity control optimization arithmetic element 921 carries out classification quantity control optimization calculation process.That is, utilize grader, calculate the classification expenditure number of chips of the best according to the test result in wafer images so that the quantity not producing to pay is a small amount of sheet, it is achieved occur without the classification expenditure of waste.In a word, precalculate according to the chip count of same grade and ask for the expenditure quantity of each grade sheet 31, so that not producing minimum prescribed quantity (here for such as 1000) grade sheet 31 below.
Specifically, when being 10999 by the number of chips of batch unit (12 wafers), grade B, two grade sheets 31 distribute number of chips, making the number of chips such as loaded at first grade sheet 31 is 5999, and the number of chips loaded on second grade sheet 31 is 5000.Thus, the grade sheet 31 that two is expenditure quantity (more than 1000) is formed, so that do not produce the grade sheet 31 of below minimum prescribed quantity, it is possible to make not produce stock.
Then, in step S12, device setup unit 922 carries out device setting process.That is, precalculate and prepare the quantity of one or more grade sheets 31 required for each grade.
Then, in step S13, taxon 923 carries out classification process by each grade of light characteristic inspection or electrical characteristics inspection.That is, the chip address according to each grade of the data base 95 of grade separation of having controlled oneself, selects the chip of same grade from the wafer that cuts off in the donor sheet supply unit 2, is arranged in order and transfers load on the grade sheet 31 on other arrangement platform 3.
Then, expenditure process is carried out in step S14.Namely, on grade sheet 31, chip-count reaches maximum prescribed quantity, or on the previous grade sheet 31 of grade final piece and grade final piece, already ensure that the expenditure quantity of the chip of more than minimum prescribed quantity (here for 1000), therefore do not become stock, all pay.
Afterwards, judging whether being complete all process in step S15, in step S15, if completing all process (YES), then terminating to process.Additionally, in step S15, if being not fully complete all process (no), then return next step S11, be transferred to classification quantity control optimization calculation process next time.
In a word, chip classification method has: classification quantity control operational process, classification quantity control arithmetic element 921 carries out paying the quantity computing as the classification quantity of each grade according to performance data distribution classification so that do not produce the sheet that the number of chips of expenditure is fewer than minimum reference number；Device sets operation, for making device setup unit 922 according to overall different grades of all number of chips, precalculates the quantity by the grade sheet required for each grade carrying out classification process, thus preparing the quantity of required grade sheet；With classification operation, taxon 923 processes based on this classification expenditure quantity control tactics calculated.
As mentioned above, according to present embodiment 2, owing to carrying out control tactics process based on according to performance data distribution classification expenditure quantity as the operation result of the classification quantity of each grade, make to produce the sheet that the number of chips of expenditure is fewer than minimum reference number, so not carrying out weaving into again of stock, it is possible to the chip damage produced when preventing from weaving into again the chip transfer caused.
Particularly, if not carrying out the preparation of grade sheet 31, then needing in the prior art to temporarily cease sorting chips device, after supplementing the grade sheet of not enough grade, sorting chips device being restarted, present embodiment 2 is then absent from these needs.Namely, it is possible to prevent temporarily ceasing and restarting of sorting chips device.
As it has been described above, use the preferred embodiment of the present invention 1,2 exemplified with the present invention, but the present invention should not be limited to this embodiment 1,2 ground and makes an explanation.The present invention should be understood that and explains its scope according only to scope of the claims.Be interpreted as the industry practitioner can from the concrete preferred implementation 1 of the present invention, 2, record and technology general knowledge according to the present invention implement scope of equal value.Patent, patent application and the document quoted in this manual is construed as its content self and quotes its content with concrete in this manual record similarly as to the reference of this specification.
Industrial applicability
The present invention is from being mounted with in the supply unit that wafer cuts off and is pasted on the multiple semiconductor chips obtained in adhesive sheet, semiconductor chip is transferred to successively the sorting chips device on such as different grades of arrangement platform, and use the chip classification method of this sorting chips device, describe and have for making computer perform the control program of processing sequence of each operation of this chip classification method and storage has in the field of the readable storage medium storing program for executing that computer can be utilized to be read out of this control program, the quantity classification quantity as each grade is paid according to the distribution classification of chip inherent characteristic data, therefore stock is not become, weaving into again of stock will not be carried out as prior art, the chip damage produced when being prevented from weaving into again the chip transfer caused.
Claims (11)
1. a sorting chips device, it is classified from each having the overall of the intrinsic performance data of chip by the grade of each regulation, and this sorting chips device is characterised by, including:
Classification quantity control arithmetic element, it carries out paying the quantity computing as the classification quantity of each grade according to the distribution classification of this performance data so that do not produce the sheet that the number of chips of expenditure is fewer than minimum reference number；With
Taxon, it carrys out control tactics according to this classification expenditure quantity calculated and processes.
2. sorting chips device as claimed in claim 1, it is characterised in that:
Described classification quantity control arithmetic element performs in described taxon before described classification process, by the grade of each described regulation, described totally part or all is implemented the computing about described classification quantity.
3. sorting chips device as claimed in claim 2, it is characterised in that:
Classification quantity described in described classification quantity control arithmetic element computing as follows: classify by maximum base value from first the grade sheet carrying out described classification process, the chip-count being placed at least two grade sheet from finally is averaged divided by remaining grade sheet number by remaining all chip-count, the chip-count of the remainder not eliminated is added at least in any one grade sheet.
4. sorting chips device as claimed in claim 2, it is characterised in that:
Classification quantity described in described classification quantity control arithmetic element computing as follows: the different grades of all number of chips on all of grade sheet carrying out described classification process will be placed on, it is averaged divided by different grades of all grade sheet numbers by different grades of all chip-count, the chip-count of the remainder not eliminated is added at least in any one grade sheet.
5. sorting chips device as claimed in claim 1, it is characterised in that:
Also there is device setup unit, it is for before processing in described classification, according to described overall different grades of all number of chips, precalculate the quantity of grade sheet required for carrying out each grade of this classification process, prepare the quantity of this required grade sheet.
6. sorting chips device as claimed in claim 1, it is characterised in that:
Described classification processes and utilizes carrying arm the supply unit being mounted with the multiple semiconductor chips after wafer cuts off, and this semiconductor chip is transferred to successively the grade sheet on arrangement platform by different regulation grades.
7. a chip classification method, it is classified from each having the overall of the intrinsic performance data of chip by the grade of each regulation, and this chip classification method is characterised by, including:
Classification quantity control operational process, classification quantity control arithmetic element carries out paying the quantity computing as the classification quantity of each grade according to the distribution classification of this performance data so that do not produce the sheet that the number of chips of expenditure is fewer than minimum reference number；With
Classification operation, taxon is carried out control tactics according to this classification expenditure quantity calculated and is processed.
8. chip classification method as claimed in claim 7, it is characterised in that:
Described classification quantity control operational process, before described taxon performs described classification process, described totally part or all is implemented the computing about described classification quantity by the grade of each described regulation by described classification quantity control arithmetic element.
9. chip classification method as claimed in claim 8, it is characterised in that:
Classification quantity described in described classification quantity control operational process computing as follows: classify by maximum base value from first the grade sheet carrying out described classification process, the chip-count being placed at least two grade sheet from finally is averaged divided by remaining grade sheet number by remaining all chip-count, the chip-count of the remainder not eliminated is added at least in any one grade sheet.
10. chip classification method as claimed in claim 8, it is characterised in that:
Classification quantity described in described classification quantity control operational process computing as follows: the different grades of all number of chips on all of grade sheet carrying out described classification process will be placed on, it is averaged divided by different grades of all grade sheet numbers by different grades of all chip-count, the chip-count of the remainder not eliminated is added at least in any one grade sheet.
11. chip classification method as claimed in claim 7, it is characterised in that:
Also there is device and set operation, before processing in described classification, device setup unit according to described overall different grades of all number of chips, precalculates the quantity of grade sheet required for carrying out each grade of this classification process, prepares the quantity of this required grade sheet.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012-103500 | 2012-04-27 | ||
| JP2012103500 | 2012-04-27 | ||
| PCT/JP2013/001844 WO2013161173A1 (en) | 2012-04-27 | 2013-03-18 | Chip-sorting device and chip-sorting method, control program, readable memory medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104254911A CN104254911A (en) | 2014-12-31 |
| CN104254911B true CN104254911B (en) | 2016-07-06 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201380021965.2A Expired - Fee Related CN104254911B (en) | 2012-04-27 | 2013-03-18 | Sorting chips device and chip classification method |
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| Country | Link |
|---|---|
| JP (1) | JP5941982B2 (en) |
| CN (1) | CN104254911B (en) |
| TW (1) | TWI601224B (en) |
| WO (1) | WO2013161173A1 (en) |
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| WO2018163388A1 (en) * | 2017-03-09 | 2018-09-13 | 株式会社Ｆｕｊｉ | Component mounting machine |
| US11239101B2 (en) | 2017-03-09 | 2022-02-01 | Fuji Corporation | Wafer supply device |
| CN109830447B (en) * | 2019-01-17 | 2020-11-27 | 深圳赛意法微电子有限公司 | Semiconductor wafer chip sorting method, semiconductor product packaging method and semiconductor product packaging system |
| CN112612660B (en) * | 2020-12-16 | 2024-02-13 | 海光信息技术股份有限公司 | Specification information database creation method, chip selection method, device and system |
| CN113387167B (en) * | 2021-06-18 | 2023-04-28 | 上海金东唐科技有限公司 | Laser chip processing method and device and electronic equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JPH01172536A (en) * | 1987-12-25 | 1989-07-07 | Daihatsu Motor Co Ltd | Heat insulating and heat-resistant ceramic porous body conjugate metallic material |
| JPH04343485A (en) * | 1991-05-21 | 1992-11-30 | Dowa Mining Co Ltd | Semiconductor pellet sortor |
| JPH0936203A (en) * | 1995-07-20 | 1997-02-07 | Canon Inc | Transfer body device and its control method |
| JPH10144741A (en) * | 1996-11-07 | 1998-05-29 | Rohm Co Ltd | Method and device for classifying ability of ic chip |
| JP3605009B2 (en) * | 2000-08-03 | 2004-12-22 | 三洋電機株式会社 | Method for manufacturing semiconductor device |
| AT6405U1 (en) * | 2002-06-05 | 2003-10-27 | Card Casinos Austria Res & Dev | CHIP SORTING DEVICE |
| TW200848722A (en) * | 2007-06-15 | 2008-12-16 | King Yuan Electronics Co Ltd | Automatic optical inspection device |
| JP4931710B2 (en) * | 2007-06-29 | 2012-05-16 | 株式会社リコー | Non-defective chip classification method on wafer, chip quality determination method using the same, chip classification program, chip quality determination program, marking mechanism, and semiconductor device manufacturing method |
-
2013
- 2013-03-18 JP JP2014512314A patent/JP5941982B2/en not_active Expired - Fee Related
- 2013-03-18 CN CN201380021965.2A patent/CN104254911B/en not_active Expired - Fee Related
- 2013-03-18 WO PCT/JP2013/001844 patent/WO2013161173A1/en active Application Filing
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| JPWO2013161173A1 (en) | 2015-12-21 |
| TW201351539A (en) | 2013-12-16 |
| WO2013161173A1 (en) | 2013-10-31 |
| TWI601224B (en) | 2017-10-01 |
| JP5941982B2 (en) | 2016-06-29 |
| CN104254911A (en) | 2014-12-31 |
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