CN104254911A - Chip-sorting device and chip-sorting method, control program, readable memory medium - Google Patents
Chip-sorting device and chip-sorting method, control program, readable memory medium Download PDFInfo
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- CN104254911A CN104254911A CN201380021965.2A CN201380021965A CN104254911A CN 104254911 A CN104254911 A CN 104254911A CN 201380021965 A CN201380021965 A CN 201380021965A CN 104254911 A CN104254911 A CN 104254911A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67271—Sorting devices
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
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Abstract
[Problem] To avoid reorganizing the inventory and to prevent chip damage that occurs during chip transfer due to reorganization. [Solution] This invention has: a sorting quantity management computation means (921) for the allocational computation of a sort delivery quantity as the sort quantity in each rank on the basis of characteristics data so that there are no sheets produced in which the delivered chip quantity is less than a minimum standard number; and a sorting means (923) for controlling the sorting process on the basis of the computed sort delivery quantity.
Description
Technical field
The present invention relates to and wafer cut off from being mounted with and being pasted in the supply unit of multiple semiconductor chips that adhesive sheet obtains, semiconductor chip is transferred to successively the sorting chips device on the arrangement platform of such as different brackets, and uses the chip classification method of this sorting chips device, describe the computer that can utilize having the control program for making computer perform the processing sequence of each operation of this chip classification method and store this control program and carry out the readable storage medium storing program for executing read.
Background technology
Existing sorting chips device cuts off wafer can the supply unit of movement in the XY plane be made up of orthogonal X-axis and Y-axis be loaded.According to the cut-out wafer overhead view image from the ccd video camera be fixed on pedestal, the storage information of the grade of the tape test result corresponding with chip address is differentiated, utilize robots arm to wait by its chip of each hierarchical selection, transfer load on the grade sheet on other arrangement platform from supply unit.
On grade sheet, chip-count reaches maximum prescribed quantity, or when guaranteeing the expenditure quantity of wafer chip of more than minimum prescribed quantity, can pay, but chip-count becomes stock less than not paying when minimum prescribed quantity on grade sheet.
Fig. 8 is the flow chart of the action case for illustration of existing sorting chips device.
As shown in Figure 8, to be stored in the mode corresponding with the chip address on wafer with the information of the grade in such as light characteristic inspection or electrical characteristics inspection and to complete in the database of grade separation.
First, in step S101, carry out classification process by each grade in light characteristic inspection or electrical characteristics inspection.That is, according to the chip address of each grade of grade separation database of having controlled oneself, select the chip of same grade from the cut-out wafer in the donor sheet supply unit, transfer load on the grade sheet on other arrangement platform.
Then, volume check process is carried out in step S102.That is, whether maximum prescribed quantity is reached to chip-count on grade sheet, or whether be grade final piece and guaranteed that the expenditure quantity of the wafer chip of more than minimum prescribed quantity judges.
Then, expenditure process is carried out in step S103.That is, when having guaranteed the expenditure quantity of the wafer chip of more than minimum prescribed quantity, pay on grade sheet, chip-count reaches maximum prescribed quantity or for grade final piece.
Afterwards, in step S104, determine whether to complete all process, if completed all process (being (YES)) in step S104, then end process.In addition, if do not complete all process (no (NO)) in step S104, then the classification process of next step S101 is returned, process of next time classifying.
In addition, stock processing is carried out in step S105.That is, be in grade final piece, chip-count is less than minimum prescribed quantity in the result of the volume check of step S102, using the chip on this grade sheet as stock.
Further, carry out multiple grade sheets of same grade being transferred to regathering and weaving into process again of a grade sheet in step S106.
Then, volume check process is carried out in step S107.That is, whether maximum prescribed quantity reached to chip-count on grade sheet or whether be grade final piece and guaranteed that the expenditure quantity of the chip of more than minimum prescribed quantity judges.
Then, expenditure process is carried out in step S108.That is, chip-count reaches maximum prescribed quantity on grade sheet or when having guaranteed the expenditure quantity of wafer chip of more than minimum prescribed quantity, the expenditure process of the chip on grade sheet is carried out.
In addition, the chip-count on step S107 grade sheet does not arrive minimum prescribed quantity, return step S105, stock processing is carried out to this chip.Repeat step S105 ~ step S107, when the chip-count on grade sheet is more than minimum prescribed quantity, carry out the expenditure process of the chip on grade sheet in step S108.
Further, in step S109, determine whether to complete all process, if completed all process (YES) in step S109, then end process.In addition, if do not complete all process (no) in step S109, then return next step S101, be transferred to process of next time classifying.
Fig. 9 is the flow chart of other action case for illustration of existing sorting chips device.
As shown in Figure 9, to be stored in the mode corresponding with the chip address on wafer with the information of the grade in such as light characteristic inspection or electrical characteristics inspection and to complete in grade separation database.
First, in step S201, carry out device setting process.That is, one or more grade sheet is prepared by each grade in advance.If do not carry out the preparation of grade sheet, then need sorting chips device temporarily to stop, after supplementing the grade sheet of not enough grade, sorting chips device being restarted.
Then, in step S202, each grade in checking by light characteristic inspection or electrical characteristics, to carry out sorting chips from supply unit to the classification process of the arrangement platform of different brackets.That is, according to the chip address of each grade of grade separation database of having controlled oneself, the cut-out wafer in the donor sheet the supply unit of loading dividing semiconductor wafer selects the chip of same grade, transfers load on the grade sheet on other arrangement platform.
Then, volume check process is carried out in step S203.That is, whether maximum prescribed quantity is reached to chip-count on grade sheet, or whether be grade final piece and guaranteed that the expenditure quantity of the wafer chip of more than minimum prescribed quantity judges.
In a word, sorting chips is carried out to now or to classification chip supply unit not having same grade.
Afterwards, expenditure process is carried out in step S204.That is, chip-count reaches maximum prescribed quantity on grade sheet, or be grade final piece and when having guaranteed the expenditure quantity of the wafer chip of more than minimum prescribed quantity, pay.
Afterwards, in step S205, determine whether to complete all process, if completed all process (YES) in step S205, then end process.In addition, if do not complete all process (no) in step S205, then the process of next step S206 is transferred to.
Further, the check processing of preparing grade sheet is carried out in step S206.That is, by the presence or absence of the grade sheet of different brackets inspection preparation, if there is the grade sheet of preparation, after the classification process proceeding next step S207, the volume check process of step S203 is transferred to.
On the other hand, stock processing is carried out in step S208.That is, be in grade final piece, chip-count is less than minimum prescribed quantity in the result of the volume check of step S203, using this chip as stock.
Further, carry out multiple grade sheets of same grade being transferred to regathering and weaving into process again of a grade sheet in step S209.
Then, volume check process is carried out in step S210.That is, whether maximum prescribed quantity is reached to chip-count on grade sheet, or whether be grade final piece and guaranteed that the expenditure quantity of the chip of more than minimum prescribed quantity judges.
Afterwards, expenditure process is carried out in step S211.That is, chip-count reaches maximum prescribed quantity on grade sheet or when having guaranteed the expenditure quantity of wafer chip of more than minimum prescribed quantity, the expenditure process of the chip on grade sheet is carried out.
In addition, when the result of the volume check of step S210 be chip-count in grade final piece do not arrive minimum prescribed quantity, return step S208, stock processing carried out to this chip.Repeat step S208 ~ step S210, when the chip-count in grade final piece is more than minimum prescribed quantity, carry out the expenditure process of the chip on grade sheet in step S211.
Further, in step S212, determine whether to complete all process, if completed all process (YES) in step S212, then end process.In addition, if do not complete all process (no) in step S212, then the classification process of next step S202 is transferred to.
On the other hand, in patent documentation 1, the platform of existing sorting chips device movement in the XY plane that can be formed in orthogonal two axles and X-axis and Y-axis loads cut-off wafer, the ccd video camera being fixed on pedestal is utilized to differentiate the good, bad of semiconductor chip, robot etc. is utilized to hold this wafer, first, this wafer is transferred load to for the time being the aligning platform being fixed on pedestal.There is in orthogonal both direction the press section of benchmark, utilize the positioning table being fixed on pedestal, mechanically press chip in this both direction and position, afterwards, use the transfer mechanisms such as other robot instead and hold semiconductor chip, semiconductor chip is transferred load to the place of regulation.
Prior art document
Patent documentation
Patent documentation 1: Japanese Unexamined Patent Publication 09-036203 publication
Summary of the invention
Invent technical problem to be solved
In above-mentioned existing sorting chips device, what be loaded into as expenditure the chip become in the grade final piece of stock goes out pallet piling up method, the basis of minimum prescribed quantity of same grade sheet being weaved into, being guaranteed wafer chip is again paid, but utilize this to go out pallet piling up method, for minority grade stock not cancellation, total is tool state in stock, needs repeatedly to weave into again.
That is, the chip do not met in the grade final piece of minimum prescribed quantity becomes stock.Weave into again together with the stock of this stock in the grade final piece of the same grade of different batches, thus, on grade sheet, chip-count reaches maximum prescribed quantity or when having guaranteed the expenditure quantity of chip of more than minimum prescribed quantity, can pay, but because when weaving into, chip is picked and placeed in order to transfer, so chip sustains damage again at every turn.
On the other hand, above-mentioned existing sorting chips device disclosed in patent documentation 1 is the device about sorting mechanism, pays with the relation of stock without any record about chip.
The present invention is the invention for solving above-mentioned existing problem, therefore its object is to provide and do not weave into again in stock thus the sorting chips device of the chip that can prevent from producing when weaving into the chip transfer caused again damage, and use the chip classification method of this sorting chips device, describe the computer that can utilize having the control program for making computer perform the processing sequence of each operation of this chip classification method and store this control program and carry out the readable storage medium storing program for executing read.
For the means of technical solution problem
Sorting chips device of the present invention is classified from the overall grade by each regulation separately with the intrinsic performance data of chip by the grade of each regulation, this sorting chips device comprises: classification quantity control arithmetic element, it carries out dividing distribution sort to pay quantity as the computing of the classification quantity of each grade according to this performance data, the sheet that the number of chips making not produce expenditure is fewer than minimum reference number; And taxon, it carrys out control tactics process according to this classification expenditure quantity calculated, and achieves the above object thus.
In addition, the classification quantity control arithmetic element of preferred sorting chips device of the present invention, before above-mentioned sorting control performs above-mentioned classification process, is implemented about the computing of above-mentioned classification quantity above-mentioned totally part or all by the grade of each afore mentioned rules.
Further, the classification quantity control arithmetic element computing above-mentioned classification quantity as follows of preferred said chip sorter of the present invention: classify by maximum base value from first the grade sheet carrying out above-mentioned classification process, the chip-count be placed on from finally at least two grade sheets is averaged divided by remaining grade sheet number by remaining all chip-count, the chip-count of the remainder do not eliminated is added at least in any one grade sheet.
Further, the classification quantity control arithmetic element computing above-mentioned classification quantity as follows of preferred sorting chips device of the present invention: will all number of chips of the different brackets (each grade) carried out on all grade sheets of above-mentioned classification process be placed on, be averaged by all chip-count of different brackets (this each grade) all grade sheet numbers divided by different brackets (this each grade), the chip-count of the remainder do not eliminated added at least in any one grade sheet.
Further, preferred sorting chips device of the present invention also has device setup unit, this device setup unit was used for before above-mentioned classification process, according to all number of chips of above-mentioned overall different brackets, precalculate the quantity of the grade sheet required for each grade carrying out this classification process, prepare the quantity of this required grade sheet.
Further, this semiconductor chip, from the supply unit of the multiple semiconductor chips be mounted with after wafer cut-out, is transferred to the grade sheet on arrangement platform by the classification processing and utilizing carrying arm of preferred sorting chips device of the present invention successively by different regulation grades.
Chip classification method of the present invention carries out the method for classifying from the overall grade by each regulation separately with the intrinsic performance data of chip, this chip classification method comprises: classification quantity control operational process, classification quantity control arithmetic element carries out dividing distribution sort to pay the computing of quantity as the classification quantity of each grade according to this performance data, the sheet that the number of chips making not produce expenditure is fewer than minimum reference number; With classification operation, taxon carrys out control tactics process according to this classification expenditure quantity calculated, and achieves the above object thus.
In addition, be preferably as follows mode: in the classification quantity control operational process in chip classification method of the present invention, before above-mentioned sorting control performs above-mentioned classification process, above-mentioned classification quantity control arithmetic element presses the grade of each afore mentioned rules to the computing of above-mentioned part or all enforcement totally about above-mentioned classification quantity.
Further, be preferably as follows mode: in the classification quantity control operational process in said chip sorting technique of the present invention, computing above-mentioned classification quantity as follows: classify by maximum base value from first the grade sheet carrying out above-mentioned classification process, the chip-count be placed on from finally at least two grade sheets is averaged divided by remaining grade sheet number by remaining all chip-count, the chip-count of the remainder do not eliminated is added at least in any one grade sheet.
Further, be preferably as follows mode: in the classification quantity control operational process in sorting chips of the present invention, computing above-mentioned classification quantity as follows: will all number of chips of the different brackets carried out on all grade sheets of above-mentioned classification process be placed on, be averaged by all chip-count of different brackets all grade sheet numbers divided by different brackets, the chip-count of the remainder do not eliminated added at least in any one grade sheet.
Further, preferred chip classification method of the present invention also has device setting operation, this device setting operation was used for before above-mentioned classification process, device setup unit is according to all number of chips of above-mentioned overall different brackets, precalculate the quantity of the grade sheet required for each grade carrying out this classification process, prepare the quantity of this required grade sheet.
Above-mentioned control program of the present invention describes the program for making computer perform the processing sequence of each operation of said chip sorting technique of the present invention, achieves the above object thus.
Readable storage medium storing program for executing of the present invention stores above-mentioned control program of the present invention, computer can be utilized to carry out the storage medium read, and achieves the above object thus.
According to said structure, below effect of the present invention is described.
In the present invention, have in the sorting chips device of classifying carrying out from the overall grade by each regulation separately with the intrinsic performance data of chip: classification quantity control arithmetic element, it carries out dividing distribution sort to pay quantity as the computing of the classification quantity of each grade according to this performance data, the sheet that the number of chips making not produce expenditure is fewer than minimum reference number; And taxon, it carrys out control tactics process according to this classification expenditure quantity calculated.
Thus, because carry out control tactics process based on the operation result dividing distribution sort expenditure quantity as the classification quantity of each grade according to performance data, the sheet that the number of chips making to produce expenditure is fewer than minimum reference number, so weaving into again of stock need not be carried out, the chip damage produced when weaving into the chip transfer caused again can be prevented.
The effect of invention
Thus, by the present invention, the performance data intrinsic according to chip divides distribution sort to pay quantity as the classification quantity of each grade, so there is no stock, weaving into again of stock need not be carried out as prior art, the chip damage produced when weaving into the chip transfer caused again can be prevented.
Accompanying drawing explanation
Fig. 1 is the floor map of the major part structure example of the sorting chips device roughly representing embodiments of the present invention 1.
Fig. 2 is the sorting chips control hardware structure chart in the sorting chips device of Fig. 1.
Fig. 3 is the number of chips of each wafer represented about grade A ~ I, the number of chips often criticized and the every chart of number of chips of many batches.
Fig. 4 represents the table often criticizing number of chips about grade A ~ I.
Fig. 5 is the flow chart of the action of the control part of sorting chips device for illustration of Fig. 1.
Fig. 6 is the sorting chips control hardware structure chart of the sorting chips device of embodiments of the present invention 2.
Fig. 7 is the flow chart of the action of the control part of sorting chips device for illustration of Fig. 6.
Fig. 8 is the flow chart of the action case for illustration of existing sorting chips device.
Fig. 9 is the flow chart of other action case for illustration of existing sorting chips device.
The explanation of Reference numeral
1,1A sorting chips device
2 supply units
21 cut off wafer
3 arrangement platforms
31 grade sheets
4 carrying arms
41 hold assemblies (collet)
5 supply side image processing parts
6 arrangement side image processing parts
7 uninstalling portion
8 unloading extraction arm
9,9A control device
90 input parts
91 display parts
92,92A control part (CPU)
921 classification quantity control optimization arithmetic elements
922 device setup units
923 taxons
93 RAM
94 ROM
95 databases
Embodiment
Below, be described in detail with reference to the execution mode 1,2 of accompanying drawing to sorting chips device of the present invention and chip classification method.In addition, the component parts in figure and respective thickness and length etc. make from the view point of drawing, are not limited to illustrated structure.
(execution mode 1)
Fig. 1 is the floor map of the major part structure example of the sorting chips device roughly represented in embodiments of the present invention 1.Fig. 2 is the sorting chips control hardware structure chart of the sorting chips device of Fig. 1.
At Fig. 1, the sorting chips device 1 of present embodiment 1 has: supply unit 2, and it is mounted with multiple LED chip as semiconductor chip (hereinafter simply referred to as chip) of the cut-out wafer 21 be secured in adhesive sheet; Arrangement platform 3, it is for according to uses such as the high grade A of such as luminosity, grade B that luminosity is secondly high, successively by arrangements of chips on the grade sheet 31 of different brackets; Carrying arm 4, it utilizes the hold assembly 41 being arranged on leading section attract and keep chip, transports from the grade sheet 31 that supply unit 2 turns to the different brackets arrangement platform 3; The supply side image processing part 5 of the cut-out wafer 21 in shooting supply unit 2; The arrangement side image processing part 6 of the chip of the same grade that the grade sheet 31 of shooting on arrangement platform 3 arranges; Be mounted with the uninstalling portion 7 of the grade sheet 31 of preparation; Unloading extraction arm 8, the grade sheet 31 of the preparation in uninstalling portion 7 is transferred on arrangement platform 3 by it; With control device 9, it controls these parts, to classify from the overall grade by each regulation separately with intrinsic performance data (test result), the mode that chip is transferred to arrangement platform 3 from supply unit 2 is controlled.
Cut-out wafer 21 has been the cut-out wafers after expanding/testing.Metal ring posts adhesive sheet, becomes the state cut-out wafer 21 on the surface of this adhesive sheet being pasted with multiple chip.At cut-out wafer 21, when LED chip, the placement number of the chip on a wafer is about 30000 ~ 120000.
Supply unit 2 is configured to move in X-direction and Y direction, and be configured to can with Qi Tai center for pivot rotates.The movement of the X-direction of supply unit 2 by the rotary actuation of not shown supply unit X-axis motor, be mounted with supply unit 2 X-axis base movement together with carry out.In addition, the movement of the Y direction of supply unit 2, by the rotary actuation of not shown supply unit Y-axis motor, and is mounted with supply unit 2 and carries out together with the movement of the Y-axis base of X-axis base.Further, the spinning movement of supply unit 2 by the rotary actuation of not shown supply unit θ rotation motor, be mounted with supply unit 2, X-axis base carries out together with the rotation of the θ rotation base of Y-axis base.In a word, supply unit 2 is located according to the supply side image information from supply side image processing part 5, successively mobile position of arriving with the hold assembly 41 making next chip of same grade be positioned at carrying arm 4.
Arrangement platform 3 is configured to move in X-direction and Y direction, and be configured to can with Qi Tai center for pivot rotates.The movement of the X-direction of arrangement platform 3 by the rotary actuation of not shown arrangement platform X-axis motor, be mounted with arrangement platform 3 X-axis base X-direction movement together with carry out.In addition, the movement of the Y direction of arrangement platform 3 by the rotary actuation of not shown arrangement platform Y-axis motor, be mounted with arrangement platform 3 and X-axis base thereof Y-axis base Y direction movement together with carry out.Further, the spinning movement of arrangement platform 3 by the rotary actuation of not shown arrangement platform θ rotation motor, be mounted with arrangement platform 3, its X-axis base and Y-axis base thereof θ rotation base rotation together with carry out.In a word, arrangement platform 3 is located according to the arrangement side image information from arrangement side image processing part 6, mobile with the position making next arrangements of chips of same grade be shipped by chip in the hold assembly 41 of carrying arm 4 successively.
At carrying arm 4, be provided with in front end and chip is adsorbed and the hold assembly 41 kept, carrying arm 4 is formed in the mode that can rotate, and rotates and hold assembly 41 can the mode of movement in the vertical direction be formed to make hold assembly 41 between supply unit 2 and arrangement platform 3.The movement of the above-below direction of carrying arm 4, by the rotary actuation of arm Z axis motor, utilizes rack-and-pinion to carry out.In addition, the spinning movement of carrying arm 4, by the rotary actuation of arm θ rotation motor, utilizes gear to carry out.
As shown in Figure 2, control device 9 is made up of computer system, has: can carry out the keyboard of various input instruction and/or the input part 90 of mouse, picture input unit etc.; Initial picture can be shown according to various input instruction in display frame, select the display part 91 of the various image such as guide picture and result picture; As the CPU (central operation processing unit) carrying out classification quantity control optimization calculation process and the control part 92 processed of classifying together with the control of entirety; As the RAM93 of temporary, this temporary when CPU starts as working storage action; As the ROM94 of readable storage medium storing program for executing (memory cell), this readable storage medium storing program for executing stores the control program for making CPU start and uses the various data etc. of this control program, and computer can be utilized to read; With the information for storing the grade in checking with such as light characteristic inspection or electrical characteristics in the mode corresponding with the chip address on wafer, and can with reference to the database 95 completing grade separation of this information, this control device 9 controls as follows: in the mode of carrying out classifying from the overall grade by each regulation separately with intrinsic performance data (test result, the class information corresponding with chip address), chip is transferred to arrangement platform 3 from supply unit 2.In addition, this database 95 and RAM93 and ROM94 are arranged respectively, but database 95 also can in RAM93, can also in ROM94.
Control part 92 has: as the classification quantity control optimization arithmetic element 921 of classification quantity control arithmetic element, it is based on the input instruction from input part 90, the various data that read out to the control program in RAM93 and use this control program in ROM94, carry out dividing distribution sort to pay the computing of quantity as the classification quantity of each grade according to the performance data of chip, the number of chips not producing expenditure is made to compare as the few sheet of the minimum prescribed quantity (, being 1000) of minimum reference number herein; With the taxon 923 as sorting control, it controls sorting chips process according to this classification expenditure quantity calculated.
ROM94 is made up of readable storage medium storing program for executing (memory cell) such as hard disk, CD, disk and IC memories.This control program and use its various data both can be loaded in ROM94 from the CD carried freely, disk and IC memory etc., also can be loaded in ROM94 from the hard disk of computer, can also be loaded in ROM94 under wireless or wired, Internet etc.
Herein, further the classification quantity control optimization calculation process utilizing classification quantity control optimization arithmetic element 921 to carry out computing in advance before being transferred to classification process is described in detail.
In a word, classification quantity control optimization arithmetic element 921 is before sorting control 923 performs classification process, computing about classification quantity is implemented to part or all overall grade by each regulation of the intrinsic performance data (test result, the class information for chip address) of chip.
So-called classification refers to, is picked up by the chip of the same grade from segmentation wafer 21 and is positioned on the grade sheet 31 on arrangement platform 3, be arranged in order by each grade.
So-called grade sheet 31 refers to, by the sheet on the arrangement platform 3 after each grade separation.There is the sheet of the classification quantity of grade.According to device, the grade sheet of preparation can also be loaded.
The so-called database 95 having completed grade separation refers to, comprises the view data (map data) of test data result, as the class information corresponding with chip address, and the data that the classification stored according to the rules obtains after being divided grade.Be divided grade accordingly with chip address and be stored in the database 95 completing grade separation.
So-called batch refers to, the multiple wafer number unit in the process be brought together.Herein, a collection of is 12 (or 25) wafers.
About overall part or all of the intrinsic performance data of chip, classify by each chip level.If considered with endorsement position, then the performance data of a wafer is an overall part, and the collective data of the performance data of a batch (12 wafers) is overall whole.
So-called minimum prescribed quantity is minimum reference quantity, is determined by the necessary least unit of later half assembling.Herein, number of chips is such as 1000.Stock is become when number of chips is below specified quantity.
So-called maximum prescribed quantity is maximum benchmark quantity, is the quantity determined by expenditure space (making the region of the arrangements of chips on grade sheet 31).Herein, number of chips is such as 10000.By the upper limit determining quantity relative to the chip area of loading space and the interval of arrangement.
Automatically pay when reaching maximum prescribed quantity, but last what criticize, and the grade sheet 31 that there is below minimum prescribed quantity in the prior art can not be paid and become the situation of stock.
On grade sheet 31, the chip-count of same grade reaches maximum prescribed quantity (being 10000 herein), or when the expenditure quantity of wafer chip of more than minimum prescribed quantity (being 1000 herein) can be guaranteed, can pay, but on grade sheet, chip-count is less than minimum prescribed quantity, can not pay, become stock.To this, use the sorting chips device 1 of present embodiment 1, the classification quantity of managing chip, makes chip not become stock.Fig. 3 ~ Fig. 5 is used to be described in detail to this further.
Fig. 3 represents the number of chips of each wafer corresponding with grade A ~ I, the number of chips often criticized and the every chart of number of chips of many batches.Fig. 4 is the table representing the number of chips often criticized corresponding with grade A ~ I.
As shown in Figure 3 and Figure 4, about grade A, although pay quantity by wafer units less than chip, but press endorsement position (12 wafers), number of chips is 6000, is 1000 at each grade sheet 31 chip, can pay with 6 grade sheets 31.
In addition, about grade B, pay 10000 chips by endorsement position (12 wafers) at initial grade sheet 31, become 999 chips at second grade sheet 31, this meets the situation that number of chips does not meet 1000 of minimum prescribed quantity, can not pay and become stock.In order to prevent this situation, afterwards the calculation process of the sorting chips device 1 of present embodiment 1 is described.
Further, about grade I, be 300 by endorsement position (12 wafers) number of chips, do not meet 1000 of chip expenditure quantity, by many endorsements position, number of chips is 1300, becomes chip expenditure quantity more than 1000, can pay.
About grade B, the calculation process of the sorting chips device 1 of present embodiment 1 is described.That is, calculate classification expenditure quantity as classification quantity according to the performance data of chip, perform classification expenditure, the grade sheet 31 that the number ratio minimum reference number making not produce expenditure is few.Although illustrating before, before execution classification process, the computing about classification quantity is implemented to overall part or all of the performance data of the chip completed in the database 95 of grade separation.
Specifically, classification quantity control optimization arithmetic element 921 carries out classifying (being 10000) herein to maximum base value (maximum prescribed quantity) from first the grade sheet 31 carrying out classification process, the number of chips be placed on from finally at least two grade sheets 31 is averaged in the mode of remaining all chip-count divided by remaining grade sheet number, the chip-count of the remainder do not eliminated is added in the grade sheet 31 of at least one in remaining grade sheet number.The classification expenditure quantity that taxon 923 obtains based on adding remainder after being averaged to remaining all number of chips, control tactics process.
Or, classification quantity control optimization arithmetic element 921 is carried out all number of chips on all grade sheets 31 of sorting chips process be averaged being placed in the mode of all chip-count of different brackets divided by all grade sheet numbers of different brackets, and the chip-count of the remainder do not eliminated is added at least in any one grade sheet.The classification expenditure quantity that taxon 923 obtains based on adding remainder after being averaged to all number of chips, control tactics process.
Such as, till carrying out being classified to maximum prescribed quantity (being 10000 herein) from first, front grade sheet 31, the number of chips being placed on latter two grade sheet 31 is averaged.In this case, when the number of chips by endorsement position (12 wafers), grade B is 10999, the number of chips that first the grade sheet 31 that be in advance loads is 5500, and the number of chips of loading at second grade sheet 31 is 5499.These two grade sheets 31 all can carry out expenditure process.They with by identical for process average by the gross.
In addition, such as when the number of chips by endorsement position (12 wafers), regulation grade is 20999, the number of chips that first the grade sheet 31 that be in advance loads is 10000, load 5500 at second grade sheet 31, the number of chips of loading at Three Estate sheet 31 is 5499.In the indivisible situation of chip number on each grade sheet 31 of second and the 3rd from finally, the chip number on former successor one grade sheet 31 has more one of remainder or the mode of few loads chip.In a word, in two grade sheets 31 from finally, the number of chips comprising a maximum prescribed quantity (being 10000 herein) is assigned in each grade sheet 31 of two.
Further, such as, till carrying out being classified to maximum prescribed quantity (being 10000 herein) from first, front grade sheet 31, the number of chips be placed on last Three Estate sheet 31 is averaged.In this case, when the number of chips by endorsement position (12 wafers), grade B is 10999, the number of chips that first the grade sheet 31 that be in advance loads is 3667, the number of chips of loading at second grade sheet 31 is 3666, and the number of chips of loading at Three Estate sheet 31 is 3666.This Three Estate sheet 31 all can carry out expenditure process.They with by identical for process average by the gross.
In addition, such as when the number of chips by endorsement position (12 wafers), regulation grade is 20999, the number of chips that first the grade sheet 31 that be in advance loads is 10000,3667 are loaded at second grade sheet 31, the number of chips of loading at Three Estate sheet 31 is 3666, and the number of chips of loading at the 4th grade sheet 31 is 3666.In the indivisible situation of chip number on each grade sheet 31 of second ~ the 4th, the chip number in the past on successor one grade sheet 31 has more one of remainder or the mode of few loads chip.In a word, at Three Estate sheet 31 from finally, the number of chips comprising a maximum prescribed quantity (being 10000 herein) is assigned in each grade sheet 31 of three.
According to said structure, below its action is described.
Fig. 5 is the flow chart of the action of the control part of sorting chips device for illustration of Fig. 1.
As shown in Figure 5, to be stored in the mode corresponding with the chip address on wafer with the information of the grade in such as light characteristic inspection or electrical characteristics inspection and to complete in the database 95 of grade separation.
First, in step S1, classification quantity control optimization arithmetic element 921 carries out classification quantity control optimization calculation process.That is, utilize grader, calculate best classification expenditure number of chips according to the test result in wafer images, make the quantity not producing expenditure be a small amount of sheet, realize the classification expenditure not occurring wasting.In a word, precalculate according to the chip count of same grade and ask for the expenditure quantity of every grade sheet number, making not produce minimum prescribed quantity (being such as 1000 herein) grade sheet 31 below.
Specifically, when the number of chips by endorsement position (12 wafers), grade B is 10999, two grade sheets 31 distribute number of chips, make the number of chips of such as loading at first grade sheet 31 be 5999, the number of chips that second grade sheet 31 loads is 5000.Thus, form the grade sheet 31 that two are expenditure quantity (more than 1000), make the grade sheet 31 not producing below minimum prescribed quantity thus, can make not produce stock.
Then, in step S2, taxon 923 carries out classification process by each grade of light characteristic inspection or electrical characteristics inspection.That is, according to the chip address of each grade of the database 95 of grade separation of having controlled oneself, select the chip of same grade from the cut-out wafer in the donor sheet supply unit 2, be arranged in order and transfer load on the grade sheet 31 on other arrangement platform 3.
Then, expenditure process is carried out in step S3.Namely, on grade sheet 31, chip-count reaches maximum prescribed quantity, or on the previous grade sheet 31 of grade final piece and grade final piece, guarantee the expenditure quantity of the chip of more than minimum prescribed quantity (being 1000 herein), therefore do not become stock, all pay.
Afterwards, judging whether having completed all process in step S4, in step S4, if complete all process (being (YES)), then ending process.In addition, in step S4, if do not complete all process (no (NO)), then return next step S1, be transferred to classification quantity control optimization calculation process next time.
In a word, chip classification method has: classification quantity control operational process, classification quantity control arithmetic element 921 carries out dividing distribution sort to pay the computing of quantity as the classification quantity of each grade according to performance data, the sheet that the number of chips making not produce expenditure is fewer than minimum reference number; With classification operation, taxon 923 controls classification process according to this classification expenditure quantity calculated.
Above, according to the present embodiment 1, have: classification quantity control arithmetic element 921, it carries out dividing distribution sort to pay the computing of quantity as the classification quantity of each grade according to performance data, the sheet that the number of chips making not produce expenditure is fewer than minimum reference number; With taxon 923, it controls classification process according to this classification expenditure quantity calculated.
Thus, before starting to carry out classification process, press different brackets according to the chip count of same grade and calculate expenditure quantity (number of categories is divided by grade sheet), make not produce the grade sheet 31 not meeting minimum prescribed quantity.
Therefore, owing to carrying out control tactics process based on the operation result dividing distribution sort expenditure quantity as the classification quantity of each grade according to performance data, the sheet that the number of chips making to produce expenditure is fewer than minimum reference number, so do not carry out weaving into again of stock, the chip damage produced when weaving into the chip transfer caused again can be prevented.
Further, owing to can prevent continuing to store stock (stock continues to become stock), therefore, it is possible to improve productivity ratio, and stock control expense (number in man-hour) can be cut down.
(execution mode 2)
Fig. 6 is the sorting chips control hardware structure chart of the sorting chips device of embodiments of the present invention 2.In addition, to the component parts playing the action effect identical with the component parts of Fig. 1 with Fig. 2, be described with marking identical Reference numeral.
At Fig. 6, the control device 9A in the sorting chips device 1A of present embodiment 2 is made up of computer system, has: keyboard and/or the input part 90 such as mouse, picture input unit that can carry out various input instruction; Initial picture can be shown according to various input instruction in display frame, select the display part 91 of the various image such as guide picture and result picture; As the CPU (central operation processing unit) of control part 92A carrying out overall control; As the RAM93 of temporary, its when CPU starts as working storage action; As the ROM94 of readable storage medium storing program for executing (memory cell), its various data etc. storing the control program for making CPU start and use this control program, can utilize computer to read; With the information for storing the grade in checking with such as light characteristic inspection or electrical characteristics in the mode corresponding with the chip address on wafer, and can with reference to the database 95 completing classification of this information, and control as follows: from having intrinsic performance data (test result separately, the class information corresponding with chip address) overall (test result information) classify by the grade of each regulation, chip is transferred to arrangement platform 3 from supply unit 2.In addition, this database 95 and RAM93 and ROM94 are arranged respectively, but database 95 also can in RAM93, can also in ROM94.
Control device 92A has: as the classification quantity control optimization arithmetic element 921 of classification quantity control arithmetic element, it is based on the input instruction from input part 90, the various data that read out to the control program in RAM93 and use this control program in ROM94, carry out dividing distribution sort to pay quantity as the computing of the classification quantity of each grade according to the performance data of chip, the sheet that the number of chips making not produce expenditure is fewer than the minimum prescribed quantity (being 1000 herein) as minimum reference number; Device setup unit 922, it prepares for precalculating the quantity of one or more grade sheets 31 of each grade; With the taxon 923 as sorting control, it controls sorting chips process according to this classification expenditure quantity calculated.
According to said structure, below its action is described.
Fig. 7 is the flow chart of the action of the control part 92A of sorting chips device 1A for illustration of Fig. 6.
As shown in Figure 7, to be stored in the mode corresponding with the chip address on wafer with the information of the grade in such as light characteristic inspection or electrical characteristics inspection and to complete in the database 95 of grade separation.
First, in step S11, classification quantity control optimization arithmetic element 921 carries out classification quantity control optimization calculation process.That is, utilize grader, calculate best classification expenditure number of chips according to the test result in wafer images, make the quantity not producing expenditure be a small amount of sheet, realize the classification expenditure not occurring wasting.In a word, precalculate according to the chip count of same grade and ask for the expenditure quantity of each grade sheet 31, to make not produce minimum prescribed quantity (herein for such as 1000) grade sheet 31 below.
Specifically, when the number of chips by endorsement position (12 wafers), grade B is 10999, two grade sheets 31 distribute number of chips, make the number of chips of such as loading at first grade sheet 31 be 5999, the number of chips that second grade sheet 31 loads is 5000.Thus, form the grade sheet 31 that two are expenditure quantity (more than 1000), make the grade sheet 31 not producing below minimum prescribed quantity thus, can make not produce stock.
Then, in step S12, device setup unit 922 carries out device setting process.That is, precalculate and prepare the quantity of the one or more grade sheets 31 required for each grade.
Then, in step S13, taxon 923 carries out classification process by each grade of light characteristic inspection or electrical characteristics inspection.That is, according to the chip address of each grade of the database 95 of grade separation of having controlled oneself, select the chip of same grade from the cut-out wafer in the donor sheet supply unit 2, be arranged in order and transfer load on the grade sheet 31 on other arrangement platform 3.
Then, expenditure process is carried out in step S14.Namely, on grade sheet 31, chip-count reaches maximum prescribed quantity, or on the previous grade sheet 31 of grade final piece and grade final piece, guarantee the expenditure quantity of the chip of more than minimum prescribed quantity (being 1000 herein), therefore do not become stock, all pay.
Afterwards, judging whether having completed all process in step S15, in step S15, if complete all process (YES), then ending process.In addition, in step S15, if do not complete all process (no), then return next step S11, be transferred to classification quantity control optimization calculation process next time.
In a word, chip classification method has: classification quantity control operational process, classification quantity control arithmetic element 921 carries out dividing distribution sort to pay the computing of quantity as the classification quantity of each grade according to performance data, the sheet that the number of chips making not produce expenditure is fewer than minimum reference number; Device setting operation, for making device setup unit 922 according to all number of chips of overall different brackets, precalculates by the quantity of grade sheet required for each grade of process of carrying out classifying, thus the quantity of grade sheet required for preparing; With classification operation, taxon 923 is based on this classification expenditure quantity control tactics process calculated.
As mentioned above, according to the present embodiment 2, owing to carrying out control tactics process based on the operation result dividing distribution sort expenditure quantity as the classification quantity of each grade according to performance data, the sheet that the number of chips making to produce expenditure is fewer than minimum reference number, so do not carry out weaving into again of stock, the chip damage produced when weaving into the chip transfer caused again can be prevented.
Particularly, if do not carry out the preparation of grade sheet 31, then need in the prior art temporarily to stop sorting chips device, after supplementing the grade sheet of not enough grade, sorting chips device is restarted, in present embodiment 2, then there are not these needs.That is, the temporary transient stopping of sorting chips device can be prevented and restart.
As mentioned above, use the preferred embodiment of the present invention 1,2 exemplified with the present invention, but the present invention should not be defined in this execution mode 1,2 ground to make an explanation.The present invention should be understood to only explain its scope according to the scope of claim.Be interpreted as the industry practitioner can from concrete preferred implementation of the present invention 1,2, implement scope of equal value according to record of the present invention and technology general knowledge.The patent quoted in this manual, patent application and document are construed as its content self and quote its content as to the reference of this specification in the same manner as records concrete in this manual.
Utilizability in industry
Wafer to cut off from being mounted with and being pasted in the supply unit of multiple semiconductor chips that adhesive sheet obtains by the present invention, semiconductor chip is transferred to successively the sorting chips device on the arrangement platform of such as different brackets, and use the chip classification method of this sorting chips device, describe and have the control program for making computer perform the processing sequence of each operation of this chip classification method to carry out in the field of the readable storage medium storing program for executing read with the computer that can utilize storing this control program, distribution sort is divided to pay the classification quantity of quantity as each grade according to chip inherent characteristic data, therefore stock is not become, weaving into again of stock can not be carried out as prior art, the chip damage produced when weaving into the chip transfer caused again can be prevented.
Claims (13)
1. a sorting chips device, it is classified from the overall grade by each regulation separately with the intrinsic performance data of chip, and the feature of this sorting chips device is, comprising:
Classification quantity control arithmetic element, it carries out dividing distribution sort to pay the computing of quantity as the classification quantity of each grade according to this performance data, the sheet that the number of chips making not produce expenditure is fewer than minimum reference number; With
Taxon, it carrys out control tactics process according to this classification expenditure quantity calculated.
2. sorting chips device as claimed in claim 1, is characterized in that:
Described classification quantity control arithmetic element before described sorting control performs described classification process, by the grade of each described regulation to the computing of described part or all enforcement totally about described classification quantity.
3. sorting chips device as claimed in claim 2, is characterized in that:
Described classification quantity control arithmetic element is classified described in computing quantity as follows: classify by maximum base value from carrying out first grade sheet of described classification process, the chip-count be placed on from finally at least two grade sheets is averaged divided by remaining grade sheet number by remaining all chip-count, the chip-count of the remainder do not eliminated is added at least in any one grade sheet.
4. sorting chips device as claimed in claim 2, is characterized in that:
Described classification quantity control arithmetic element is classified described in computing quantity as follows: all number of chips that will be placed on the different brackets on all grade sheets carrying out described classification process, be averaged by all chip-count of different brackets all grade sheet numbers divided by different brackets, the chip-count of the remainder do not eliminated added at least in any one grade sheet.
5. sorting chips device as claimed in claim 1, is characterized in that:
Also there is device setup unit, it is for before described classification process, according to all number of chips of described overall different brackets, precalculate the quantity of the grade sheet required for each grade carrying out this classification process, prepare the quantity of this required grade sheet.
6. sorting chips device as claimed in claim 1, is characterized in that:
This semiconductor chip, from the supply unit of the multiple semiconductor chips be mounted with after wafer cut-out, is transferred to the grade sheet on arrangement platform by described classification processing and utilizing carrying arm successively by different regulation grades.
7. a chip classification method, it is classified from the overall grade by each regulation separately with the intrinsic performance data of chip, and the feature of this chip classification method is, comprising:
Classification quantity control operational process, classification quantity control arithmetic element carries out dividing distribution sort to pay the computing of quantity as the classification quantity of each grade according to this performance data, the sheet that the number of chips making not produce expenditure is fewer than minimum reference number; With
Classification operation, taxon carrys out control tactics process according to this classification expenditure quantity calculated.
8. chip classification method as claimed in claim 7, is characterized in that:
Described classification quantity control operational process, before described sorting control performs described classification process, described classification quantity control arithmetic element by the grade of each described regulation to the computing of described part or all enforcement totally about described classification quantity.
9. chip classification method as claimed in claim 8, is characterized in that:
Described classification quantity control operational process is classified described in computing quantity as follows: classify by maximum base value from carrying out first grade sheet of described classification process, the chip-count be placed on from finally at least two grade sheets is averaged divided by remaining grade sheet number by remaining all chip-count, the chip-count of the remainder do not eliminated is added at least in any one grade sheet.
10. chip classification method as claimed in claim 8, is characterized in that:
Described classification quantity control operational process is classified described in computing quantity as follows: all number of chips that will be placed on the different brackets on all grade sheets carrying out described classification process, be averaged by all chip-count of different brackets all grade sheet numbers divided by different brackets, the chip-count of the remainder do not eliminated added at least in any one grade sheet.
11. chip classification method as claimed in claim 7, is characterized in that:
Also there is device setting operation, for before described classification process, device setup unit, according to all number of chips of described overall different brackets, precalculates the quantity of the grade sheet required for each grade carrying out this classification process, prepares the quantity of this required grade sheet.
12. 1 kinds of control programs, is characterized in that:
Describe the program had for making computer enforcement of rights require the processing sequence of each operation of the chip classification method according to any one of 7 ~ 11.
13. 1 kinds of readable storage medium storing program for executing, is characterized in that:
Store control program according to claim 12, computer can be utilized to read.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012-103500 | 2012-04-27 | ||
| JP2012103500 | 2012-04-27 | ||
| PCT/JP2013/001844 WO2013161173A1 (en) | 2012-04-27 | 2013-03-18 | Chip-sorting device and chip-sorting method, control program, readable memory medium |
Publications (2)
| Publication Number | Publication Date |
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| CN104254911A true CN104254911A (en) | 2014-12-31 |
| CN104254911B CN104254911B (en) | 2016-07-06 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201380021965.2A Expired - Fee Related CN104254911B (en) | 2012-04-27 | 2013-03-18 | Sorting chips device and chip classification method |
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| Country | Link |
|---|---|
| JP (1) | JP5941982B2 (en) |
| CN (1) | CN104254911B (en) |
| TW (1) | TWI601224B (en) |
| WO (1) | WO2013161173A1 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109830447A (en) * | 2019-01-17 | 2019-05-31 | 深圳赛意法微电子有限公司 | Semiconductor crystal wafer die grading method, the packaging method of semiconductor product and system |
| CN112612660A (en) * | 2020-12-16 | 2021-04-06 | 海光信息技术股份有限公司 | Specification information database creating method, chip selecting method, device and system |
| CN113387167A (en) * | 2021-06-18 | 2021-09-14 | 上海金东唐科技有限公司 | Laser chip processing method and device and electronic equipment |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6698212B2 (en) * | 2017-03-09 | 2020-05-27 | 株式会社Ｆｕｊｉ | Parts mounting machine |
| JP6698213B2 (en) * | 2017-03-09 | 2020-05-27 | 株式会社Ｆｕｊｉ | Wafer supply device |
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| JP3605009B2 (en) * | 2000-08-03 | 2004-12-22 | 三洋電機株式会社 | Method for manufacturing semiconductor device |
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| TW200848722A (en) * | 2007-06-15 | 2008-12-16 | King Yuan Electronics Co Ltd | Automatic optical inspection device |
| JP4931710B2 (en) * | 2007-06-29 | 2012-05-16 | 株式会社リコー | Non-defective chip classification method on wafer, chip quality determination method using the same, chip classification program, chip quality determination program, marking mechanism, and semiconductor device manufacturing method |
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2013
- 2013-03-18 JP JP2014512314A patent/JP5941982B2/en not_active Expired - Fee Related
- 2013-03-18 WO PCT/JP2013/001844 patent/WO2013161173A1/en active Application Filing
- 2013-03-18 CN CN201380021965.2A patent/CN104254911B/en not_active Expired - Fee Related
- 2013-04-01 TW TW102111743A patent/TWI601224B/en not_active IP Right Cessation
Patent Citations (2)
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| JPH04343485A (en) * | 1991-05-21 | 1992-11-30 | Dowa Mining Co Ltd | Semiconductor pellet sortor |
| JPH0936203A (en) * | 1995-07-20 | 1997-02-07 | Canon Inc | Transfer body device and its control method |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109830447A (en) * | 2019-01-17 | 2019-05-31 | 深圳赛意法微电子有限公司 | Semiconductor crystal wafer die grading method, the packaging method of semiconductor product and system |
| CN109830447B (en) * | 2019-01-17 | 2020-11-27 | 深圳赛意法微电子有限公司 | Semiconductor wafer chip sorting method, semiconductor product packaging method and semiconductor product packaging system |
| CN112612660A (en) * | 2020-12-16 | 2021-04-06 | 海光信息技术股份有限公司 | Specification information database creating method, chip selecting method, device and system |
| CN112612660B (en) * | 2020-12-16 | 2024-02-13 | 海光信息技术股份有限公司 | Specification information database creation method, chip selection method, device and system |
| CN113387167A (en) * | 2021-06-18 | 2021-09-14 | 上海金东唐科技有限公司 | Laser chip processing method and device and electronic equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| JP5941982B2 (en) | 2016-06-29 |
| CN104254911B (en) | 2016-07-06 |
| WO2013161173A1 (en) | 2013-10-31 |
| TW201351539A (en) | 2013-12-16 |
| TWI601224B (en) | 2017-10-01 |
| JPWO2013161173A1 (en) | 2015-12-21 |
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