CN104201213A - Junction barrier schottky diode - Google Patents
Junction barrier schottky diode Download PDFInfo
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- CN104201213A CN104201213A CN201410451733.7A CN201410451733A CN104201213A CN 104201213 A CN104201213 A CN 104201213A CN 201410451733 A CN201410451733 A CN 201410451733A CN 104201213 A CN104201213 A CN 104201213A
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- 230000004888 barrier function Effects 0.000 title claims abstract description 73
- 239000002184 metal Substances 0.000 claims abstract description 53
- 229910052751 metal Inorganic materials 0.000 claims abstract description 53
- 239000000758 substrate Substances 0.000 claims abstract description 30
- 238000000034 method Methods 0.000 claims description 41
- 229910021332 silicide Inorganic materials 0.000 claims description 20
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 20
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 14
- 230000001413 cellular effect Effects 0.000 claims description 11
- 238000001259 photo etching Methods 0.000 claims description 11
- 238000002513 implantation Methods 0.000 claims description 10
- 238000002360 preparation method Methods 0.000 claims description 9
- 230000008569 process Effects 0.000 claims description 9
- 238000005516 engineering process Methods 0.000 claims description 8
- 239000004065 semiconductor Substances 0.000 claims description 8
- 239000000377 silicon dioxide Substances 0.000 claims description 8
- 230000003647 oxidation Effects 0.000 claims description 7
- 238000007254 oxidation reaction Methods 0.000 claims description 7
- 235000012239 silicon dioxide Nutrition 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 239000011521 glass Substances 0.000 claims description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- 229910045601 alloy Inorganic materials 0.000 claims description 4
- 239000000956 alloy Substances 0.000 claims description 4
- 239000002019 doping agent Substances 0.000 claims description 4
- 239000012535 impurity Substances 0.000 claims description 4
- 238000004544 sputter deposition Methods 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 3
- 238000001883 metal evaporation Methods 0.000 claims description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 3
- 229920005591 polysilicon Polymers 0.000 claims description 3
- 239000004642 Polyimide Substances 0.000 claims description 2
- 238000000151 deposition Methods 0.000 claims description 2
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- 238000000206 photolithography Methods 0.000 claims description 2
- 229920001721 polyimide Polymers 0.000 claims description 2
- 238000004151 rapid thermal annealing Methods 0.000 claims description 2
- 239000002210 silicon-based material Substances 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 23
- 229910052710 silicon Inorganic materials 0.000 description 23
- 239000010703 silicon Substances 0.000 description 23
- 230000000694 effects Effects 0.000 description 11
- 229910004298 SiO 2 Inorganic materials 0.000 description 4
- 230000007812 deficiency Effects 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 229910010271 silicon carbide Inorganic materials 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- 238000000407 epitaxy Methods 0.000 description 3
- 238000011160 research Methods 0.000 description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical group [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 230000003321 amplification Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
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- 238000005468 ion implantation Methods 0.000 description 2
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- 238000005259 measurement Methods 0.000 description 2
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- 241001466460 Alveolata Species 0.000 description 1
- 101100256026 Drosophila melanogaster meigo gene Proteins 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
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- 239000011810 insulating material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
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- 238000011084 recovery Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
The invention discloses a junction barrier schottky diode and a production method of the junction barrier schottky diode. The junction barrier schottky diode comprises back metal, a Si substrate, an epitaxial layer, a plurality of concentric p+ rings arranged on the epitaxial layer and doped zones arranged among the p+ rings, a silicification layer arranged on the epitaxial layer, front metal arranged on the silicification layer, a terminal structure arranged on the periphery of an active zone disposed in the epitaxial layer, and a mask layer arranged on the epitaxial layer. The back metal, the Si substrate, the epitaxial layer, the concentric p+ rings, the doped zones, the silicification layer, the terminal structure and the mask layer are arranged in stacks consequentially. The junction barrier schottky diode can reduce the size of devices, improve the effective availability and backward voltage of the devices, reduce the forward voltage and the drain currents of the devices, and make the performance of the devices more stable and reliable.
Description
Technical field
The present invention relates to junction barrier schottky diode (JBS) device that a kind of Schottky diode (SBD) and PiN diode combine.
Background technology
Power rectifier, as basic, a most frequently used and the most indispensable part in power semiconductor system, receives much concern in the important function in the fields such as high voltage direct current transmission, power supply and motor with it.At present, commercial power diode mainly contains PiN diode and the large class of Schottky barrier diode (SBD) two.But its range of application of some drawbacks limit because of PiN diode and SBD diode.The people such as B.J.Baliga have proposed PiN diode and SBD diode junction to be combined in 1984, i.e. junction barrier schottky diode (JBS) has therefore greatly been expanded the application prospect of Schottky barrier diode.
When having chosen the advantage of PiN junction diode and Schottky barrier diode, abandoned by junction barrier schottky (JBS) diode deficiency separately, except thering is high withstand voltage, large electric current, high frequency characteristics is good and the feature such as low conduction voltage drop, also there is low switching losses and anti-overcurrent-overvoltage ability.
The SBD of 20A/600V-1200V based on SiC is for fields such as motor driving, power factor controlling (PFC) and transformer secondary outputs at present.Device research and development based on wide-band gap material emerge in an endless stream especially.Especially the modified model JBS structure of device active region, has easy modulability with its flexible and changeable structure, and is subject to researcher's extensive concern.Since nearly 2 years, relevant JBS structural research is advanced by leaps and bounds especially, and achievement in research is too numerous to enumerate.Lot of experiments achievement has also promoted the commercialization process of JBS rectifying tube greatly, with Cree company, Meigo Sammy Co., Ltd, Infineon company, Diodes company, Renesas Electronics Corporation etc. for representing semiconductor manufacturer of American-European-Japanese developed country, constantly to market, put out a new product, and the scope that the electric current and voltage of its product is contained is wide.And domestic, sky profit semiconductor science and technology (Beijing) Co., Ltd of safe section at the beginning of this year just announces four Realization of Product commercializations of 600V-1200V/10A-50A first, 1700V/10A, and two products of 3300V/5A are in development.
In recent years, the domestic research to junction barrier Schottky diode day by day increases, and equally also has corresponding product to release, but due to some restrictions of Si material, cause the withstand voltage of Si base JBS and open power consumption not as SiC base JBS, so the structure of this respect Si base JBS remains to be further improved.
When applying forward voltage drop on JBS, pn in its device knot is in conducting state, but due to low than pn knot of the cut-in voltage of SBD, so forward current is the route of walking the SBD between knot from Schottky Barrier Contact to pn.So p
+the long-pending size of anchor ring has determined the forward current size of device.
When applying reverse pressure drop on JBS, SBD in device plays a major role, and forms depletion region between pn knot, so Schottky barrier is shielded by the depleted district of impact of applied voltage, thereby effectively suppressed the reduction of Schottky barrier, thereby reverse leakage current is reduced.
In sum, JBS in forward or oppositely time no matter, p
+ring all can produce certain impact to the electric current of device.Therefore optimize the performance of JBS, reply p
+region area analyze.Therefore the present invention is a kind of novel follow-on junction barrier schottky diode, i.e. the junction barrier schottky diode of annular vertical structure (annular longitudinal type JBS).What the present invention adopted is that a plurality of annulars are connected in parallel in the active area of device, increases accordingly the effective area of device, has improved the effective rate of utilization of device area, reduces forward conduction voltage drop and the leakage current of device, and then has improved stability and the reliability of device.
By the paper of the Wang Yifan of Lanzhou University (preparation of the above silica-based novel JBS Schottky diode of 300V. Wang Yifan, imperial court woods, Liu is respectful, He Shaobo. electronic device .2011 the 34th the 6th phase of volume of December) in mention like alveolate texture (as accompanying drawing 1) though junction barrier schottky diode optimized p
+the effective area in district, has also reduced its forward voltage and on state resistance relatively, but compares with structure of the present invention, and the stability of the former device and reliability be structure as proposed by the present invention not obviously; Wang Ying application for a patent for invention " the stacked p of Harbin Engineering University
+-p Junction Barrier Controlled Schottky diode " structure of the Junction Barrier Controlled Schottky diode that proposes of application for a patent for invention (application number 201110129276.6. application publication number CN 102208456 A) is stacked p
+-p district type structure (as accompanying drawing 2), this structure has improved the oppositely withstand voltage of junction barrier schottky diode device, but its preparation technology is comparatively complicated; The application for a patent for invention of the Liu Wei of Suzhou Guineng Semiconductor Technology Co., Ltd. " channel schottky barrier diode rectifying device and manufacture method " (application number 201010208580.5. application publication number CN 101901807 A) has proposed the structure (as accompanying drawing 3) of the Schottky-barrier diode rectifier of plough groove type, this structure has adopted new technology to improve reverse leakage of device etc., also improved the reliability of device, but shortcoming remains some complexity of technique simultaneously.
Summary of the invention
The invention provides a kind of overcome prior art deficiency, can, when reducing its forward voltage, increase the raceway groove effective area of device and improve the effective rate of utilization of device and the improvement junction barrier Schottky diode that improves device creepage.The present invention provides the preparation method of this device simultaneously.
Junction barrier schottky diode of the present invention, its structure is referring to shown in accompanying drawing 5, comprise the back metal 9, Si substrate 1, epitaxial loayer 2, several the concentric p+ annulus 4 on epitaxial loayer and the doped region between it 5 that are cascading, be arranged in disilicide layer 6 on epitaxial loayer, be positioned at front metal 7 on disilicide layer 6, be positioned at the terminal structure of the surrounding of epitaxial loayer active area 10, and be positioned at mask layer 8 on epitaxial loayer.The invention is characterized in by several concentric p
+annulus 4 and between doped region 5, and several JBS cellulars 3 that the silicide on this, front metal or mask layer and the epitaxial loayer under this, substrate and back metal form are formed in parallel.
Junction barrier schottky diode of the present invention, described in it, epitaxial loayer has the doping content of low impurity, and substrate layer has the doping content of high impurity, with one heart p
+annulus (4) district has high dopant.
Junction barrier schottky diode of the present invention, two neighboring concentric p
+between district, according to PN junction principle, form two ever-increasing depletion layers, between depletion layer, form ring-type vertical-channel, and then increased the raceway groove effective area of device.
Junction barrier schottky diode of the present invention, concentric p on epitaxial region
+schottky barrier district on ring district and doped region is that metal silicide is by forming.
Junction barrier schottky diode preparation method of the present invention is:
A., the semiconductor substrate of one silicon materials is provided;
B. on this substrate, form the first mask layer;
C. this substrate is carried out to photoetching process for the first time, form concentric p
+ring window;
D. carry out Implantation, and annealing, and then form concentric p
+loops;
E. on this substrate, form the second mask layer;
F. this substrate is carried out to photoetching process for the second time, corresponding Patten drawing on photolithography plate, on the epitaxial loayer of device, and to depositing metal thereon, then the technique of passing through silicide, is formed to Schottky barrier;
G. its substrate is carried out to photoetching process for the third time, form anode;
I. back metal evaporation is carried out in the bottom of its substrate, form negative electrode.
Method of the present invention, the method that forms the first mask layer is thermal oxidation technology.
Method of the present invention, described concentric p
+the material of the Implantation in ring district is common P type dopant.
In method prepared by the present invention, the first mask layer is SiO
2layer, plays the effect of barrier oxide layer mask.On silicon chip, direct growth is doping block mask layer, and what adopt in the present invention is the method for thermal oxidation, and its thickness is 7000
~ 11000
; The SiO that serves as in the present invention the effect of barrier oxide layer mask
2layer, its thickness requirement is 400
~ 500
; Described field oxide is that its thickness requirement is 4000 as the isolation barrier between transistor
~ 5400
, wherein barrier oxide layer and field oxide etc. belong to the second mask layer.Therefore Thickness Ratio first mask layer of the second mask layer is little.
In preparation method of the present invention, the barrier metal adopting in photoetching is for the second time NiPt alloy (as NiPt10, materials such as NiPt15 or NiPt60).
In method prepared by the present invention, the barrier metal that adopts the method for metal sputtering to form, then the silicide generating by Formation of silicide technique can be respectively and p
+ring, epitaxial loayer form ohmic contact, Schottky contacts.
In method prepared by the present invention, by metal sputtering deposit layer of metal on epitaxial wafer, form front metal, as the anode of device.
In method prepared by the present invention, after Implantation, carry out rapid thermal annealing, these technical measures can be to reduce the damage that silicon chip brings by Implantation, minority carrier lifetime and mobility also can reach certain recovery in varying degrees simultaneously, foreign ion also obtains a certain proportion of electricity and activates, and then reduces leakage current.
By above method, obtain the longitudinal junction barrier schottky diode of a kind of annular (annular is JBS longitudinally) device, the active area of device is to consist of the parallel connection of some JBS cellulars; From cross section, each JBS cellular is positioned at the back metal of described device, and between the front metal of described device; Each cellular yet includes the heavily doped monocrystalline substrate of conducting shell that silicon chip bottom is connected with described back metal, the lightly doped silicon epitaxy layer of conducting shell (2) being connected between silicon chip top and described front metal and silicide, is positioned at the concentric p that the Implantation on silicon chip epitaxial loayer top forms
+ring (4), and be positioned at silicon chip epitaxial loayer top through barrier metal deposit, Formation of silicide and the formed Schottky barrier of corrosion of metals district (6), with as the isolation mask layer (8) of the effect of barrier oxide layer mask, an oxidation and doping barrier effect.
In preparation method of the present invention, its mask layer can be made by insulating material such as silicon dioxide, polysilicon, phosphorosilicate glass, nitrogen silex glass or polyimides, can self-defining according to desired thickness, also can carry out according to general technology.
The material with the substrate zone of conduction type of the present invention is semi-conducting material (as silicon, arsenic, carborundum etc.).The material with the epitaxial region of conduction type is semi-conducting material (as silicon, carborundum etc.), and has certain thickness, and with the Thickness Ratio equally with the substrate zone of conduction type be certain.The method that extension goes out one deck epitaxial loayer on the substrate of device can adopt physical vapor deposition extension, also can adopt the method for molecular beam epitaxy etc.
Be positioned at the Schottky contacts on described epitaxial loayer, with the relative width ratio in a plurality of junction barrier Schottky contacts JBS region that is positioned at the surface, epitaxial region of adjacent described Schottky contacts be certain, by it being analyzed resolve, obtain, to reach required condition, its ratio is about 7 ~ 4.The doping in same JBS region is also to be calculated by required condition, and the order of magnitude of its doping is about 10
13 ~ 16cm
-3, the general longitudinal distributed depth of its doping is about 5 ~ 10um.
Between described metal layer on back and described substrate, form ohmic contact; The silicide that described barrier metal forms and epitaxial loayer form Schottky contacts; Silicide and p that described barrier metal forms
+ring forms ohmic contact.
What as the material of back metal or front metal, adopt is titanium (Ti) tungsten (W) aluminium (Al) alloy or titanium (Ti) nickel (Ni) silver (Ag) alloy.
The present invention's annular longitudinal type junction barrier schottky diode (JBS), the first concentric p of this device
+ring is evenly distributed on silicon chip epitaxial loayer top, just can form, so preparation technology is simple by a photoetching and ion implantation technique; Secondly, the present invention is cross direction profiles longitudinal channel device, in addition, by by measures such as chip design are loop configuration, can reduce like this area of device, improves the effective rate of utilization of device area; Finally, the present invention can increase the raceway groove effective area of device, can more effectively reduce forward voltage like this, has also improved the situations such as leakage current of device simultaneously.Owing to adopting above-mentioned technical measures, device will more be tended towards stability, the reliability of device will be better.Here it is advantage of the present invention place.
Accompanying drawing explanation
Accompanying drawing 1 is the JBS profile that prior art dot matrix distributes;
Accompanying drawing 2 is the stacked p of prior art
+the JBS profile of p structure;
Accompanying drawing 3 is prior art plough groove type JBS profiles;
Accompanying drawing 4 is vertical views of device architecture of the present invention (containing terminal structure but without metal covering), a in figure, in b, the material of concentric ring refers to respectively N-shaped or p-type);
Accompanying drawing 5 is device longitudinal sectional drawings of the present invention;
Accompanying drawing 6 is vertical views of the active area of JBS device of the present invention, a in figure, in b, the material of concentric ring refers to respectively N-shaped or p-type);
Accompanying drawing 7 is JBS structure cell figure of the present invention;
Accompanying drawing 8～Figure 16 is process flow diagram of the present invention;
Accompanying drawing 17 is front plan view of device of the present invention;
Accompanying drawing 18 is JBS diode reverse characteristic curves of the present invention, and during its leakage current 20 μ A, withstand voltage capacity reaches 650V;
Accompanying drawing 19 is JBS diode forward characteristic curves of the present invention, and during forward current 10 A, pressure drop is within 1 V.
In above accompanying drawing, the 3rd, JBS cellular, the 1st, silicon chip substrate, the 2nd, silicon chip epitaxial loayer, the 4th, concentric p
+ring, the 5th, silicon chip epitaxial loayer top except p
+doped region outside ring, the 6th, the silicide that barrier metal forms, the 7th, front metal layer, the 8th, SiO
2mask layer, the 9th, metal layer on back, the 10th, active area, the 11st, cutting ring, the 12nd, field limiting ring, the 13rd, photoresist, the 14th, silicon chip.
Embodiment
The present invention illustrates below in conjunction with drawings and Examples.
The first step: have in the heavily doped monocrystalline substrate 1 of conduction type, the lightly-doped silicon epitaxial loayer 2(that growth has conduction type is equally as Fig. 8);
Second step: at silicon epitaxy layer 2 grown on top one deck block media layers, this layer is silicon dioxide layer (as Fig. 9);
The 3rd step: the silicon dioxide layer that upper one-step growth is gone out carries out photoetching defines p on silicon chip
+ring window, as shown in figure 10;
The 4th step: adopt wet etching or dry etching method, optionally remove silicon dioxide layer not covered by photoresist, manifest the corresponding epitaxial loayer shown in Figure 11, and the silicon dioxide layer staying serves as mask effect;
The 5th step: by the mode of Implantation, to the ion that injects p-type material in previous step etching window out, as shown in figure 12.Through the mode of short annealing, eliminate the lattice damage causing in ion implantation process again, avoid the increase of defect center and the increase of leakage current, as shown in figure 13;
The 6th step: photoetching for the second time forms Schottky contact barrier window, so that next step barrier metal sputter, as shown in figure 14;
The 7th step: sputter barrier metal in the window forming in the 6th step, generate front metal layer 7, anode as device, after silicide heat treatment, form again good Schottky barrier, simultaneously by unreacted completely barrier metal remove, and the silicide that Formation of silicide technique generates can be respectively and p
+ring, epitaxial loayer form ohmic contact or Schottky contacts, as shown in figure 15; The 8th step: anti-carve after front metal sputter, form fairlead, finally obtain structure (note: do not express fairlead structure in Figure 16) as shown in figure 16;
The 9th step: back metal evaporation forms cathodic metal and good ohmic contact, carries out subsequently thinning back side, as shown in Figure 5.
Through above-mentioned steps, finally prepare vertical structure that section shows as Fig. 5 and as shown in Figure 4 by the several concentric P of being separated by with epitaxial loayer each other
+jBS cellular (3) structure that annulus (4) forms.In actual application, concentric ring of the present invention can be made p-type, also can make N-shaped material.Fig. 7 is the schematic diagram of JBS cellular.Fig. 8 refers to the generalized section of device, and has indicated the explanation of various piece.
In the implementation case, adopted Si epitaxial wafer, the concentric p of the ring spacings such as the ring widthes such as 6um, 36um
+ring, the float terminal structure of field limiting ring of 5 roads, makes the oppositely junction barrier schottky diode of the withstand voltage 600V of reaching.This example has been realized when reducing the forward voltage of JBS device, improves the effective area utilance of device, can improve too its reverse leakage and reliability.The actual measurement I-V characteristic of this embodiment below.
Under ultra-clean chamber room temperature (22 ℃), by Tektronix 576 Curve Tracer test JBS diode breakdown characteristics as shown in figure 18, the JBS diode reverse characteristic of its actual measurement is that withstand voltage capacity reaches 650V when leakage current 20 μ A.
As can be seen from Figure 18, device is when reverse leakage current is not more than 20 μ A, and withstand voltage capacity has reached 650V, and has harder breakdown characteristics.When leakage current is very little, have the phenomenon of the even two bar curves of larger fluctuation, this is because added scanning voltage is the sinusoidal wave stagnant phenomenon of returning that causes device.
JBS diode forward characteristic curve of the present invention is shown in accompanying drawing 19, and from Figure 19, JBS diode forward characteristic of the present invention is: when forward current 10 A, pressure drop is within 1 V.From Figure 19, be also shown in, device threshold voltage of the present invention is in 0.3V left and right.On-state voltage drop amplification diminishes greatly gradually along with electric current becomes, and shows that device is after forward conduction, becomes large, simultaneously P along with electric current increases on-state voltage drop
+injection few sub mudulation effect in district's is more remarkable, and drift zone resistance reduces gradually, and negative feedback reduces on-state voltage drop amplification, when forward current reaches 10A (33.3/cm
2) time, conduction voltage drop deficiency 1V.
In the above-mentioned preparation method of the present invention, the first mask layer is SiO
2layer, it plays the effect of barrier oxide layer mask.Certain SiO
2also can make an oxidation and doping barrier effect, can use in the present invention.On silicon chip, direct growth is doping block mask layer, and what adopt in the present invention is the method for thermal oxidation, and its thickness is 7000
~ 11000
; The SiO that serves as in the present invention the effect of barrier oxide layer mask
2layer, its thickness requirement is 400
~ 500
; Described field oxide is that its thickness requirement is 4000 as the isolation barrier between transistor
~ 5400
, wherein barrier oxide layer and field oxide etc. belong to the second mask layer.Therefore Thickness Ratio first mask layer of the second mask layer is little.
By above method, obtain the longitudinal junction barrier schottky diode of a kind of annular (annular is JBS longitudinally) device, the active area of device is to consist of the parallel connection of some JBS cellulars; From cross section, each JBS cellular is positioned at the back metal of described device, and between the front metal of described device; Each cellular yet includes the heavily doped monocrystalline substrate of conducting shell that silicon chip bottom is connected with described back metal, the lightly doped silicon epitaxy layer of conducting shell (2) being connected between silicon chip top and described front metal and silicide, is positioned at the concentric p that the Implantation on silicon chip epitaxial loayer top forms
+ring (4), and be positioned at silicon chip epitaxial loayer top through barrier metal deposit, Formation of silicide and the formed Schottky barrier of corrosion of metals district (6), with as the isolation mask layer (8) of the effect of barrier oxide layer mask, an oxidation and doping barrier effect.
In the present invention, the needed condition of a series of technique of carrying out on the epitaxial loayer of described JBS device is adjustable, to reach reached required condition, such as the material as device mask layer or barrier layer can be silicon dioxide, also can be phosphorosilicate glass, polysilicon etc.The present invention only changes and has optimized structure in the active area of JBS device, terminal structure for the part as device, do not make specified otherwise, so so long as can be conducive to the terminal structure of the characteristics such as device is forward and reverse all applicable equally for the device of structure of the present invention.
In sum, the invention provides a kind of overcome prior art deficiency, when reducing its forward voltage, increase the raceway groove effective area of device and improve the area effective rate of utilization of device and improve the leakage current of device and then improve the improvement junction barrier Schottky diode of stability and the reliability of device.
Claims (11)
1. a junction barrier schottky diode, comprise the back metal (9) that is cascading, Si substrate (1), epitaxial loayer (2), in the doped region (5) between Hep+ district, epitaxial loayer Shang p+ district, be arranged in disilicide layer (6) on epitaxial loayer, be positioned at front metal (7) on disilicide layer (6), be positioned at the terminal structure of epitaxial loayer active area (10) surrounding, and be positioned at mask layer on epitaxial loayer (8), it is characterized in that doped region (5) between Hep+ district, p+ district is by several concentric p
+annulus (4) and between doped region (5), and several JBS cellulars (3) that the silicide on this, front metal or mask layer and the epitaxial loayer under this, substrate and back metal form are formed in parallel.
2. junction barrier schottky diode according to claim 1, is characterized in that described in it epitaxial loayer has the doping content of low impurity, and substrate layer has the doping content of high impurity, with one heart p
+annulus (4) region has high dopant.
3. junction barrier schottky diode according to claim 1 and 2, is characterized in that concentric p on epitaxial region
+schottky barrier district on ring district (4) and doped region (5) is formed by metal silicide.
4. junction barrier schottky diode preparation method claimed in claim 1, is characterized in that:
A., the semiconductor substrate of one silicon materials is provided;
B. on this substrate, form the first mask layer;
C. this substrate is carried out to photoetching process for the first time, form concentric p
+ring window;
D. carry out Implantation, and annealing, and then form concentric p
+loops;
E. on this substrate, form the second mask layer;
F. this substrate is carried out to photoetching process for the second time, corresponding Patten drawing on photolithography plate, on the epitaxial loayer of device, and to depositing metal thereon, then the technique of passing through silicide, is formed to Schottky barrier;
G. its substrate is carried out to photoetching process for the third time, form anode;
H. back metal evaporation is carried out in the bottom of its substrate, form negative electrode.
5. method according to claim 4, the method that it is characterized in that forming the first mask layer is thermal oxidation technology.
6. method according to claim 5, is characterized in that described concentric p
+the material of the Implantation in ring district is common P type dopant.
7. according to the method for claim 6, it is characterized in that carrying out rapid thermal annealing after Implantation.
8. method according to claim 7, is characterized in that mask layer can be the materials such as silicon dioxide, polysilicon, phosphorosilicate glass, nitrogen silex glass or polyimides.
9. according to the method described in claim 4 or 5 or 6 or 7 or 8, it is characterized in that the barrier metal adopting in photoetching is for the second time NiPt alloy.
10. according to the method for claim 9, it is characterized in that the metal sputtering method that barrier metal adopts forms, then the silicide generating by Formation of silicide technique can be respectively and p
+ring, epitaxial loayer form ohmic contact or Schottky contacts.
11. according to the method for claim 10, it is characterized in that front metal deposit is to form by metal sputtering.
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|---|---|---|---|
| CN201410451733.7A CN104201213A (en) | 2014-09-08 | 2014-09-08 | Junction barrier schottky diode |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110176501A (en) * | 2019-05-30 | 2019-08-27 | 深圳市美浦森半导体有限公司 | A kind of preparation method of MPS structure process silicon carbide diode |
| CN112289867A (en) * | 2020-10-29 | 2021-01-29 | 扬州国宇电子有限公司 | High-power high-voltage Schottky barrier diode |
| CN116454138A (en) * | 2023-06-15 | 2023-07-18 | 西安电子科技大学 | Silicon carbide floating junction diode with columnar P channel and preparation method |
-
2014
- 2014-09-08 CN CN201410451733.7A patent/CN104201213A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110176501A (en) * | 2019-05-30 | 2019-08-27 | 深圳市美浦森半导体有限公司 | A kind of preparation method of MPS structure process silicon carbide diode |
| CN112289867A (en) * | 2020-10-29 | 2021-01-29 | 扬州国宇电子有限公司 | High-power high-voltage Schottky barrier diode |
| CN116454138A (en) * | 2023-06-15 | 2023-07-18 | 西安电子科技大学 | Silicon carbide floating junction diode with columnar P channel and preparation method |
| CN116454138B (en) * | 2023-06-15 | 2023-09-08 | 西安电子科技大学 | Silicon carbide floating junction diode with columnar P channel and preparation method |
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Application publication date: 20141210 |