CN104134703A - Low-electric-leakage and low-forward-voltage-drop Schottky diode structure and manufacturing method of low-electric-leakage and low-forward-voltage-drop Schottky diode structure - Google Patents
Low-electric-leakage and low-forward-voltage-drop Schottky diode structure and manufacturing method of low-electric-leakage and low-forward-voltage-drop Schottky diode structure Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title abstract description 11
- 230000004888 barrier function Effects 0.000 claims abstract description 36
- 238000002347 injection Methods 0.000 claims abstract description 9
- 239000007924 injection Substances 0.000 claims abstract description 9
- 230000000694 effects Effects 0.000 claims abstract description 7
- 239000002184 metal Substances 0.000 claims description 20
- 238000002360 preparation method Methods 0.000 claims description 9
- 238000001259 photo etching Methods 0.000 claims description 8
- 239000012535 impurity Substances 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 239000002019 doping agent Substances 0.000 claims description 5
- 238000002513 implantation Methods 0.000 claims description 5
- 229910052698 phosphorus Inorganic materials 0.000 claims description 5
- 238000005036 potential barrier Methods 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 4
- 238000000465 moulding Methods 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 8
- 230000015556 catabolic process Effects 0.000 abstract description 2
- 238000005516 engineering process Methods 0.000 abstract description 2
- 238000006386 neutralization reaction Methods 0.000 abstract 1
- 230000005684 electric field Effects 0.000 description 5
- 239000000463 material Substances 0.000 description 3
- 229910021332 silicide Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- VLJQDHDVZJXNQL-UHFFFAOYSA-N 4-methyl-n-(oxomethylidene)benzenesulfonamide Chemical compound CC1=CC=C(S(=O)(=O)N=C=O)C=C1 VLJQDHDVZJXNQL-UHFFFAOYSA-N 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910021359 Chromium(II) silicide Inorganic materials 0.000 description 1
- -1 NiSiX Inorganic materials 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910021340 platinum monosilicide Inorganic materials 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
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- H01—ELECTRIC ELEMENTS
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
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- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
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Abstract
The invention mainly aims at providing a low-electric-leakage and low-forward-voltage-drop Schottky diode structure and a manufacturing method of the low-electric-leakage and low-forward-voltage-drop Schottky diode structure. The manufacturing method is characterized in that a terminal is protected with the junction termination extension technology, neutralization modulation is carried out on Schottky main junction depletion regions at the same time, injections of the two terms are carried out at the same time, the breakdown voltage is improved, the good low-electric-leakage effect can be achieved, and the process manufacturing procedure is simple. After the low-electric-leakage and low-forward-voltage-drop Schottky diode structure and the manufacturing method are applied, a low-electrical-resistivity epitaxial wafer can be adopted for manufacturing a Schottky diode, the forward voltage drop is effectively reduced, the high-voltage effect is achieved, and the low-electric-leakage and low-forward-voltage-drop effect is improved. By means of the low-electric-leakage and low-forward-voltage-drop Schottky diode structure and the manufacturing method, the efficient Schottky barrier diode can be obtained; compared with a traditional diode structure, the application scope of the diode is wide.
Description
Technical field
The invention belongs to the technical field of diode and preparation thereof, particularly relate to Schottky diode of a kind of low electric leakage low forward voltage drop type and preparation method thereof.
Background technology
Schottky barrier diode (Schottky Barrier Diode, SBD) is widely used in DC-to-DC converter (DC-DC converter), voltage regulator (Voltage Regulator Module VRM), telecommunication transmission/server (Telecom/Server), AC power source adapter (Adaptor) and charger (Charger) etc.In all these application, Schottky barrier diode need to guarantee certain puncture voltage and low forward voltage drop and low reverse current leakage, to guarantee low power consumption.
But the electrical quantity of above-mentioned device, forward voltage drop and reverse leakage current need a compromise to choose, because must cause the increase of reverse leakage when reducing forward voltage drop, reverse voltage reduces; When improving reverse voltage, also must cause the increase of forward voltage drop.That is to say, in on-state performance and closed condition performance, can not accomplish to take into account comprehensively.
In all these manufacture processes, Schottky barrier diode reaches reverse cut-off by barrier metal layer, because the degree of depth of barrier layer only has nanoscale, the surface field at edge is large, is difficult to the voltage that reaches high, in order to form high oppositely withstand voltage (more than 40V), all to reach by diffused guard ring, be equivalent to, at the other PN junction diode in parallel of Schottky diode, during forward conduction, by Schottky diode, carry out current flowing, guarantee low conduct positive pressure drop; While oppositely ending, by PN junction, ended.
The sectional view of typical power schottky barrier diode is as shown in Figure of description 1, the thin epitaxy layer of the medium-doped of growing on heavily doped silicon concentration, on epitaxial loayer, depositing metal forms Schottky barrier, the size of reverse blocking voltage capability is subject to the restriction of the puncture voltage height of barrier junction, puncture voltage height is determined by resistivity of material under ideal conditions, in fact the factor that affects puncture voltage is mainly determined by the Electric Field Distribution at cellular edge, the design of optimised devices blocking ability is exactly the influencing factor reducing puncture voltage, make the puncture voltage of device approach the capability of material as far as possible.Terminal moulding is in order to eliminate PN junction edge because of the concentrated impact on puncture voltage of electric field.
In order to overcome edge effect, improve oppositely withstand voltagely, can adopt Metal field plate or/and diffusing protection ring structure or table top cut-off type structure, the voltage that way is usually less than 200V for the such product of Schottky diode so also can reach certain effect.According to semiconductor Schottky theory, the electric field maximum point at the edge of the Schottky diode chip that non-flanged is special formed is place, angle, and the maximum field ratio formula of its electric field and planar junction is:
ECyl/EPP=rd/2rj (wherein rd is depletion region radius, and rj is barrier region thickness)
And barrier region thickness only has nanoscale, with respect to the micron order of depletion region radius, there is the relation of hundred times, cause electric field strength very large at surface region, puncture voltage maximum, also with regard to 25V, can not be satisfied the demand.Add diffused guard ring that breakdown point is guided to PN junction place, by increasing PN junction degree of depth rj, improved voltage capability.
Though but the guard ring of diffusion can improve the voltage of schottky junction, because PN junction need spread certain degree of depth, thickness that must epitaxial loayer relatively will be thickeied.
According to Schottky theory, during forward conduction, the forward voltage drop of power schottky is:
V
F=Ф
B+KT/q*Ln(J
F/AT
2)+J
F(ρ
e*d
e+ρ
s*d
S)
Wherein: Ф
bfor barrier height, J
ffor forward conduction electric current, ρ
e, d
ebe respectively epilayer resistance rate and thickness, ρ
s, d
sbe respectively resistance substrate rate and thickness, conventionally can ignore.
From above formula, the thickness d of forward voltage drop and epitaxial loayer
ethere is substantial connection, increase epitaxy layer thickness and can cause schottky junction forward voltage drop to improve.
Meanwhile, the scheme that diffused guard ring adds field plate also can only reach planar junction 80% voltage, if adopt the technical matters complexity of table top to improve.
And for Schottky barrier district, the height of potential barrier is on the impact of forward voltage drop and reverse leakage current to large, and barrier height is except the metal with selected is directly related, also has very large associated with the concentration of selected epitaxial wafer.Concentration height barrier height reduces, and vice versa.In the process of manufacturing due to the general thermal oxidation mode oxide layer of growing that adopts, and oxide layer has the boron of suction row phosphorus characteristic, for n type material, cause the concentration of superficial layer to improve, as shown in Figure 2, can make barrier height reduce, leakage current increases, therefore to select epitaxial wafer or the high barrier metal that resistivity is high, cause again forward voltage drop to increase.What we needed is to reduce reverse leakage current, does not increase the product of forward voltage drop, needs the epitaxial wafer of high metal potential barrier and low-resistivity to manufacture.
Summary of the invention
Main purpose of the present invention is for providing Schottky barrier diode structure of the low electric leakage of a kind of novel high-pressure low forward voltage drop and preparation method thereof, the method comprises: take N or P type semiconductor as substrate, form N-or P-epitaxial loayer in the above, on epitaxial loayer, form barrier layer, form again metal anode, edge moulding is provided with the knot terminal extension of concentration gradient, injects low dose of P or N-type impurity and improves surperficial resistivity, to reach the effect that improves barrier height in active area.
Conventionally the way of plane Schottky diode is: high-temperature oxydation-photoetching 1-corrosion protection ring SiO2-B Implanted-knot oxidation-photoetching 2---corrode contact hole---formation potential barrier silicide---evaporates top electrode metal---metal lithographic 3-back metal, Schottky barrier diode of the present invention, principal character is, during photoetching 1, by active area in reticle and terminal protection district being designed to the light leak district (as shown in Figure 3) of different spacing area, B Implanted and knot after corrosion SiO2, both formed the guard ring of knot termination extension (JTE) structure, in surfaces of active regions, form resistive formation again.As shown in Figure 4.In this example, be all that to take N+/N type epitaxial silicon chip be example, the dopant type of injecting as P+/P type epitaxial silicon chip on the contrary.
The guard ring of knot termination extension (JTE) structure is by inject one deck p type impurity layer at silicon chip surface, the electric charge that utilizes selectivity to increase in knot carries out impurity complementation, adjust ion implantation dosage and can accurately control the electric charge in p type island region, when can keeping having an even surface, than table top terminal, realize knot edge charges and better control and better uniformity, be conducive to like this manufacture a plurality of small size power devices on monolithic; With the mode comparison of diffused guard ring, voltage significantly improves, and as diffused guard ring mode voltage can only reach below 80% of planar junction, and JTE mode can reach the more than 90% of planar junction.
It is the depletion layer due to its formation that JTE mode can improve voltage, and the key of control is the control of the electric charge of the passivation layers such as the accuracy of dosage of Implantation and oxidation, controls difficulty very large, and the dosage of injection will be lower than 1E13cm
-2, to guarantee not form inversion layer.The method that the present invention designs employing gradual change injection window forms depth-graded dosage, at JTE position, is divided into a plurality of regions, and less the closer to the window at edge, spacing is larger, but will guarantee to inject after knot, and knot expansion will connect together.
Active area compensates N-type extension by injecting p type impurity, make surperficial concentration lower than bulk concentration, as shown in Figure 2, surface concentration reduces the height that can improve Schottky barrier, reduce reverse leakage current, and the concentration of epitaxial wafer can suitably improve, can reduce series resistance, reduce forward voltage drop, do not increase again leakage current, reach low pressure drop object.But the impurity injecting can not form P type layer, otherwise has formed PN junction.In design, the present invention adopts the concurrently injected method in HeJTE district, simplifies processing procedure, and the unit are that active area is injected will be lower than the minimum area in JTE district.The area of capable of regulating window and spacing, adjust the concentration of compensation, reaches different barrier heights, but guarantee to inject after knot, and knot expansion will connect together.
The preparation method of Schottky barrier diode of the present invention, its step comprises :-injection-knot-photoetching 2(active area schottky junction HeJTE district, N+/N-type epitaxial wafer-life long field oxide SiO2--photoetching 1(active area)) – sputter barrier metal--Formation of silicide--front anode electrode metal-photoetching 3(corroding metal)-back metal
The structure of this diode is: take high concentration semiconductor as substrate; form low concentration epitaxial layer in the above; then the mode of injecting by photoetching forms the active area of knot termination extension (JTE) guard ring and high resistant simultaneously, then in active area, forms metal potential barrier silicide, finally forms positive back metal.Metal silicide, as barrier layer, can be the metal silicides such as CrSi2, NiSiX, PtSi, and anode is metal material, single or multiple lift metal.
For gradual change JTE district, can be divided into a plurality of regions, glazed area also can have multiple variation, but will guarantee that the unit's of keeping to the side glazed area progressively diminishes, and unit's glazed area in active area is less than JTE district, and implantation dosage is less than 1E13cm
-2, to guarantee not form inversion layer, dosage will be higher than 1E11cm simultaneously
-2, to guarantee to form surface depletion layer, reduce surface field, improve voltage.
Schottky barrier diode of the present invention, is characterized in that, described edge is shaped to concentration gradient slow change type terminal, and the injection of active area is to make by a reticle with the injection of terminal..
Another feature of the present invention is, reticle is in the transparent area of termination environment design different size and spacing, larger the closer to the transparent area of active area; The unit transparent area area of active area, lower than the unit glazed area of the Minimum Area of termination environment, guarantee that, after implanted dopant, termination environment forms depletion layer, and active area still belongs to former dopant type, just improves the resistivity of active area.
Another feature of the present invention is, implantation dosage is lower than 1E13cm
-2, to guarantee not form inversion layer, dosage will be higher than 1E11cm simultaneously
-2, to guarantee to form surface depletion layer, reduce surface field, improve voltage.
The Schottky diode comparison of making by Schottky diode and the general diffused guard ring method of this scheme, oppositely cut-ff voltage can improve more than 8%, and leakage current can reduce more than 30%.
Beneficial effect
(1) preparation method of the present invention is simple, processing ease, and cost is low;
(2) preparation method of the present invention can significantly reduce reverse leakage current, reduces forward voltage drop, improves reverse cut-ff voltage, effectively improves electrical equipment efficiency.
Accompanying drawing explanation
The general Schottky diode generalized section of Fig. 1.
Fig. 2 active area CONCENTRATION DISTRIBUTION schematic diagram.
Reticle schematic diagram of Fig. 3.
Fig. 4 generalized section of the present invention.
Embodiment
Below by specific embodiment, the invention will be further described, but embodiment does not limit the scope of the invention.
Embodiment
In this example, JTE is distinguished into three regions, and the first next-door neighbour active area, district is 100% transparent area (i.e. full injection), and Second Region is 75% transparent area, and San district is 50% transparent area, and every sector width is 10um, and transparent area spacing is 1um, and active area is 10% transparent area.Epitaxial wafer is N+/N type, and N-type resistivity is 0.6 Ω .cm, thickness 4um, implantation dosage 3E12/cm
2, knot temperature is 950 ℃, 60min, and barrier metal is Cr, chip area is 1mm
2.
Result: reverse voltage is the conventional 48V of being of 56V(), the conventional 35uA of reverse leakage current 12uA(), forward voltage drop 0.45V (conventional 0.5V).
Certainly, those of ordinary skill in the art will be appreciated that, above embodiment is only for the present invention is described, and not as limitation of the invention, as long as within the scope of connotation of the present invention, the variation of the above embodiment, distortion all will be dropped in the scope of the claims in the present invention book.
Claims (5)
1. a Schottky barrier diode, its structure comprises: take N or P type semiconductor as substrate, form N-or P-epitaxial loayer in the above, on epitaxial loayer, form barrier layer, form metal anode, edge moulding is provided with the knot terminal extension of concentration gradient again, injects low dose of P or N-type impurity and improve surperficial resistivity in active area, to reach the effect that improves barrier height, two knots complete with in a reticle.
2. Schottky barrier diode according to claim 1, is characterized in that, described edge is shaped to concentration gradient slow change type terminal, and the injection of active area is to make by a reticle with the injection of terminal.
3. Schottky barrier diode according to claim 1, is characterized in that, reticle is in the transparent area of termination environment design different size and spacing, larger the closer to the transparent area of active area; The unit transparent area area of active area, lower than the unit glazed area of the Minimum Area of termination environment, guarantee that, after implanted dopant, termination environment forms depletion layer, and active area still belongs to former dopant type, just improves the resistivity of active area.
4. a preparation method for Schottky barrier diode, its step comprises: at silicon epitaxial wafer, first form oxide layer, photoetching injection and silicon chip opposite types impurity, then form metal potential barrier and upper and lower electrode metal.
5. the preparation method of Schottky barrier diode according to claim 4, is characterized in that, implantation dosage is lower than 1E13cm
-2, to guarantee not form inversion layer, dosage will be higher than 1E11cm simultaneously
-2, to guarantee to form surface depletion layer, reduce surface field, improve voltage.
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Cited By (5)
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CN106992117A (en) * | 2017-03-30 | 2017-07-28 | 北京燕东微电子有限公司 | A kind of preparation method of SiC junction barrel Schottky diode |
CN107026216A (en) * | 2015-09-24 | 2017-08-08 | 拉碧斯半导体株式会社 | The manufacture method of semiconductor device and semiconductor device |
CN107123669A (en) * | 2017-06-28 | 2017-09-01 | 电子科技大学 | A kind of silicon carbide power device terminal structure |
CN109560142A (en) * | 2018-10-29 | 2019-04-02 | 厦门市三安集成电路有限公司 | Novel silicon carbide junction barrier schottky diode and preparation method thereof |
CN112310227A (en) * | 2019-07-30 | 2021-02-02 | 株洲中车时代半导体有限公司 | High-potential-barrier SiC JBS device and preparation method thereof |
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WO2013179729A1 (en) * | 2012-05-31 | 2013-12-05 | 富士電機株式会社 | Silicon-carbide semiconductor device, and method for producing silicon-carbide semiconductor device |
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