CN101789400A - Semiconductor rectifying device and manufacturing method thereof - Google Patents

Semiconductor rectifying device and manufacturing method thereof Download PDF

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Publication number
CN101789400A
CN101789400A CN201010112084A CN201010112084A CN101789400A CN 101789400 A CN101789400 A CN 101789400A CN 201010112084 A CN201010112084 A CN 201010112084A CN 201010112084 A CN201010112084 A CN 201010112084A CN 101789400 A CN101789400 A CN 101789400A
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China
Prior art keywords
interarea
conduction type
gate oxide
impurity
tagma
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CN201010112084A
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Chinese (zh)
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毛振东
周名辉
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SUZHOU GUINENG SEMICONDUCTOR TECHNOLOGY Co Ltd
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SUZHOU GUINENG SEMICONDUCTOR TECHNOLOGY Co Ltd
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Priority to CN201010112084A priority Critical patent/CN101789400A/en
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Abstract

The invention discloses a semiconductor rectifying device and a manufacturing method thereof. The device is composed of an equivalent diode and a vertical MOS tube which are connected in parallel and comprises the following components: a) a semiconductor substrate with two relative major surfaces, which belongs to a first conduction type; wherein a first major surface is N-epitaxial layer and a second major surface is N+silicon base; b) a protective ring which is located on the first major surface for defining an active region, the protective ring is doped by a second conduction type; c) a gate oxide layer arranged below a polysilicon gate electrode; d) a second conduction type tagma is formed all round the gate oxide layer and on the epitaxial layer, a horizontal expansion region is arranged below the gate oxide layer, the horizontal expansion region serves as a channel region: e) an ohmic contact region of the second conduction type is formed on the surface of the tagma; in the invention, the problem that the existing technology is complex and reliability of device is poor is solved and a semiconductor rectifying device and a manufacturing method thereof featuring simple technology and high reliability are realized.

Description

A kind of manufacture method of semiconductor rectifier device and obtained device
Technical field
The present invention relates to a kind of manufacture method and structure of semiconductor rectifier device, be specifically related to a kind of manufacture method and structure of power semiconductor rectifying device of the MOS of having structure.
Background technology
Schottky diode is a kind of majority carrier device work that utilizes the contact berrier between metal and the semiconductor to carry out work, and it is low that it has a conduction voltage drop, characteristics such as the fast and unilateal conduction of turn-off speed.But, must form Schottky contact barrier earlier in order to make Schottky diode; It is anode that the formation of Schottky barrier must be adopted precious metal (gold, silver, platinum, molybdenum, nickel etc.), and N type silicon chip is a negative electrode, realizes its unilateal conduction characteristic by the barrier height difference between metal and the silicon chip.But this manufacture method need be used precious metal, can not with the CMOS process compatible of routine, and the technology cost is very high.The Schottky diode rectifier is because the existence of barrier metal has very high reverse leakage current, unstable properties under the high temperature in addition; And because the restriction of metal barrier height, be difficult to the puncture voltage of accomplishing that 200V is above, limited its application in a lot of occasions.
Though and stable performance under the conventional PN junction diode condition of high temperature, and can reach very high puncture voltage, but it has the injection effect of few son when forward conduction, few son can not disappear immediately when oppositely turn-offing, must at first extract few son out carries out compound, this needs a period of time, causes that switching speed is slow, power consumption is high, especially can't use in the high frequency occasion in a lot of occasions.And the fast recovery diode that uses for head it off present stage is in order to reduce reverse recovery time, need increase the complex centre or use complicated technological process to realize by doped precious metal, these manufacture method complex process and cost costliness, and fast recovery diode has the characteristic of hard recovery when oppositely recovering, need increase other components and parts and eliminate the clutter influence in application circuit, cost increases.Realize the application of diode rectifier so press for a kind of comprehensively technology of three's advantage in every field.China granted patent CN1201387C discloses a kind of vertical semiconductor rectifying device, it has used a large amount of paralleling MOS FET unit, and use the upper surface metal level to make grid and drain short circuit, the low conduction voltage drop Vf passage of the upper surface electrode of this MOSFET to lower surface electrode so just is provided.But this device needs behind intact polysilicon of etching and grid oxygen exposed surface to be carried out N type foreign ion injects formation source/drain contact district; and require this implantation concentration to be less than the implantation concentration of guard ring; and follow-up need are by p type impurity ion injection formation tagma; this need accurately control N type impurity and p type impurity concentration and the degree of depth with regard to needs; be that p type impurity concentration is too dense; it is very big that cut-in voltage will become; this has just lost the advantage of this device; N type impurity concentration is too light; just can't form good Ohmic contact; but N type impurity is too dense; behind follow-up rapid thermal annealing; can form one deck N type impurity layer at the tagma upper surface, form the NPN audion of base open circuit, make the reverse breakdown voltage step-down.Therefore, adopt two kinds of these region dopings of dopant type ion pair, be unfavorable for that technology realizes, both need the energy and the dosage of N type and p type impurity injection are carried out accurate Calculation and control, increased processing step again, and there is unsettled risk in device performance.
Summary of the invention
The invention provides the manufacture method and the obtained device of a kind of technology and semiconductor rectifier device simple in structure, that reliability is high, the technical problem that solve is to overcome existing technology to implement complexity, and the problem of the poor reliability of device.
For achieving the above object, the technical solution used in the present invention is:
A kind of manufacture method of semiconductor rectifier device may further comprise the steps:
A) provide the Semiconductor substrate with two relative interareas of first conduction type;
B) optionally with the zone in first interarea of the described Semiconductor substrate of doping impurity of second conduction type, be surrounded with the guard ring in source region with formation;
C) form gate oxide at the described first interarea upper surface;
D) on described gate oxide, form polysilicon layer;
E) mask film covering layer optionally is with the polysilicon layer and the gate oxide in etched portions zone;
F) rely on described mask layer to form ohmic contact regions with shallow doping first interarea of impurity of second conduction type;
G) rely on described mask layer to form the tagma, again this mask layer is removed with dark first interarea that mixes of the impurity of second conduction type;
H) in adjoining described tagma and being positioned under the gate oxide, form the horizontal expansion of second conduction type district in tagma;
J) at the first interarea surface deposition top electrode metal level;
K) in the second interarea surface deposition bottom electrode metal level.
The related content of above-mentioned manufacture method is explained as follows:
1, in the such scheme, described step b) further comprises:
A) form field oxide on first interarea surface of described Semiconductor substrate;
B) optionally cover described field oxide, with the field oxide in etched portions zone;
C) with described field oxide as mask layer, inject first interarea with the impurity of second conduction type, carry out the thermal diffusion process of impurity then, form the guard ring that is surrounded with the source region;
D) field oxide of removal active area.
2, in the such scheme, behind the removal field oxide, comprise that also the dark injection of first conductive type impurity is mixed;
3, the horizontal expansion district in the such scheme, described step h) realizes by rapid thermal annealing.
4, in the such scheme, described polysilicon layer is the polysilicon layer of the doping impurity of first conduction type, and its doping way can be in-situ doped or ion implantation doping.
A kind of semiconductor rectifier device according to above-mentioned manufacture method gained comprises:
A) Semiconductor substrate with two relative interareas of first conduction type, first interarea is the N-epitaxial loayer, second interarea is the N+ silicon substrate;
B) be positioned at the guard ring that is used to define active area on first interarea, this guard ring is mixed by second conductive type impurity;
C) be formed to insulation a plurality of polygate electrodes of active area on the described epitaxial loayer;
D) be positioned at gate oxide under the described polygate electrodes;
E) form the second conduction type tagma around gate oxide on described epitaxial loayer, have the horizontal expansion district in tagma under the gate oxide, this horizontal expansion district is as channel region;
F) form the ohmic contact regions of second conduction type at described tagma upper surface;
G) be positioned at the bottom electrode metal level on the second interarea surface of Semiconductor substrate;
H) the top electrode metal level of connection polygate electrodes, ohmic contact regions, guard ring.
Above-mentioned top electrode metal level and bottom electrode metal level can be Al or Ti or Ni or Ag or their mixture.
Because the technique scheme utilization, the present invention compared with prior art has following advantage and effect:
1, to use single impurity be the dopant of p type impurity as the ohmic contact of diode rectifier in the present invention, optimized source/drain contact district, implement simplyr on technology, avoided the generation of the audion of base open circuit fully, the reliability of device is higher.
2, the present invention uses the drain electrode of top electrode metal level as MOSFET, and for the unlatching of channel region with exhaust corresponding electron source is provided, its technology realizes simpler.
3, the present invention has save as channel region and has injected needed step, and this injection can replace by the concentration and the gate oxide thickness in tagma, regulates the forward conduction voltage drop and the leakage current of semiconductor rectifier device, has save the cost of manufacture of device.
4, the present invention carries out the dark injection doping of N type ion after field oxide is removed, and helps to reduce the drift zone resistance of device series connection, greatly reduces the forward conduction voltage drop of diode.
Description of drawings
Accompanying drawing 1-9 is that the technology of embodiment of the invention semiconductor rectifier device is made schematic flow sheet.
In the above accompanying drawing: 10, second interarea; 20, first interarea; 30, field oxide; 31, mask layer; 32, guard ring; 40, gate oxide; 50, polysilicon layer; 51, ohmic contact regions; 52, tagma; 53, channel region; 54, polysilicon gate; 60, top electrode metal level; 61, bottom electrode metal level.
Embodiment
Below in conjunction with drawings and Examples the present invention is further described:
Embodiment: a kind of manufacture method of semiconductor rectifier device and obtained device
Shown in accompanying drawing 1-9, a kind of manufacture method of semiconductor rectifier device, process is as follows:
A) provide the Semiconductor substrate with two relative interareas of N type doping impurity, this Semiconductor substrate is by forming as N+ second interarea 10 of silicon substrate with as N-first interarea 20 of epitaxial loayer;
B) form field oxide 30 on first interarea surface of described Semiconductor substrate;
C) use photoresistance 31, optionally cover described field oxide 30, with the field oxide in etched portions zone;
D) remove photoresist layer 31, as mask layer, injecting N-first interarea with the impurity of P type is epitaxial loayer 20, carries out the thermal diffusion process of impurity then, forms the guard ring 32 that is surrounded with the source region with described field oxide 30 or photoresistance;
E) field oxide of removal active area.
F) macro-energy is injected N type foreign ion;
G) the active area upper surface that is epitaxial loayer 20 at described first interarea forms gate oxide 40;
H) form polysilicon layer 50 on described gate oxide 40, this polysilicon layer 50 is the polysilicon layer 50 of the doping impurity of N type, and its doping way can be in-situ doped or ion implantation doping.
J) mask film covering layer 31 optionally, this mask layer is a photoresistance 31, with the gate oxide 40 and the polysilicon layer 50 in etched portions zone;
K) relying on described photo-resistive mask layer 31 is that epitaxial loayer 20 forms ohmic contact regions 51 with the shallow injection of p type impurity first interarea that mixes;
L) relying on described mask layer to inject first interarea that mixes deeply with p type impurity is that epitaxial loayer 20 forms tagma 52, this mask layer is removed again;
M) in adjoining described tagma 52 and being positioned at gate oxide 40 times, by the rapid thermal annealing activator impurity, thus the horizontal expansion of the p type impurity district 53 in formation tagma 52;
N) be epi-layer surface deposit top electrode metal level 60 at first interarea;
O) in the second interarea surface deposition bottom electrode metal level 61.
A kind of semiconductor rectifier device according to above-mentioned manufacture method gained as shown in Figure 9, comprising:
A) Semiconductor substrate with two relative interareas of N type, first interarea are that N-epitaxial loayer 20, the second interareas are N+ silicon substrate 10;
B) be positioned at the guard ring 32 that is used to define active area on first interarea, this guard ring is mixed by p type impurity;
C) be formed to insulation a plurality of polysilicon gates 54 electrodes of active area on the described N-epitaxial loayer;
D) be positioned at gate oxide 40 under described polysilicon gate 54 electrodes;
E) form the tagma 52 of P-type conduction type around the gate oxide on described epitaxial loayer, gate oxide has the horizontal expansion district in tagma 52 for 40 times, and this horizontal expansion district is as channel region 53;
F) form the ohmic contact regions 51 of P-type conduction type at described tagma 52 upper surfaces;
G) second interarea that is positioned at Semiconductor substrate is the bottom electrode metal level 61 on N+ silicon substrate 10 surfaces, and this bottom electrode metal level 61 can be Al or Ti or Ni or Ag or their mixture.;
H) the top electrode metal level 60 of connection polysilicon gate 54 electrodes, ohmic contact regions 51, guard ring 32, this top electrode metal level 60 can be Al or Ti or Ni or Ag or their mixture.。
The foregoing description only is explanation technical conceive of the present invention and characteristics, and its purpose is to allow the personage who is familiar with this technology can understand content of the present invention and enforcement according to this, can not limit protection scope of the present invention with this.All equivalences that spirit is done according to the present invention change or modify, and all should be encompassed within protection scope of the present invention.

Claims (7)

1. the manufacture method of a semiconductor rectifier device may further comprise the steps:
A) provide the Semiconductor substrate with two relative interareas of first conduction type;
B) optionally with the zone in first interarea of the described Semiconductor substrate of doping impurity of second conduction type, be surrounded with the guard ring in source region with formation;
C) upper surface at described first interarea forms gate oxide;
D) on described gate oxide, form polysilicon layer;
E) mask film covering layer optionally is with the polysilicon layer and the gate oxide in etched portions zone;
F) rely on described mask layer to form ohmic contact regions with shallow doping first interarea of impurity of second conduction type;
G) rely on described mask layer to form the tagma, again this mask layer is removed with dark first interarea that mixes of the impurity of second conduction type;
H) in adjoining described tagma and being positioned under the gate oxide, form the horizontal expansion of second conduction type district in tagma;
J) at the first interarea surface deposition top electrode metal level;
K) in the second interarea surface deposition bottom electrode metal level.
2. manufacture method according to claim 1 is characterized in that: described step b) further comprises:
A) form field oxide on first interarea surface of described Semiconductor substrate;
B) optionally cover described field oxide, with the field oxide in etched portions zone;
C) with described field oxide as mask layer, inject first interarea with the impurity of second conduction type, carry out the thermal diffusion process of impurity then, form the guard ring that is surrounded with the source region;
D) field oxide of removal active area.
3. manufacture method according to claim 2, its feature also be, behind the field oxide in described etched portions zone, also includes the ion that the silicon face that is exposed is carried out first conductive type impurity and inject deeply.
4. manufacture method according to claim 1 is characterized in that: the horizontal expansion district described step h) activates realization by the mode of rapid thermal annealing (RTA).
5. manufacture method according to claim 1 is characterized in that: described polysilicon layer is the polysilicon layer of the doping impurity of first conduction type, and its doping way can be in-situ doped or ion implantation doping.
6. the semiconductor rectifier device of a manufacture method gained according to claim 1 is characterized in that: comprising: a) Semiconductor substrate with two relative interareas of first conduction type, and first interarea is the N-epitaxial loayer, second interarea is the N+ silicon substrate;
B) be positioned at the guard ring that is used to define active area on first interarea, this guard ring is mixed by second conductive type impurity;
C) be formed to insulation a plurality of polygate electrodes of active area on the described epitaxial loayer;
D) be positioned at gate oxide under the described polygate electrodes;
E) form the second conduction type tagma around gate oxide on described epitaxial loayer, have the horizontal expansion district in tagma under the gate oxide, this horizontal expansion district is as channel region;
F) form the ohmic contact regions of second conduction type at described tagma upper surface;
G) be positioned at the bottom electrode metal level on the second interarea surface of Semiconductor substrate;
H) the top electrode metal level of connection polygate electrodes, ohmic contact regions, guard ring.
7. manufacture method according to claim 5 is characterized in that: described top electrode metal level and bottom electrode metal level can be Al or Ti or Ni or Ag or their mixture.
CN201010112084A 2010-02-12 2010-02-12 Semiconductor rectifying device and manufacturing method thereof Pending CN101789400A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104183485A (en) * 2013-05-23 2014-12-03 上海宝芯源功率半导体有限公司 Super barrier rectifier structure and manufacturing method thereof
CN104518006A (en) * 2014-07-01 2015-04-15 重庆中科渝芯电子有限公司 Depletion channel super-barrier rectifier and manufacturing method thereof
CN107204336A (en) * 2016-03-16 2017-09-26 重庆中科渝芯电子有限公司 A kind of high efficiency rectifier and its manufacture method
CN109148605A (en) * 2017-06-19 2019-01-04 宁波比亚迪半导体有限公司 Fast recovery diode and preparation method, electronic equipment

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104183485A (en) * 2013-05-23 2014-12-03 上海宝芯源功率半导体有限公司 Super barrier rectifier structure and manufacturing method thereof
CN104183485B (en) * 2013-05-23 2017-11-10 上海宝芯源功率半导体有限公司 A kind of super barrier rectifier structure and preparation method thereof
CN104518006A (en) * 2014-07-01 2015-04-15 重庆中科渝芯电子有限公司 Depletion channel super-barrier rectifier and manufacturing method thereof
CN104518006B (en) * 2014-07-01 2017-03-15 重庆中科渝芯电子有限公司 A kind of deplection type channel super barrier rectifier and its manufacture method
CN107204336A (en) * 2016-03-16 2017-09-26 重庆中科渝芯电子有限公司 A kind of high efficiency rectifier and its manufacture method
CN107204336B (en) * 2016-03-16 2023-10-20 重庆中科渝芯电子有限公司 High-efficiency rectifier and manufacturing method thereof
CN109148605A (en) * 2017-06-19 2019-01-04 宁波比亚迪半导体有限公司 Fast recovery diode and preparation method, electronic equipment
CN109148605B (en) * 2017-06-19 2022-02-18 比亚迪半导体股份有限公司 Fast recovery diode, preparation method and electronic equipment

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Open date: 20100728