CN104009118A - Method for preparing efficient N-type crystalline silicon grooving buried contact battery - Google Patents
Method for preparing efficient N-type crystalline silicon grooving buried contact battery Download PDFInfo
- Publication number
- CN104009118A CN104009118A CN201410217901.6A CN201410217901A CN104009118A CN 104009118 A CN104009118 A CN 104009118A CN 201410217901 A CN201410217901 A CN 201410217901A CN 104009118 A CN104009118 A CN 104009118A
- Authority
- CN
- China
- Prior art keywords
- silicon
- silicon nitride
- battery
- type crystalline
- concentration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910021419 crystalline silicon Inorganic materials 0.000 title claims abstract description 28
- 238000000034 method Methods 0.000 title claims abstract description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 42
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 42
- 239000010703 silicon Substances 0.000 claims abstract description 42
- 238000000137 annealing Methods 0.000 claims abstract description 36
- 239000000758 substrate Substances 0.000 claims abstract description 31
- 238000005516 engineering process Methods 0.000 claims abstract description 27
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 14
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 14
- 239000011574 phosphorus Substances 0.000 claims abstract description 14
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 10
- 229910052796 boron Inorganic materials 0.000 claims abstract description 10
- 238000007641 inkjet printing Methods 0.000 claims abstract description 9
- 238000004140 cleaning Methods 0.000 claims abstract description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 60
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 48
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 45
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 44
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 44
- 239000002131 composite material Substances 0.000 claims description 26
- 239000012528 membrane Substances 0.000 claims description 26
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 24
- 239000000377 silicon dioxide Substances 0.000 claims description 24
- 238000002360 preparation method Methods 0.000 claims description 21
- 238000005520 cutting process Methods 0.000 claims description 20
- 238000009792 diffusion process Methods 0.000 claims description 18
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 18
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 16
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 16
- 238000005530 etching Methods 0.000 claims description 16
- 238000002513 implantation Methods 0.000 claims description 16
- 229910017604 nitric acid Inorganic materials 0.000 claims description 16
- 238000007639 printing Methods 0.000 claims description 16
- 239000007921 spray Substances 0.000 claims description 16
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 12
- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 claims description 11
- 239000005297 pyrex Substances 0.000 claims description 11
- 239000002002 slurry Substances 0.000 claims description 10
- 239000004411 aluminium Substances 0.000 claims description 8
- 229910052782 aluminium Inorganic materials 0.000 claims description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 8
- 230000007797 corrosion Effects 0.000 claims description 8
- 238000005260 corrosion Methods 0.000 claims description 8
- 239000012535 impurity Substances 0.000 claims description 8
- 238000005245 sintering Methods 0.000 claims description 8
- 238000005507 spraying Methods 0.000 claims description 8
- 239000000126 substance Substances 0.000 claims description 8
- 239000013078 crystal Substances 0.000 claims description 7
- 230000008021 deposition Effects 0.000 claims description 7
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 229910052760 oxygen Inorganic materials 0.000 claims description 5
- 239000001301 oxygen Substances 0.000 claims description 5
- 235000008216 herbs Nutrition 0.000 claims description 4
- 238000010884 ion-beam technique Methods 0.000 claims description 4
- 210000002268 wool Anatomy 0.000 claims description 4
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- GNFTZDOKVXKIBK-UHFFFAOYSA-N 3-(2-methoxyethoxy)benzohydrazide Chemical compound COCCOC1=CC=CC(C(=O)NN)=C1 GNFTZDOKVXKIBK-UHFFFAOYSA-N 0.000 claims description 2
- 229910017083 AlN Inorganic materials 0.000 claims description 2
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 claims description 2
- FGUUSXIOTUKUDN-IBGZPJMESA-N C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 Chemical compound C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 FGUUSXIOTUKUDN-IBGZPJMESA-N 0.000 claims description 2
- 239000010408 film Substances 0.000 claims description 2
- 230000003647 oxidation Effects 0.000 claims description 2
- 238000007254 oxidation reaction Methods 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 229910052751 metal Inorganic materials 0.000 abstract description 4
- 239000002184 metal Substances 0.000 abstract description 4
- 239000000463 material Substances 0.000 abstract description 3
- 239000005388 borosilicate glass Substances 0.000 abstract 1
- 238000002347 injection Methods 0.000 abstract 1
- 239000007924 injection Substances 0.000 abstract 1
- 238000005468 ion implantation Methods 0.000 abstract 1
- 230000003287 optical effect Effects 0.000 abstract 1
- 238000007747 plating Methods 0.000 description 6
- 230000007812 deficiency Effects 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a method for preparing an efficient N-type crystalline silicon grooving buried contact battery. According to the technological process, the method includes the steps that grooves are formed in the two faces of monocrystal silicon through lasers, texturing and cleaning operation is conducted, boron is diffused on the front surface of an N-type silicon substrate, a selective emitter is formed, back junctions, edge junctions and borosilicate glass are removed, ion implantation of phosphorus is achieved, annealing is conducted, the two faces are plated with films, and electrodes of the battery are prepared. According to the method for preparing the efficient N-type crystalline silicon grooving buried contact battery, the front light receiving area is increased, the contact resistance between metal and a material is reduced, the grooving buried contact injection technology and the ink-jet printing technology are adopted in the back face, back light absorbed and used by the battery is effectively increased, the technologies are combined, so that optical and electrical losses of the two surfaces are effectively reduced, meanwhile, the compatibility of the method with a current enterprise production line is high, and equipment investment is fully reduced.
Description
Technical field
The present invention relates to solar cell and manufacture field, specifically grooving and grid burying technology and the double-side cell technology of the positive low surface concentration of a kind of N-type crystal silicon solar energy battery.
Background technology
Modernization solar cell industryization is produced towards high efficiency, low cost future development, and front selective emitter junction adds grooving and grid burying technology and combines as the representative of high efficiency, low cost developing direction with double-side cell technology, it is advantageous that:
(1) to have metal grid lines shading-area little for this technology of grooving and grid burying, and high current is collected area;
(2) selective emitter junction technology has reduced the contact resistance of metal grid lines and silicon substrate material effectively, and the absorption of the light area (non-metallic region) of having improved battery to short-wave band light;
(3) double-side cell not only can utilize the sunlight of positive incident can also utilize the scattered light at the back side etc., has improved the energy output of battery.And this kind of battery be more suitable for architecture-integral, and the application such as at right angle setting;
(4) use N-type crystalline silicon to do substrate, there is higher minority carrier life time, can reduce photo-generated carrier compound in solar battery surface and body, be therefore particularly suitable for making efficient double-side cell.
The present invention is based on grooving and grid burying technology, selective emitter junction technology, inkjet technology and N-type double-side cell technology, proposed the high-efficiency crystal silicon method for manufacturing solar battery in conjunction with three kinds of technology.
Summary of the invention
Goal of the invention: in order to solve the deficiencies in the prior art, the present invention is directed to the shortage that low cost can volume production grooving and grid burying adds the crystal silicon solar batteries preparation method that selective emitter junction is combined with double-side cell technology, proposed a kind of preparation method of high-efficiency N-type crystalline silicon grooving and grid burying battery.
Technical scheme: the preparation method of a kind of N-type crystalline silicon grooving and grid burying battery of the present invention, concrete steps comprise:
(a): monocrystalline silicon two sides lbg
Selecting resistivity is the N-type silicon chip of 0.3 cm ~ 2 cm, be 0.05uJ ~ 0.8uJ in the pulse energy of laser, frequency is under the condition of 50KHz ~ 5000KHz, adopt ns laser slotting according to electrode pattern in substrate both sides, groove width is 5um ~ 50um, dark is 5um ~ 100um, and distance between centers of tracks is 0.5mm ~ 1.5mm;
(b): making herbs into wool to its cleaning
The sodium hydroxide solution that is 0.5% ~ 2% by concentration carries out chemical corrosion to n type single crystal silicon surface in the time of 75 DEG C ~ 80 DEG C, prepare leg-of-mutton light trapping structure matte, then the hydrochloric acid that is 10% ~ 12% by concentration and concentration are after 8% ~ 10% hydrofluoric acid mixes, matte to be cleaned, and remove surface impurity;
(c): the front surface at N-type silicon substrate carries out boron diffusion
In temperature is the diffusion furnace of 600-1000 DEG C, adopt BBr
3carry out boron diffusion, the diffusingsurface sheet resistance that makes N-type crystalline silicon is 20-90ohm/sq, forms PN junction; Or first in the cutting face B Implanted source of N-type crystal, be that 15keV, Implantation amount are 15 × 7cm at ion beam energy
-2after, then anneal in temperature is the annealing furnace of 800 DEG C ~ 1000 DEG C, the N-type crystalline silicon sheet resistance after annealing is 20-90ohm/sq, forms PN junction;
(d): selective emitter forms and go back of the body knot, limit knot and Pyrex
Spraying width with shower nozzle at fluting position is 5 μ m ~ 70 μ m masks, again in the equipment of one side etching, the hydrofluoric acid that is 8% ~ 10% by concentration and concentration are after 35% ~ 40% nitric acid mixes, the back side of etching silicon wafer and side at normal temperatures, then the hydrofluoric acid that is 7% ~ 12% by concentration and concentration are after 35% ~ 40% nitric acid mixes, in the time that temperature is 2 DEG C ~ 10 DEG C, the cutting face of silicon chip is corroded, making without the sheet resistance of mask regions is 70-150ohm/sq, then remove mask and surperficial Pyrex, finally dry again;
(e): back side Implantation phosphorus annealing
At the back side of N-type silicon substrate Implantation phosphorus and carry out annealing in process, annealing temperature is 600 DEG C-800 DEG C, forms N
+layer, the sheet resistance scope after annealing is 20-80ohm/sq;
(f) double-sided coating
Prepare aluminium oxide and silicon nitride or silica and silicon nitride or aluminium oxide, silica and silicon nitride composite membrane that thickness is 50nm ~ 100nm in the front of substrate, plate overleaf silicon nitride film or silica and silicon nitride composite membrane that thickness is 50nm ~ 100nm,
(g) prepare the electrode of battery
Adopting inkjet technology is 1-100um at fluting place, the front of battery spray printing thickness, width is the positive pole that the silver-colored aluminium paste of 5-60um forms battery, fluting place, back side spray printing thickness is 1-100um, width is the negative pole that the 17F of the Du Pont slurry of 5-60um or the 18A of Du Pont slurry form battery, in temperature is the sintering furnace of 400 DEG C ~ 800 DEG C, carries out common burning.
Front and back to monocrystalline silicon in step a is slotted respectively.
Front diffusion to monocrystalline silicon in step c, forms PN junction,
The width of the mask described in steps d is more than or equal to the width of PN junction one side groove.
In step e to the back side of monocrystalline silicon NN processed
+height knot.
Aluminium oxide described in step f and silicon nitride composite membrane are on the basis of pellumina, grow one deck silicon nitride film formation aluminium oxide and silicon nitride composite membrane; Silica and silicon nitride composite membrane are on the basis of silicon oxide film, grow one deck silicon nitride film formation silica and silicon nitride composite membrane; Aluminium oxide, silica and silicon nitride composite membrane are one deck silicon oxide film of growing on the basis of pellumina, and then on the basis of silicon oxide film, the grow formation of one deck silicon nitride film aluminium oxide, silica and silicon nitride composite membrane, the preparation method of described aluminium nitride film is PCVD or atomic deposition; The preparation method of described silicon oxide film is any one in PCVD, TCA oxidation and wet oxygen; The preparation method of described silicon nitride film is PCVD or atomic deposition.
The width of the pattern that step g China and Mexico print is consistent with cutting width, and the thickness of the pattern of inkjet printing is more than or equal to the degree of depth of institute's cutting.
Beneficial effect: compared with prior art, the preparation method of a kind of high-efficiency N-type crystalline silicon grooving and grid burying battery of the present invention is by adopting grooving and grid burying to add selective emitter junction and inkjet technology in front, when improving front light-receiving area, reduce the contact resistance of metal and material, the back side still adopts grooving and grid burying to penetrate and inkjet technology, effectively increase battery absorbing back side light, these technology combine prior art exist the caducous deficiency of electrode, two surperficial optics and electricity loss are effectively reduced, simultaneously, high with current enterprise production line compatibility, fully reduce equipment investment.
Embodiment
The preparation method of a kind of high-efficiency N-type crystalline silicon grooving and grid burying battery that the present invention proposes, the step of its technological process comprises: monocrystalline silicon two sides lbg, making herbs into wool to its cleaning, front surface at N-type silicon substrate carries out boron diffusion, selective emitter forms and goes back of the body knot, limit knot and Pyrex, Implantation phosphorus annealing, double-sided coating and the electrode of preparing battery.
embodiment 1
Selecting resistivity is the N-type silicon chip of 0.3 cm, is 0.05uJ in the pulse energy of laser, under the condition that frequency is 50KHz, adopts ns laser slotting in substrate both sides, and groove width is 5um, is 10um deeply, and distance between centers of tracks is 0.5mm;
The sodium hydroxide solution that is 0.5% by concentration carries out chemical corrosion to n type single crystal silicon surface in the time of 75 DEG C, prepare leg-of-mutton light trapping structure matte, then the hydrochloric acid that is 10% by concentration and concentration are after 8% hydrofluoric acid mixes, matte to be cleaned, and remove surface impurity;
In temperature is the diffusion furnace of 600 DEG C, adopt BBr
3carry out phosphorus diffusion, the diffusingsurface sheet resistance that makes N-type crystalline silicon is 20ohm/sq, forms PN junction;
Spraying width with shower nozzle at fluting position is 6 μ m masks, the width of described mask is greater than the width of PN junction one side groove, again in the equipment of one side etching, the hydrofluoric acid that is 8% by concentration and concentration are after 35% nitric acid mixes, the back side of etching silicon wafer and side at normal temperatures, then the hydrofluoric acid that is 7% by concentration and concentration are after 35% nitric acid mixes, in the time that temperature is 2 DEG C, the cutting face of silicon chip is corroded, making without the sheet resistance of mask regions is 70ohm/sq, then remove mask and surperficial Pyrex, finally dry again;
At the back side of N-type silicon substrate Implantation phosphorus and carry out annealing in process, annealing temperature is 600 DEG C, forms N
+layer, the sheet resistance after annealing is 20ohm/sq;
Adopt the method for PCVD to prepare aluminium oxide and the silicon nitride composite membrane that thickness is 50nm in the front of substrate, the silicon oxide film that back side plating thickness is 50nm;
Adopting inkjet technology is 1um at fluting place, the front of battery spray printing thickness, width is the positive pole that the silver-colored aluminium paste of 5um forms battery, fluting place, back side spray printing thickness is 1um, width is the negative pole that the 17F of 5um Du Pont slurry forms battery, the pattern of inkjet printing and cutting pattern match, then, in being the sintering furnace of 400 DEG C, temperature carries out common burning.
embodiment 2
Selecting resistivity is the N-type silicon chip of 0.4 cm, is 0.1uJ in the pulse energy of laser, under the condition that frequency is 100KHz, adopts ns laser slotting in substrate both sides, and groove width is 10um, is 20um deeply, and distance between centers of tracks is 0.6mm;
The sodium hydroxide solution that is 0.51% by concentration carries out chemical corrosion to n type single crystal silicon surface in the time of 76 DEG C, prepare leg-of-mutton light trapping structure matte, then the hydrochloric acid that is 10.5 by concentration and concentration are after 8.5% hydrofluoric acid mixes, matte to be cleaned, and remove surface impurity;
In temperature is the diffusion furnace of 700 DEG C, adopt BBr
3carry out boron diffusion, the diffusingsurface sheet resistance that makes N-type crystalline silicon is 30ohm/sq, forms PN junction;
Spraying width with shower nozzle at fluting position is 11 μ m masks, the width of described mask equals the width of PN junction one side groove, again in the equipment of one side etching, the hydrofluoric acid that is 8.5% by concentration and concentration are after 36% nitric acid mixes, the back side of etching silicon wafer and side at normal temperatures, then the hydrofluoric acid that is 7.5% by concentration and concentration are after 36% nitric acid mixes, in the time that temperature is 3 DEG C, the cutting face of silicon chip is corroded, making without the sheet resistance of mask regions is 80ohm/sq, then remove mask and surperficial Pyrex, finally dry again;
At the back side of N-type silicon substrate Implantation phosphorus and carry out annealing in process, annealing temperature is 650 DEG C, forms N
+layer, the sheet resistance after annealing is 30ohm/sq;
Adopt the method for PCVD to prepare silica and the silicon nitride composite membrane that thickness is 60nm in the front of substrate, silica and silicon nitride composite membrane that back side plating thickness is 60nm.
Adopting inkjet technology is 10um at fluting place, the front of battery spray printing thickness, width is the positive pole that the silver-colored aluminium paste of 20um forms battery, fluting place, back side spray printing thickness is 20um, width is the negative pole that the 18A of 20um Du Pont slurry forms battery, the pattern of inkjet printing and cutting pattern match, then, in being the sintering furnace of 500 DEG C, temperature carries out common burning.
embodiment 3
Selecting resistivity is the N-type silicon chip of 0.4 cm, is 0.12uJ in the pulse energy of laser, under the condition that frequency is 2000KHz, adopts ns laser slotting in substrate both sides, and groove width is 20um, is 20um deeply, and distance between centers of tracks is 0.9mm;
The sodium hydroxide solution that is 0.53% by concentration carries out chemical corrosion to n type single crystal silicon surface in the time of 770 DEG C, prepare leg-of-mutton light trapping structure matte, then the hydrochloric acid that is 11% by concentration and concentration are after 9% hydrofluoric acid mixes, matte to be cleaned, and remove surface impurity;
, in the cutting face B Implanted source of N-type crystal, be first that 15keV, Implantation amount are 105cm at ion beam energy
-2after, then anneal in temperature is the annealing furnace of 800 DEG C, the N-type crystalline silicon sheet resistance after annealing is 20ohm/sq, forms PN junction;
Spraying width with shower nozzle at fluting position is 30 μ m masks, the width of described mask is greater than the width of PN junction one side groove, again in the equipment of one side etching, the hydrofluoric acid that is 8.9% by concentration and concentration are after 35.6% nitric acid mixes, the back side of etching silicon wafer and side at normal temperatures, then the hydrofluoric acid that is 9% by concentration and concentration are after 39% nitric acid mixes, in the time that temperature is 4 DEG C, the cutting face of silicon chip is corroded, making without the sheet resistance of mask regions is 90ohm/sq, then remove mask and surperficial Pyrex, finally dry again;
At the back side of N-type silicon substrate Implantation phosphorus and carry out annealing in process, annealing temperature is 700 DEG C, forms N
+layer, the sheet resistance scope after annealing is 40ohm/sq;
The mode cvd silicon oxide film of using wet oxygen at the front surface of substrate, then obtains at the surface deposition silicon nitride of silica aluminium oxide and the silicon nitride composite membrane that thickness is 50nm, the silicon nitride film that back side plating thickness is 50nm;
Adopting inkjet technology is 40um at fluting place, the front of battery spray printing thickness, width is the positive pole that the silver-colored aluminium paste of 20um forms battery, fluting place, back side spray printing thickness is 40um, width is the negative pole that the 17F of 20um Du Pont slurry forms battery, the pattern of inkjet printing and cutting pattern match, then, in being the sintering furnace of 630 DEG C, temperature carries out common burning.
embodiment 4
Selecting resistivity is the N-type silicon chip of 0.9 cm, is 0.3uJ in the pulse energy of laser, under the condition that frequency is 2300KHz, adopts ns laser slotting in substrate both sides, and groove width is 30um, is 40um deeply, and distance between centers of tracks is 0.9mm;
The sodium hydroxide solution that is 0.58% by concentration carries out chemical corrosion to n type single crystal silicon surface in the time of 78 DEG C, prepare leg-of-mutton light trapping structure matte, then the hydrochloric acid that is 11.6% by concentration and concentration are after 8.5% hydrofluoric acid mixes, matte to be cleaned, and remove surface impurity;
, in the cutting face B Implanted source of N-type crystal, be first that 15keV, Implantation amount are 105cm at ion beam energy
-2after, then anneal in temperature is the annealing furnace of 1000 DEG C, the N-type crystalline silicon sheet resistance after annealing is 90ohm/sq, forms PN junction;
Spraying width with shower nozzle at fluting position is 40 μ m masks, the width of described mask is greater than the width of PN junction one side groove, again in the equipment of one side etching, the hydrofluoric acid that is 8.6% by concentration and concentration are after 35.3% nitric acid mixes, the back side of etching silicon wafer and side at normal temperatures, then the hydrofluoric acid that is 7.3% by concentration and concentration are after 39% nitric acid mixes, in the time that temperature is 9 DEG C, silicon chip is corroded, making without the sheet resistance of mask regions is 120ohm/sq, then remove mask and surperficial Pyrex, finally dry again;
At the back side of N-type silicon substrate Implantation phosphorus and carry out annealing in process, annealing temperature is 720 DEG C, forms N
+layer, the sheet resistance scope after annealing is 50ohm/sq;
The mode cvd silicon oxide film of using wet oxygen at the front surface of substrate, then obtains at the surface deposition silicon nitride of silica silica and the silicon nitride composite membrane that thickness is 100nm, and back side plating thickness is 100nm silica and silicon nitride composite membrane.
Adopting inkjet technology is 100um at fluting place, the front of battery spray printing thickness, width is the positive pole that the silver-colored aluminium paste of 30um forms battery, fluting place, back side spray printing thickness is 100um, width is the negative pole that the 18A of 30um Du Pont slurry forms battery, the pattern of inkjet printing and cutting pattern match, then, in being the sintering furnace of 800 DEG C, temperature carries out common burning.
embodiment 5
Selecting resistivity is the N-type silicon chip of 1.8 cm, is 0.75uJ in the pulse energy of laser, under the condition that frequency is 4000KHz, adopts ns laser slotting in substrate both sides, and groove width is 40um, is 90um deeply, and distance between centers of tracks is 1.3mm;
The sodium hydroxide solution that is 0.58% by concentration carries out chemical corrosion to n type single crystal silicon surface in the time of 79 DEG C, prepares leg-of-mutton light trapping structure matte, then, by after 11.5% hydrochloric acid and the mixing of 9% hydrofluoric acid, matte being cleaned, removes surface impurity;
In temperature is the diffusion furnace of 900 DEG C, adopt BBr
3carry out boron diffusion, the diffusingsurface sheet resistance that makes N-type crystalline silicon is 80ohm/sq, forms PN junction;
Spraying width with shower nozzle at fluting position is 40 μ m masks, the width of described mask equals the width of PN junction one side groove, again in the equipment of one side etching, the hydrofluoric acid that is 9% by concentration and concentration are after 39% nitric acid mixes, the back side of etching silicon wafer and side at normal temperatures, then the hydrofluoric acid that is 11% by concentration and concentration are after 39% nitric acid mixes, corroding silicon chip in the time that temperature is 9 DEG C, making without the sheet resistance of mask regions is 140ohm/sq, then remove mask and surperficial Pyrex, finally dry again;
At the back side of N-type silicon substrate Implantation phosphorus and carry out annealing in process, annealing temperature is 700 DEG C, forms N
+layer, the sheet resistance scope after annealing is 70ohm/sq;
The mode cvd silicon oxide film of using wet oxygen at the front surface of substrate, then obtains at the surface deposition silicon nitride of silica silica and the silicon nitride composite membrane that thickness is 90nm, silica and silicon nitride composite membrane that back side plating thickness is 90nm.
Adopting inkjet technology is 90um at fluting place, the front of battery spray printing thickness, width is the positive pole that the silver-colored aluminium paste of 40um forms battery, fluting place, back side spray printing thickness is 90um, width is the negative pole that the 17F of 40um Du Pont slurry forms battery, the pattern of inkjet printing and cutting pattern match, then, in being the sintering furnace of 700 DEG C, temperature carries out common burning.
embodiment 6
Selecting resistivity is the N-type silicon chip of 2 cm, is 0.8uJ in the pulse energy of laser, under the condition that frequency is 5000KHz, adopts ns laser slotting in substrate both sides, and groove width is 50um, is 100um deeply, and distance between centers of tracks is 1.5mm;
The sodium hydroxide solution that is 0.6% by concentration carries out chemical corrosion to n type single crystal silicon surface in the time of 80 DEG C, prepare leg-of-mutton light trapping structure matte, then the hydrochloric acid that is 12% by concentration and concentration are after 10% hydrofluoric acid mixes, matte to be cleaned, and remove surface impurity;
In temperature is the diffusion furnace of 1000 DEG C, adopt BBr
3carry out boron diffusion, the diffusingsurface sheet resistance that makes N-type crystalline silicon is 90ohm/sq, forms PN junction;
Spraying width with shower nozzle at fluting position is 70 μ m masks, the width of described mask is greater than the width of PN junction one side groove, again in the equipment of one side etching, the hydrofluoric acid that is 10% by concentration and concentration are after 40% nitric acid mixes, the back side of etching silicon wafer and side at normal temperatures, then the hydrofluoric acid that is 12% by concentration and concentration are after 40% nitric acid mixes, in the time that temperature is 10 DEG C, the cutting face of silicon chip is corroded, making without the sheet resistance of mask regions is 150ohm/sq, then remove mask and surperficial Pyrex, finally dry again;
At the back side of N-type silicon substrate Implantation phosphorus and carry out annealing in process, annealing temperature is 800 DEG C, forms N
+layer, the sheet resistance scope after annealing is 80ohm/sq;
Adopt the method for PCVD to prepare aluminium oxide and the silicon nitride composite membrane that thickness is 100nm in the front of substrate, silica and silicon nitride composite membrane that back side plating thickness is 100nm.
Adopting inkjet technology is 100um at fluting place, the front of battery spray printing thickness, width is the positive pole that the silver-colored aluminium paste of 50um forms battery, fluting place, back side spray printing thickness is 100um, width is the negative pole that the 18A of 50um Du Pont slurry forms battery, the pattern of inkjet printing and cutting pattern match, then, in being the sintering furnace of 800 DEG C, temperature carries out common burning.
Above-described embodiment is only explanation technical conceive of the present invention and feature, its objective is to allow to be familiar with these those skilled in the art and can to understand content of the present invention enforcement according to this, can not limit the scope of the invention with this.All equivalents that Spirit Essence is made according to the present invention or modification, within all should being encompassed in protection scope of the present invention.
Claims (8)
1. a preparation method for high-efficiency N-type crystalline silicon grooving and grid burying battery, is characterized in that: its technological process comprises: the lbg-making herbs into wool of monocrystalline silicon two sides and to its clean-carry out boron diffusion-selective emitter at the front surface of N-type silicon substrate to form and go back of the body knot, limit knot and Pyrex-Implantation phosphorus annealing-double-sided coating-the prepare electrode of battery.
2. the preparation method of a kind of high-efficiency N-type crystalline silicon grooving and grid burying battery according to claim 1, is characterized in that: concrete steps comprise:
(a): monocrystalline silicon two sides lbg
Selecting resistivity is the N-type silicon chip of 0.3 cm ~ 2 cm, is 0.05uJ ~ 0.8uJ, under the condition that frequency is 50KHz ~ 5000KHz in the pulse energy of laser, adopt ns laser slotting in substrate both sides, groove width is 5um ~ 50um, is 5um ~ 100um deeply, and distance between centers of tracks is 0.5mm ~ 1.5mm;
(b): making herbs into wool to its cleaning
The sodium hydroxide solution that is 0.5% ~ 2% by concentration carries out chemical corrosion to n type single crystal silicon surface in the time of 75 DEG C ~ 80 DEG C, prepare leg-of-mutton light trapping structure matte, then the hydrochloric acid that is 10% ~ 12% by concentration and concentration are after 8% ~ 10% hydrofluoric acid mixes, matte to be cleaned, and remove surface impurity;
(c): the front surface at N-type silicon substrate carries out boron diffusion
In temperature is the diffusion furnace of 600-1000 DEG C, adopt BBr
3carry out boron diffusion, the diffusingsurface sheet resistance that makes N-type crystalline silicon is 20-90ohm/sq, forms PN junction; Or first in the cutting face B Implanted source of N-type crystal, be that 15keV, Implantation amount are 15 × 7cm at ion beam energy
-2after, then anneal in temperature is the annealing furnace of 800 DEG C ~ 1000 DEG C, the N-type crystalline silicon sheet resistance after annealing is 20-90ohm/sq, forms PN junction;
(d): selective emitter forms and go back of the body knot, limit knot and Pyrex
Spraying width with shower nozzle at fluting position is 5 μ m ~ 70 μ m masks, again in the equipment of one side etching, the hydrofluoric acid that is 8% ~ 10% by concentration and concentration are after 35% ~ 40% nitric acid mixes, the back side of etching silicon wafer and side at normal temperatures, then the hydrofluoric acid that is 7% ~ 12% by concentration and concentration are after 35% ~ 40% nitric acid mixes, in the time that temperature is 2 DEG C ~ 10 DEG C, the cutting face of silicon chip is corroded, making without the sheet resistance of mask regions is 70-150ohm/sq, then remove mask and surperficial Pyrex, finally dry again;
(e): back side Implantation phosphorus annealing
At the back side of N-type silicon substrate Implantation phosphorus and carry out annealing in process, annealing temperature is 600 DEG C-800 DEG C, forms N
+layer, the sheet resistance scope after annealing is 20-80ohm/sq;
(f) double-sided coating
Prepare aluminium oxide and silicon nitride or silica and silicon nitride or aluminium oxide, silica and silicon nitride composite membrane that thickness is 50nm ~ 100nm in the front of substrate, plate overleaf silicon nitride film or silica and silicon nitride composite membrane that thickness is 50nm ~ 100nm,
(g) prepare the electrode of battery
Adopting inkjet technology is 1-100um at fluting place, the front of battery spray printing thickness, width is the positive pole that the silver-colored aluminium paste of 5-60um forms battery, fluting place, back side spray printing thickness is 1-100um, width is the negative pole that the 17F of the Du Pont slurry of 5-60um or the 18A of Du Pont slurry form battery, in temperature is the sintering furnace of 400 DEG C ~ 800 DEG C, carries out common burning.
3. the preparation method of a kind of high-efficiency N-type crystalline silicon grooving and grid burying battery according to claim 2, is characterized in that: the front and back to monocrystalline silicon in step a is slotted respectively.
4. the preparation method of a kind of high-efficiency N-type crystalline silicon grooving and grid burying battery according to claim 2, is characterized in that: the front diffusion to monocrystalline silicon in step c, form PN junction,
The preparation method of a kind of high-efficiency N-type crystalline silicon grooving and grid burying battery according to claim 2, is characterized in that: the width of the mask described in steps d is more than or equal to the width of PN junction one side groove.
5. the preparation method of a kind of high-efficiency N-type crystalline silicon grooving and grid burying battery according to claim 2, is characterized in that: in step e to the back side of monocrystalline silicon NN processed
+height knot.
6. the preparation method of a kind of high-efficiency N-type crystalline silicon grooving and grid burying battery according to claim 2, is characterized in that: the aluminium oxide described in step f and silicon nitride composite membrane are on the basis of pellumina, grow one deck silicon nitride film formation aluminium oxide and silicon nitride composite membrane; Silica and silicon nitride composite membrane are on the basis of silicon oxide film, grow one deck silicon nitride film formation silica and silicon nitride composite membrane; Aluminium oxide, silica and silicon nitride composite membrane are one deck silicon oxide film of growing on the basis of pellumina, and then one deck silicon nitride film of growing on the basis of silicon oxide film forms aluminium oxide, silica and silicon nitride composite membrane.
7. the preparation method of a kind of high-efficiency N-type crystalline silicon grooving and grid burying battery according to claim 7, is characterized in that: the preparation method of described aluminium nitride film is PCVD or atomic deposition; The preparation method of described silicon oxide film is any one in PCVD, TCA oxidation and wet oxygen; The preparation method of described silicon nitride film is PCVD or atomic deposition.
8. the preparation method of a kind of high-efficiency N-type crystalline silicon grooving and grid burying battery according to claim 2, is characterized in that: the width of the pattern that step g China and Mexico print is consistent with cutting width, and the thickness of the pattern of inkjet printing is more than or equal to the degree of depth of institute's cutting.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410217901.6A CN104009118B (en) | 2014-05-22 | 2014-05-22 | A kind of preparation method of high-efficiency N-type crystalline silicon grooving and grid burying battery |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410217901.6A CN104009118B (en) | 2014-05-22 | 2014-05-22 | A kind of preparation method of high-efficiency N-type crystalline silicon grooving and grid burying battery |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104009118A true CN104009118A (en) | 2014-08-27 |
| CN104009118B CN104009118B (en) | 2016-08-17 |
Family
ID=51369699
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410217901.6A Expired - Fee Related CN104009118B (en) | 2014-05-22 | 2014-05-22 | A kind of preparation method of high-efficiency N-type crystalline silicon grooving and grid burying battery |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104009118B (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104733555A (en) * | 2014-12-31 | 2015-06-24 | 江苏顺风光电科技有限公司 | Efficient N-type double-sided solar cell and preparation method thereof |
| WO2016112757A1 (en) * | 2015-01-15 | 2016-07-21 | 中利腾晖光伏科技有限公司 | N-type double-sided battery and manufacturing method therefor |
| CN108336169A (en) * | 2018-01-05 | 2018-07-27 | 南通苏民新能源科技有限公司 | A kind of production method of the P-type crystal silicon solar cell of passivating back |
| CN109860032A (en) * | 2019-03-07 | 2019-06-07 | 常州时创能源科技有限公司 | Boron doped agent slurry and its application |
| CN110459638A (en) * | 2019-06-05 | 2019-11-15 | 国家电投集团西安太阳能电力有限公司 | A kind of IBC battery and preparation method thereof of Topcon passivation |
| CN113327999A (en) * | 2021-06-17 | 2021-08-31 | 中国科学院上海微系统与信息技术研究所 | Monocrystalline silicon wafer with groove on surface, heterojunction solar cell and preparation method |
| CN113517358A (en) * | 2021-03-30 | 2021-10-19 | 环晟光伏(江苏)有限公司 | Front side slotting method suitable for battery piece electroplating process |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101740659A (en) * | 2008-11-06 | 2010-06-16 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Method for manufacturing buried-contact solar battery |
| CN102637776A (en) * | 2012-04-24 | 2012-08-15 | 英利能源（中国）有限公司 | N type solar cell and manufacturing method thereof |
| CN102709340A (en) * | 2012-05-30 | 2012-10-03 | 浙江晶科能源有限公司 | Heterojunction solar cell of inclined metal contact structure based on N type silicon wafer |
| KR20120134892A (en) * | 2011-06-03 | 2012-12-12 | 미리넷솔라 주식회사 | Buried contact solar cell using laser and ink-jet and the manufacturing method thereof |
| CN103346205A (en) * | 2013-06-08 | 2013-10-09 | 中山大学 | Method for preparing crystalline silicon solar cell with cross vertical emitting electrode structure |
| CN103746026A (en) * | 2013-12-05 | 2014-04-23 | 湖南红太阳光电科技有限公司 | Front electrode diffraction type local back surface field passivation type crystalline silicon cell preparation method |
-
2014
- 2014-05-22 CN CN201410217901.6A patent/CN104009118B/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101740659A (en) * | 2008-11-06 | 2010-06-16 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Method for manufacturing buried-contact solar battery |
| KR20120134892A (en) * | 2011-06-03 | 2012-12-12 | 미리넷솔라 주식회사 | Buried contact solar cell using laser and ink-jet and the manufacturing method thereof |
| CN102637776A (en) * | 2012-04-24 | 2012-08-15 | 英利能源（中国）有限公司 | N type solar cell and manufacturing method thereof |
| CN102709340A (en) * | 2012-05-30 | 2012-10-03 | 浙江晶科能源有限公司 | Heterojunction solar cell of inclined metal contact structure based on N type silicon wafer |
| CN103346205A (en) * | 2013-06-08 | 2013-10-09 | 中山大学 | Method for preparing crystalline silicon solar cell with cross vertical emitting electrode structure |
| CN103746026A (en) * | 2013-12-05 | 2014-04-23 | 湖南红太阳光电科技有限公司 | Front electrode diffraction type local back surface field passivation type crystalline silicon cell preparation method |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104733555A (en) * | 2014-12-31 | 2015-06-24 | 江苏顺风光电科技有限公司 | Efficient N-type double-sided solar cell and preparation method thereof |
| WO2016112757A1 (en) * | 2015-01-15 | 2016-07-21 | 中利腾晖光伏科技有限公司 | N-type double-sided battery and manufacturing method therefor |
| CN108336169A (en) * | 2018-01-05 | 2018-07-27 | 南通苏民新能源科技有限公司 | A kind of production method of the P-type crystal silicon solar cell of passivating back |
| CN109860032A (en) * | 2019-03-07 | 2019-06-07 | 常州时创能源科技有限公司 | Boron doped agent slurry and its application |
| CN110459638A (en) * | 2019-06-05 | 2019-11-15 | 国家电投集团西安太阳能电力有限公司 | A kind of IBC battery and preparation method thereof of Topcon passivation |
| CN113517358A (en) * | 2021-03-30 | 2021-10-19 | 环晟光伏(江苏)有限公司 | Front side slotting method suitable for battery piece electroplating process |
| CN113327999A (en) * | 2021-06-17 | 2021-08-31 | 中国科学院上海微系统与信息技术研究所 | Monocrystalline silicon wafer with groove on surface, heterojunction solar cell and preparation method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104009118B (en) | 2016-08-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104009118A (en) | Method for preparing efficient N-type crystalline silicon grooving buried contact battery | |
| KR101673565B1 (en) | Solar cell and method for manufacturing such a solar cell | |
| CN103904164B (en) | Preparation method for N-shaped back-junction solar cell | |
| CN103996746B (en) | Manufacturing method for PERL crystalline silicon solar cell capable of being massively produced | |
| CN101667602A (en) | Polysilicon solar cell and preparation method thereof | |
| CN109713053A (en) | A kind of preparation method of MWT solar battery | |
| CN104934500A (en) | Method for preparing back-surface passivation crystalline silicon solar cell with selective emitter | |
| CN107863420A (en) | The preparation technology of solar cell without etching processing | |
| CN105097978A (en) | N-type back junction crystalline silicon cell and preparation method thereof | |
| CN103077975A (en) | Low-cost n-type dual-side solar battery and preparation method thereof | |
| CN103646992A (en) | Preparation method of P-type crystal silicon double-sided cell | |
| CN109285897A (en) | A kind of efficient passivation contact crystalline silicon solar cell and preparation method thereof | |
| CN105655424A (en) | Full-back-field diffusion N-type silicon-based battery and preparation method thereof | |
| CN102364691A (en) | Crystalline silicon solar battery with upper/lower conversion luminescent structure and manufacturing method for crystalline silicon solar battery | |
| CN103646994A (en) | Preparation method of solar cell positive electrode | |
| CN102931278A (en) | Back local contact structure of solar battery, manufacture method of structure, corresponding solar battery and manufacture method of solar battery | |
| CN110112230A (en) | A kind of preparation method of MWT solar battery | |
| CN104009120B (en) | The preparation method of N-type crystalline silicon grooving and grid burying battery | |
| CN103594530A (en) | Crystalline silicon solar cell combining obverse side thermal oxidation, selective emitter junctions and reverse passivation and manufacturing method thereof | |
| CN105957921B (en) | A kind of method that utilization printing technology prepares N-type silicon IBC solar cells | |
| CN105304730A (en) | MWT cell with back passive film and preparation method thereof | |
| CN104009121B (en) | The two-sided grooving and grid burying battery preparation method of P type crystalline silicon | |
| CN104009119A (en) | Method for manufacturing P type crystalline silicon grooved buried-contact battery | |
| CN203674218U (en) | Crystalline silicon solar cell integrating MWP and passive emitter and rear cell technologies | |
| CN103618025B (en) | A kind of crystalline silicon back junction solar battery preparation method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160817 Termination date: 20180522 |