CN103987190A - Method for optimizing differential via hole impedance - Google Patents

Method for optimizing differential via hole impedance Download PDF

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Publication number
CN103987190A
CN103987190A CN201410196047.XA CN201410196047A CN103987190A CN 103987190 A CN103987190 A CN 103987190A CN 201410196047 A CN201410196047 A CN 201410196047A CN 103987190 A CN103987190 A CN 103987190A
Authority
CN
China
Prior art keywords
impedance
via hole
difference
hole
differential via
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410196047.XA
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Chinese (zh)
Inventor
宗艳艳
张柯柯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Inspur Electronic Information Industry Co Ltd
Original Assignee
Inspur Electronic Information Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inspur Electronic Information Industry Co Ltd filed Critical Inspur Electronic Information Industry Co Ltd
Priority to CN201410196047.XA priority Critical patent/CN103987190A/en
Publication of CN103987190A publication Critical patent/CN103987190A/en
Pending legal-status Critical Current

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The invention provides a method for optimizing differential via hole impedance. The method includes the specific implementation steps that two anti-pads of a differential via hole are connected and made to be oval, the sizes can be adjusted, then the size of the differential via hole can be adjusted according to the simulation situation, and the larger the anti-pads are, the higher the impedance is. Compared with the prior art, the method for optimizing the differential via hole impedance effectively improves the differential via hole impedance, improves the transmission quality of signals and is high in practicability and easy to popularize.

Description

A kind of method of optimizing difference through hole impedance
Technical field
The present invention relates to electronic technology field, specifically a kind of method of optimizing difference through hole impedance.
Background technology
Along with improving constantly of signal rate, also more and more higher to the environmental requirement of signal transmission.As everyone knows, impedance discontinuous, can cause the reflection of signal.Like this, the transmission quality of signal can be subject to certain impact, and insertion loss increases.As shown in Figure 1, the impedance comparison in general difference hole is low, and general difference through hole impedance is 74 ohm, and the differential impedance of high-speed signal transmission lines requires 85 ohm or 100 ohm now.But the impedance in difference hole is often very low, like this, can there is signal reflex, affect the quality of signal transmission, use this method effectively to improve difference through hole impedance, improve the transmission quality of signal.
Summary of the invention
Technical assignment of the present invention is to solve the deficiencies in the prior art, and a kind of method of optimizing difference through hole impedance is provided.
Technical scheme of the present invention realizes in the following manner, a kind of this method of optimizing difference through hole impedance, its specific implementation process is: two anti-pads of difference through hole are linked together, make an ellipticity, size can be adjusted, and then according to simulation scenarios, the size of this difference through hole is adjusted, anti-pad is larger, and impedance is higher.
The beneficial effect that the present invention compared with prior art produced is:
A kind of method of optimizing difference through hole impedance of the present invention can make impedance bring up to 87 ohm by 74 ohm of general difference through hole, loss by original when the 4Ghz-1.09dB brings up to present-0.05dB, when 8Ghz-bring up to-0.33dB of 1.07dB, and then effectively improve difference through hole impedance, improve the transmission quality of signal, practical, be easy to promote.
Accompanying drawing explanation
The difference through hole schematic diagram that accompanying drawing 1 is prior art.
Accompanying drawing 2 difference through hole schematic diagram of the present invention.
Embodiment
Below in conjunction with accompanying drawing, a kind of method of optimizing difference through hole impedance of the present invention is described in detail below.
As shown in Figure 2, a kind of this method of optimizing difference through hole impedance, its specific implementation process is: two anti-pads of difference through hole are linked together, make an ellipticity, size can be adjusted, and then according to simulation scenarios, the size of this difference through hole is adjusted, anti-pad is larger, and impedance is higher.
By the method, the impedance that can make pcb board difference through hole is brought up to 87 ohm by 74 ohm of general difference through hole.Loss by original when the 4Ghz-1.09dB brings up to present-0.05dB.When 8Ghz-bring up to-0.33dB of 1.07dB.
The foregoing is only embodiments of the invention, within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.

Claims (1)

1. a method of optimizing difference through hole impedance, it is characterized in that its specific implementation process is: two anti-pads of difference through hole are linked together, make an ellipticity, size can be adjusted, then according to simulation scenarios, size to this difference through hole is adjusted, and anti-pad is larger, and impedance is higher.
CN201410196047.XA 2014-05-12 2014-05-12 Method for optimizing differential via hole impedance Pending CN103987190A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410196047.XA CN103987190A (en) 2014-05-12 2014-05-12 Method for optimizing differential via hole impedance

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410196047.XA CN103987190A (en) 2014-05-12 2014-05-12 Method for optimizing differential via hole impedance

Publications (1)

Publication Number Publication Date
CN103987190A true CN103987190A (en) 2014-08-13

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410196047.XA Pending CN103987190A (en) 2014-05-12 2014-05-12 Method for optimizing differential via hole impedance

Country Status (1)

Country Link
CN (1) CN103987190A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105472907A (en) * 2016-01-01 2016-04-06 广州兴森快捷电路科技有限公司 Manufacturing method for shield type differential via holes and impedance calculation method for differential via holes
CN105975659A (en) * 2016-04-27 2016-09-28 浪潮电子信息产业股份有限公司 Trace width determination method and PCB
CN111712044A (en) * 2020-06-24 2020-09-25 苏州浪潮智能科技有限公司 Method, device and equipment for adjusting direction of reverse welding disk of PCB
CN112888155A (en) * 2021-01-14 2021-06-01 合肥移瑞通信技术有限公司 Circuit board, circuit board via hole optimization method, electronic device and storage medium

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3533596B2 (en) * 1999-06-25 2004-05-31 日本特殊陶業株式会社 Manufacturing method of wiring board
CN1901366A (en) * 2005-07-21 2007-01-24 鸿富锦精密工业(深圳)有限公司 Method for matching differential through hole impedance and differential conductor impedance
CN1916915A (en) * 2005-08-19 2007-02-21 鸿富锦精密工业(深圳)有限公司 Method for improving resistance of via hole
CN103260348A (en) * 2013-04-01 2013-08-21 广州兴森快捷电路科技有限公司 High-speed PCB and difference via hole impedance control method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3533596B2 (en) * 1999-06-25 2004-05-31 日本特殊陶業株式会社 Manufacturing method of wiring board
CN1901366A (en) * 2005-07-21 2007-01-24 鸿富锦精密工业(深圳)有限公司 Method for matching differential through hole impedance and differential conductor impedance
CN1916915A (en) * 2005-08-19 2007-02-21 鸿富锦精密工业(深圳)有限公司 Method for improving resistance of via hole
CN103260348A (en) * 2013-04-01 2013-08-21 广州兴森快捷电路科技有限公司 High-speed PCB and difference via hole impedance control method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105472907A (en) * 2016-01-01 2016-04-06 广州兴森快捷电路科技有限公司 Manufacturing method for shield type differential via holes and impedance calculation method for differential via holes
CN105975659A (en) * 2016-04-27 2016-09-28 浪潮电子信息产业股份有限公司 Trace width determination method and PCB
CN111712044A (en) * 2020-06-24 2020-09-25 苏州浪潮智能科技有限公司 Method, device and equipment for adjusting direction of reverse welding disk of PCB
CN112888155A (en) * 2021-01-14 2021-06-01 合肥移瑞通信技术有限公司 Circuit board, circuit board via hole optimization method, electronic device and storage medium

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Application publication date: 20140813