CN203707381U - Conveyer for conveying LVDS signals - Google Patents
Conveyer for conveying LVDS signals Download PDFInfo
- Publication number
- CN203707381U CN203707381U CN201320834661.5U CN201320834661U CN203707381U CN 203707381 U CN203707381 U CN 203707381U CN 201320834661 U CN201320834661 U CN 201320834661U CN 203707381 U CN203707381 U CN 203707381U
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- double
- pcb board
- contact pin
- pcb
- main frame
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Abstract
The utility model relates to the field of plasma panel displays. The utility model discloses a transmission device for transmitting LVDS (Low Voltage Differential Signaling) signals. The transmission device for transmitting LVDS signals specifically comprises a screen logic PCB (Printed Circuit Board) and a host chip PCB. The host chip PCB is provided with double-row pins. The screen logic PCB is provided with double-row sockets corresponding to the double-row pins on the host chip PCB. The host chip PCB and the screen logic PCB are connected together through plugging the double-row pins into the double-row sockets. By arranging double-row sockets and double-row pins on the screen logic PCB and the host chip PCB respectively and plugging the double-row pins into the double-row sockets to connect the screen logic PCB plate and the main movement PCB plate directly, the LVDS signals output by the main movement PCB plate are directly transmitted to the screen logic PCB through the double-row sockets and double-row pins. The cost of connecting lines is saved and the manpower cost of a FPC (Flexible Printed Circuit) line installation station is saved simultaneously.
Description
Technical field
The utility model relates to plasma display technology field, relates in particular to a kind of conveyer of LVDS signal.
Background technology
In plasma display, comprise screen logic card and main frame central layer, when work, main frame central layer is treated to through decoding the abbreviation that LVDS(LVDS is Low-Voltage Differential Signaling by the signal receiving) signal output, be transferred on screen logic card and carry out also original image of Graphics Processing by connecting line.LVDS interface claims again RS-644 bus interface, is a kind of data transmission interface just occurring the nineties in 20th century.LVDS is low-voltage differential signal, the core of this technology is to adopt extremely low voltage swing high speed differential transmission data, can realize connection point-to-point or a point-to-multipoint, there is low-power consumption, low error rate, low crosstalking and the feature such as low radiation, its transmission medium can be copper PCB line, can be also balanced cable.LVDS has obtained application more and more widely in the system that signal integrity, low jitter and common mode characteristic are had relatively high expectations.General LVDS interface has 14PIN, 20PIN or 30PIN.
Along with the continuous progress of technology and the pressure of display cost, the transmission line of LVDS signal replaces with by the higher twisted-pair feeder of cost the abbreviation that FPC(FPC is Flexible Printed Circuit) line.By LVDS socket being set respectively on screen logic card and main frame central layer, the LVDS socket output LVDS signal of main frame central layer, LVDS socket input LVDS signal on screen logic card, the LVDS signal of main frame central layer output is transferred to screen logic card by FPC line, thereby realize the transmission of LVDS signal.
But such LVDS signal transmitting apparatus connecting line cost is high, and the cost of labor of installing is high.
Utility model content
The purpose of this utility model is the high technical problem of cost that the transmitting device connecting line cost for LVDS signal of the prior art is high and install, and a kind of transmitting device of LVDS signal is provided.
The purpose of this utility model realizes by following technical proposals: a kind of transmitting device of LVDS signal, it specifically comprises screen logic pcb board and main frame core pcb board, on described main frame core pcb board, contact pin is set, on described screen logic pcb board, arrange corresponding to the jack of contact pin on main frame core pcb board, described main frame core pcb board with shield between logic pcb board by contact pin is plugged on jack and is connected.The mode connecting by contact pin jack realizes two connections between pcb board, has saved the cost of connecting line and the human cost that connecting line station is installed.
Further, above-mentioned contact pin is double contact pin, and corresponding jack is double jack.Contact pin and jack are set to double, and both convenient installation, had also reduced the area of pcb board, had reduced cost.
Further, above-mentioned double contact pin is vertically set on main frame core pcb board, and every contact pin is from middle bending, and in an angle, lower semisection is perpendicular to main frame core pcb board for the upper semisection of every contact pin and lower semisection shape; The upper semisection of every contact pin inserts in double jack corresponding on screen logic pcb board.By contact pin bending, reduce the thickness of complete machine, in reducing cost, improve the aesthetics of product.
Further, above-mentioned double contact pin is vertically welded on main frame core pcb board.Double contact pin is directly welded on main frame core pcb board, makes complete machine work more stable.
Further, the angle that the upper semisection of above-mentioned every contact pin and lower semisection form is the right angle of 90 degree, and lower semisection is perpendicular to main frame core pcb board, and upper semisection is parallel to main frame core pcb board, and the double jack on described screen logic pcb board is parallel to screen logic pcb board.By such setting, make further to have reduced the thickness of complete machine, in reducing cost, improve the aesthetics of product.
Further, above-mentioned double contact pin is 38 pins, and corresponding double jack is 38.
By adopting above technical scheme, the beneficial effects of the utility model are: by double jack and double contact pin being set respectively on screen logic pcb board and main frame core pcb board, and directly connect and shield logic pcb board and main frame core pcb board by double contact pin being plugged on double jack, the LVDS signal of the upper output of main frame core PCB is directly transferred to screen logic pcb board by double jack and double contact pin, save the cost of connecting line, saved the human cost that FPC line is installed station simultaneously.
Accompanying drawing explanation
Fig. 1 is the structural representation of the transmitting device of LVDS signal of the present utility model.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with Figure of description and specific embodiment, the utility model is described in more detail.Should be appreciated that specific embodiment described herein is only in order to explain the utility model, and be not used in restriction the utility model.
The structural representation of the transmitting device of LVDS signal of the present utility model as shown in Figure 1.The utility model discloses a kind of transmitting device of LVDS signal, it specifically comprises screen logic pcb board and main frame core pcb board, on described main frame core pcb board, double contact pin is set, on described screen logic pcb board, arrange corresponding to the double jack of double contact pin on main frame core pcb board, described main frame core pcb board with shield between logic pcb board by double contact pin is plugged on double jack and is connected.By double jack and double contact pin being set respectively on screen logic pcb board and main frame core pcb board, and directly connect and shield logic pcb board and main frame core pcb board by double contact pin being plugged on double jack, the LVDS signal of the upper output of main frame core PCB is directly transferred to screen logic pcb board by double jack and double contact pin, save the cost of connecting line, saved the human cost that FPC line is installed station simultaneously.
Further, above-mentioned double contact pin is vertically welded on main frame core pcb board, and every contact pin is from middle bending, and the upper semisection of double contact pin and lower semisection form the right angle of 90 degree, and lower semisection is perpendicular to main frame core pcb board, and upper semisection is parallel to main frame core pcb board; Double jack on described screen logic pcb board is parallel to screen logic pcb board, and the upper semisection of every contact pin inserts in double jack corresponding on screen logic pcb board.By the mode of double contact pin bending, the plasma display thickness after encapsulation is obviously reduced by above-mentioned, further reduced the cost of product, improved the aesthetics of product.
Further, above-mentioned double contact pin is 38 pins, and corresponding double jack is 38.
Here by specific embodiment, utility model be have been described in detail, provide the description of above-described embodiment for those skilled in the art being manufactured or using the utility model, the various modifications of these embodiment are that appearance is intelligible for a person skilled in the art.The utility model is not limited to these examples, or some aspect wherein.Scope of the present utility model is elaborated by additional claim.
Above-mentioned explanation illustrates and has described a preferred embodiment of the present utility model, but as previously mentioned, be to be understood that the utility model is not limited to disclosed form herein, should not regard the eliminating to other embodiment as, and can be used for various other combinations, modification and environment, and can, in utility model contemplated scope described herein, change by technology or the knowledge of above-mentioned instruction or association area.And the change that those skilled in the art carry out and variation do not depart from spirit and scope of the present utility model, all should be in the protection range of the utility model claims.
Claims (6)
1. the transmitting device of a LVDS signal, it is characterized in that specifically comprising screen logic pcb board and main frame core pcb board, on described main frame core pcb board, contact pin is set, on described screen logic pcb board, arrange corresponding to the jack of contact pin on main frame core pcb board, described main frame core pcb board with shield between logic pcb board by contact pin is plugged on jack and is connected.
2. will require the transmitting device of the LVDS signal as described in 1 as right, it is characterized in that described contact pin is double contact pin, corresponding jack is double jack.
3. to require the transmitting device of the LVDS signal as described in 2 as right, it is characterized in that described double contact pin is vertically set on main frame core pcb board, every contact pin is from middle bending, and in an angle, lower semisection is perpendicular to main frame core pcb board for the upper semisection of every contact pin and lower semisection shape; The upper semisection of every contact pin inserts in double jack corresponding on screen logic pcb board.
4. to require the transmitting device of the LVDS signal as described in 3 as right, it is characterized in that described double contact pin is vertically welded on main frame core pcb board.
5. to require the transmitting device of the LVDS signal as described in 4 as right, it is characterized in that the upper semisection of described every contact pin and the angle that lower semisection forms are the right angle of 90 degree, lower semisection is perpendicular to main frame core pcb board, upper semisection is parallel to main frame core pcb board, and the double jack on described screen logic pcb board is parallel to screen logic pcb board.
6. will require the transmitting device of the LVDS signal as described in 5 as right, it is characterized in that described double contact pin is 38 pins, corresponding double jack is 38.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320834661.5U CN203707381U (en) | 2013-12-18 | 2013-12-18 | Conveyer for conveying LVDS signals |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320834661.5U CN203707381U (en) | 2013-12-18 | 2013-12-18 | Conveyer for conveying LVDS signals |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203707381U true CN203707381U (en) | 2014-07-09 |
Family
ID=51057774
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320834661.5U Expired - Fee Related CN203707381U (en) | 2013-12-18 | 2013-12-18 | Conveyer for conveying LVDS signals |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203707381U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109782161A (en) * | 2018-12-26 | 2019-05-21 | 中国科学院长春光学精密机械与物理研究所 | The debugging circuit board and its adjustment method of anti-fuse FPGA |
-
2013
- 2013-12-18 CN CN201320834661.5U patent/CN203707381U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109782161A (en) * | 2018-12-26 | 2019-05-21 | 中国科学院长春光学精密机械与物理研究所 | The debugging circuit board and its adjustment method of anti-fuse FPGA |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140709 Termination date: 20201218 |