CN103959727B - 用于在差分电压模式驱动器中实现对称单端终接的装置 - Google Patents
用于在差分电压模式驱动器中实现对称单端终接的装置 Download PDFInfo
- Publication number
- CN103959727B CN103959727B CN201280058186.5A CN201280058186A CN103959727B CN 103959727 B CN103959727 B CN 103959727B CN 201280058186 A CN201280058186 A CN 201280058186A CN 103959727 B CN103959727 B CN 103959727B
- Authority
- CN
- China
- Prior art keywords
- output
- driver
- voltage
- section
- replica
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
- H04L25/0274—Arrangements for ensuring balanced coupling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0278—Arrangements for impedance matching
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Logic Circuits (AREA)
- Dc Digital Transmission (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/248,485 | 2011-09-29 | ||
| US13/248,485 US8760189B2 (en) | 2011-09-29 | 2011-09-29 | Apparatus to implement symmetric single-ended termination in differential voltage-mode drivers |
| PCT/US2012/058172 WO2013049757A1 (en) | 2011-09-29 | 2012-09-30 | An apparatus to implement symmetric single-ended termination in differential voltage-mode drivers |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103959727A CN103959727A (zh) | 2014-07-30 |
| CN103959727B true CN103959727B (zh) | 2017-02-22 |
Family
ID=47263558
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201280058186.5A Active CN103959727B (zh) | 2011-09-29 | 2012-09-30 | 用于在差分电压模式驱动器中实现对称单端终接的装置 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US8760189B2 (https=) |
| EP (1) | EP2761834B1 (https=) |
| JP (1) | JP5847948B2 (https=) |
| KR (1) | KR101538979B1 (https=) |
| CN (1) | CN103959727B (https=) |
| IN (1) | IN2014CN02257A (https=) |
| WO (1) | WO2013049757A1 (https=) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8542039B2 (en) * | 2011-11-11 | 2013-09-24 | Qualcomm Incorporated | High-speed pre-driver and voltage level converter with built-in de-emphasis for HDMI transmit applications |
| US9264263B2 (en) * | 2014-04-21 | 2016-02-16 | Qualcomm Incorporated | Serdes voltage-mode driver with skew correction |
| KR102279252B1 (ko) * | 2015-04-03 | 2021-07-20 | 삼성전자주식회사 | 전압 모드 드라이버 및 이를 포함하는 전자 장치 |
| CN105991124B (zh) * | 2015-06-08 | 2019-01-15 | 龙迅半导体(合肥)股份有限公司 | 一种驱动装置 |
| US9843324B1 (en) * | 2016-11-10 | 2017-12-12 | Qualcomm Incorporated | Voltage-mode SerDes with self-calibration |
| US10873323B2 (en) * | 2019-01-31 | 2020-12-22 | Marvell Asia Pte, Ltd. | Systems and methods for calibrating impedance of a low power voltage-mode transmitter driver |
| US11431530B2 (en) * | 2020-09-02 | 2022-08-30 | Huawei Technologies Co., Ltd. | Selectable mode transmitter driver |
| US12367910B2 (en) * | 2021-08-19 | 2025-07-22 | Pagnanelli Family Trust | Differential line driver |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002103906A2 (en) * | 2001-06-14 | 2002-12-27 | Nurlogic Design, Inc. | Low voltage differential signaling circuit with mid-point bias |
| CN1252927C (zh) * | 2001-12-07 | 2006-04-19 | 哉英电子股份有限公司 | 半导体集成电路 |
| US7635990B1 (en) * | 2008-07-18 | 2009-12-22 | Xilinx, Inc. | Methods and apparatus for implementing an output circuit |
| CN101904100A (zh) * | 2007-12-17 | 2010-12-01 | 美商豪威科技股份有限公司 | 用于高速低电压共模驱动器的复制偏置电路 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR0127536B1 (ko) * | 1994-12-07 | 1997-12-29 | 배순훈 | 진폭 제한 기능을 갖는 영상 신호 증폭 장치 |
| US6064224A (en) * | 1998-07-31 | 2000-05-16 | Hewlett--Packard Company | Calibration sharing for CMOS output driver |
| US6753699B2 (en) | 2000-11-13 | 2004-06-22 | Standard Microsystems Corporation | Integrated circuit and method of controlling output impedance |
| US6771097B1 (en) * | 2003-04-22 | 2004-08-03 | Broadcom Corporation | Series terminated CMOS output driver with impedance calibration |
| TWI304529B (en) | 2004-01-30 | 2008-12-21 | Realtek Semiconductor Corp | Impedance control circuit and method thereof |
| US7129765B2 (en) | 2004-04-30 | 2006-10-31 | Xilinx, Inc. | Differential clock tree in an integrated circuit |
| JP2009531925A (ja) | 2006-03-27 | 2009-09-03 | エヌエックスピー ビー ヴィ | 出力インピーダンスを整合した低電圧で低消費電力の差動ドライバ |
| US7728630B1 (en) * | 2009-01-29 | 2010-06-01 | Xilinx, Inc. | Method and apparatus for a process, voltage, and temperature variation tolerant semiconductor device |
| US8390314B2 (en) * | 2011-01-14 | 2013-03-05 | Qualcomm Incorporated | Method of half-bit pre-emphasis for multi-level signal |
-
2011
- 2011-09-29 US US13/248,485 patent/US8760189B2/en active Active
-
2012
- 2012-09-30 WO PCT/US2012/058172 patent/WO2013049757A1/en not_active Ceased
- 2012-09-30 JP JP2014533453A patent/JP5847948B2/ja not_active Expired - Fee Related
- 2012-09-30 KR KR1020147011075A patent/KR101538979B1/ko not_active Expired - Fee Related
- 2012-09-30 CN CN201280058186.5A patent/CN103959727B/zh active Active
- 2012-09-30 IN IN2257CHN2014 patent/IN2014CN02257A/en unknown
- 2012-09-30 EP EP12794567.3A patent/EP2761834B1/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002103906A2 (en) * | 2001-06-14 | 2002-12-27 | Nurlogic Design, Inc. | Low voltage differential signaling circuit with mid-point bias |
| CN1252927C (zh) * | 2001-12-07 | 2006-04-19 | 哉英电子股份有限公司 | 半导体集成电路 |
| CN101904100A (zh) * | 2007-12-17 | 2010-12-01 | 美商豪威科技股份有限公司 | 用于高速低电压共模驱动器的复制偏置电路 |
| US7635990B1 (en) * | 2008-07-18 | 2009-12-22 | Xilinx, Inc. | Methods and apparatus for implementing an output circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2014534670A (ja) | 2014-12-18 |
| KR101538979B1 (ko) | 2015-07-29 |
| CN103959727A (zh) | 2014-07-30 |
| EP2761834B1 (en) | 2016-01-20 |
| US8760189B2 (en) | 2014-06-24 |
| IN2014CN02257A (https=) | 2015-06-19 |
| WO2013049757A1 (en) | 2013-04-04 |
| KR20140060372A (ko) | 2014-05-19 |
| US20130082744A1 (en) | 2013-04-04 |
| JP5847948B2 (ja) | 2016-01-27 |
| EP2761834A1 (en) | 2014-08-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |