CN103943584A - 用于半导体装置的焊线 - Google Patents
用于半导体装置的焊线 Download PDFInfo
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- CN103943584A CN103943584A CN201310019596.5A CN201310019596A CN103943584A CN 103943584 A CN103943584 A CN 103943584A CN 201310019596 A CN201310019596 A CN 201310019596A CN 103943584 A CN103943584 A CN 103943584A
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- bonding wire
- semiconductor device
- stamen line
- metal level
- copper
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Abstract
本发明公开一种用于半导体装置的焊线,所述焊线包含一主要成分为铜的蕊线,一扩散层以及一金属层。所述金属层的金属原子向内扩散与蕊线的金属原子混合而形成所述扩散层。本发明的焊线具有较佳的塑性变形特性,而有效改善焊线打线后的结合强度。
Description
技术领域
本发明是有关于一种用于半导体装置的焊线,特别是有关于一种用于连接芯片与载板的焊线。
背景技术
现有半导体集成电路(integrated circuit,IC)芯片封装制造过程中,大多是以金线(gold wire)作为连接芯片与载板的焊线(bonding wire),但相较于金线,铜线(copperwire)具有降低材料成本的优势且具有较佳的导电性、导热性及机械强度,故铜线的线径可设计得更细且可提供较佳的散热效率,因而目前有一研发趋势是以铜导线来逐渐取代传统金线,并将其应用于半导体芯片的打线(wire bonding)工艺中。
然而,在进行打线工艺期间,铜线材料本身却也存在下述技术问题,例如:在高温环境下线材表面容易氧化、因线材硬度偏高而较难获得理想的塑性变形特性等,因此纯铜的材料特性将负面影响铜导线打线后的结合强度,并大幅限制铜打线工艺的应用价值。
为了解决上述技术问题,某些其他金属元素例如钯(Pd)于是被加入覆盖于铜线上。镀钯铜线虽可解决铜易氧化的问题,然而其硬度仍然偏高而较难获得理想的塑性变形特性。
故,有必要提供一种用于半导体装置的焊线,以解决现有技术所存在的问题。
发明内容
有鉴于此,本发明提供一种用于半导体装置的焊线,以解决现有技术所存在的提升塑性变形特性的技术问题。
为达成本发明的前述目的,本发明一实施例提供一种用于半导体装置的焊线,所述焊线包含一主要成分为铜的蕊线,一扩散层,一金属层以及一金属氧化层。所述金属层的金属原子会向内扩散与蕊线的金属原子混合而形成所述扩散层,所述金属层的外表面与空气中的氧结合形成所述金属氧化层。本发明的焊线具有较佳的塑性变形特性,而有效改善焊线打线后的结合强度。
若本发明的焊线全程在无氧的环境下制造以及保存,本发明的焊线不含所述金属氧化层。
本发明的焊线可另包含一抗氧化层于其最外层,以加强控制焊线的表面氧化,藉此进一步增进可焊性。
此外,本发明再一实施例提供一种半导体装置,所述半导体装置包含:一载板、一半导体芯片及所述焊线。所述半导体芯片设于所述载板。所述焊线电性连接所述半导体芯片及所述载板。
为让本发明的上述内容能更明显易懂,下文特举优选实施例,并配合附图,作详细说明如下:
附图说明
图1是本发明一实施例的焊线剖视图。
图2是对应于图1的焊线(包含蕊线(纯铜)、扩散层、金属层(铟)、金属氧化层)的欧杰电子能谱深度剖面图。
图3是本发明另一实施例的焊线剖视图。
图4是本发明的焊线应用于打线机台的焊针以电性连接半导体芯片至载板的示意图。
具体实施方式
以下各实施例的说明是参考附加的图式,用以例示本发明可用以实施的特定实施例。
请参照图1所示,根据本发明一实施例的焊线100主要包含一主要成分为铜的蕊线(core wire)101,一扩散层102,一金属层104以及一金属氧化层。本发明的焊线主要应用于半导体芯片的封装打线工艺,以电性连接于一半导体芯片的一接垫及一载板的焊垫之间。
所述蕊线101可以是纯铜蕊线(例如包含至少99.9重量%的铜)或铜合金蕊线(例如铜锡、铜锌、铜镁或铜铟合金蕊线)。铜合金蕊线可以包含0.1重量%至30重量%的锡、锌、镁或铟,及其余重量部分为铜。可以理解的是,纯铜或铜合金材料因其熔炼过程而不可避免的必然包含的微量金属或非金属元素,例如碳(C)、硅(Si)、硫(S)或磷(P)等,但其所占总重量比例通常小于0.1~0.2wt%(例如小于0.05wt%),同时也不会影响主要合金物化性质,故于此将予省略不再另加说明。
所述扩散层102由所述蕊线101与所述金属层104的金属形成。详细言之,所述扩散层102由构成所述蕊线101与所述金属层104的金属原子,相互扩散(mutual diffusion)分别反向移动至蕊线101/金属层104的界面区(interface zone)混合而形成。
所述金属层104为锡、锌、镁或铟。所述金属层104的金属原子会向内扩散与蕊线的金属原子混合而形成所述扩散层102。
所述金属层104的外表面与空气中的氧结合形成所述金属氧化层106。值得注意的是,在本发明另一实施例中,焊线不含所述金属氧化层106;例如,若本发明的焊线全程在无氧的环境下制造以及保存,则不会形成氧化层。
本发明的焊线100具有较佳的塑性变形特性,而有效改善焊线打线后的结合强度,而大幅增加本发明焊线的应用价值。
本发明焊线,可以利用欧杰电子能谱(Auger electron spectroscopy;AES)做侦测,可藉此得知焊线表面各层(扩散层,金属层以及金属氧化层)的组成及厚度。
图2是对应于图1的焊线(包含蕊线(纯铜)、扩散层、金属层(铟)、金属氧化层)的欧杰电子能谱深度剖面图。详言之,利用离子先将焊线表面打出某深度洞,再利用电子枪侦测此深度的欧杰信号,而得到此深度的各成分浓度(%)(在此是以原子(%)(Atomic percent(%)呈现),如此反复(间隔),即可得知深度与组成之间的关系。如图2所示,焊线由外而内依序是铟金属氧化层(厚度约为)、铟金属层(厚度约为)、扩散层(厚度约为)以及纯铜蕊线。
请参照图3所示,根据本发明另一实施例的焊线100’的主要成分与图1所示的焊线100相似,但焊线100’另包含一抗氧化层108于其最外层。抗氧化层108包含导电但不氧化(non-oxidizing)金属例如金、铂、钯或其合金,其可加强控制焊线的表面氧化,藉此进一步增进可焊性。此外,抗氧化层108包含有机缓蚀剂,其可加强控制焊线的表面氧化。有机缓蚀剂包含但不限于苯骈三氮唑钠(BTA·Na)、巯基苯骈噻唑钠(MBT·Na)以及甲基苯骈三氮唑(TTA)。所述有机缓蚀剂形成的抗氧化层会在后述结球端形成步骤中烧除。
本发明并不限制所述焊线的制作方法,但在一实施方式中,本发明可以依序通过下述步骤步骤加工而成:
首先,将蕊线(例如线径介于10至50微米之间的纯铜蕊线或铜合金蕊线),使用热浸镀、蒸镀、溅镀或湿式电镀方法形成锡、锌、镁或铟金属层于蕊线表面(此工艺需注意避免氧化)。
接着,将具有金属层的蕊线进行一热处理工艺。详细言之,可将具有金属层的蕊线连续导入一油槽(其浸泡区长度为7cm)装载有空气不溶的油例如甘油或硅油,温度设定为100~200℃),蕊线导入速度为3cm/sec~30cm/sec(亦即热处理时间为0.2~2.3秒)。此外,可将具有金属层的蕊线导入一热炉(furnace)中(其充满惰性气体或还原气体)。
值得注意的是,此热处理工艺会加速在蕊线/金属层界面区的扩散而加速形成所述扩散层。热处理工艺参数(温度及时间)会影响所形成扩散层的厚度以及浓度分布。
本发明并不限制所述蕊线的制作方法,但在一实施方式中,本发明可以依序通过下述步骤加工而成:
首先,对一板状或块状的纯铜或铜合金胚材进行裁切,以加工成粗线材或直接以连铸(continuous casting)工艺获得粗线材。然后,对粗线材进行抽拉(wiredrawing)工艺,以抽拉成更小直径的细线材;接着,对细线材进行加热退火,以消除细线材内部的应力,增加其延展性及挠曲性;并且,依产品需求选择重复多次抽拉及加热退火的步骤,直到获得所需的预定线径(例如介于10至50微米之间);最后,即可得到所述蕊线。
请参照图4所示,本发明可将上述实施例的焊线100用于电性连接一半导体芯片210至一载板220,其中所述载板220可以是封装等级的多层印刷电路基板或导线架。
更详细来说,所述半导体芯片210的一有源表面上具有数个接垫212(例如铝垫),所述载板220具有数个焊垫222(例如铜垫),且所述载板220承载所述半导体芯片210。
接着,通过一焊针310将本发明的焊线100以电子点火方式处理以形成一结球端(即第一端),并利用所述焊针310将所述结球端热压结合在所述半导体芯片210的接垫212上。
之后,移动所述焊针310以引导所述焊线100至所述载板220的对应焊垫222上方;最后,利用所述焊针310将所述焊线100热压并扯断于所述焊垫222上而形成一尾端(即第二端)。
在上述打线期间,当所述焊线100形成所述结球端时,所述焊针310是以一垂直向的压合力撞击所述接垫212,再以横向的拉力引导所述焊线100,而使所述焊线100呈弧形,最后再扯断所述焊线100形成所述尾端。值得注意的是,本发明的焊线所形成的结球端较软,藉此大幅减少所述接垫212受损的机率。
可以理解的是,图4所示的焊线100可被焊线100’取代。
本发明已由上述相关实施例加以描述,然而上述实施例仅为实施本发明的范例。必需指出的是,已公开的实施例并未限制本发明的范围。相反地,包含于权利要求书的精神及范围的修改及均等设置均包括于本发明的范围内。
Claims (10)
1.一种用于半导体装置的焊线,其特征在于:所述焊线包含:
一蕊线,其包含铜为主要成分;
一金属层,设于所述蕊线上,所述金属为锡、锌、镁或铟;以及
一扩散层,设于所述蕊线与所述金属层之间,所述扩散层由所述蕊线与所述金属层的金属形成。
2.如权利要求1所述的用于半导体装置的焊线,其特征在于:所述焊线另包含一抗氧化层位于所述焊线的最外层。
3.如权利要求1所述的用于半导体装置的焊线,其特征在于:所述焊线另包含一金属氧化层位于所述金属层上,所述金属氧化层由所述金属层部分氧化形成。
4.如权利要求1所述的用于半导体装置的焊线,其特征在于:所述蕊线包含至少99.9重量%的铜。
5.如权利要求1所述的用于半导体装置的焊线,其特征在于:所述蕊线另包含锡、锌、镁或铟。
6.一种半导体装置,其特征在于:所述半导体装置包含:
一载板;
一半导体芯片,设于所述载板;及
一焊线,电性连接所述半导体芯片及所述载板;
其中所述焊线包含:
一蕊线,其包含铜为主要成分;
一金属层,设于所述蕊线上,所述金属为锡、锌、镁或铟;以及
一扩散层,设于所述蕊线与所述金属层之间,所述扩散层由所述蕊线与所述金属层的金属形成。
7.如权利要求6所述的半导体装置,其特征在于:所述焊线另包含一抗氧化层位于所述焊线的最外层。
8.如权利要求6所述的半导体装置,其特征在于:所述焊线另包含一金属氧化层位于所述金属层上,所述金属氧化层由所述金属层部分氧化形成。
9.如权利要求6所述的半导体装置,其特征在于:所述蕊线包含至少99.9重量%的铜。
10.如权利要求6所述的半导体装置,其特征在于:所述蕊线另包含锡、锌、镁或铟。
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CN1643675A (zh) * | 2002-03-26 | 2005-07-20 | 住友电工运泰克株式会社 | 键合线和使用该键合线的集成电路装置 |
CN102130067A (zh) * | 2010-12-31 | 2011-07-20 | 四川威纳尔特种电子材料有限公司 | 一种表面镀钯键合铜丝 |
JP2012156307A (ja) * | 2011-01-26 | 2012-08-16 | Sumitomo Metal Mining Co Ltd | ボンディングワイヤ |
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US10950570B2 (en) | 2014-04-21 | 2021-03-16 | Nippon Steel Chemical & Material Co., Ltd. | Bonding wire for semiconductor device |
EP3086362A1 (en) * | 2015-02-26 | 2016-10-26 | Nippon Micrometal Corporation | Bonding wire for semiconductor devices |
EP3086362A4 (en) * | 2015-02-26 | 2017-05-31 | Nippon Micrometal Corporation | Bonding wire for semiconductor devices |
US10032741B2 (en) | 2015-02-26 | 2018-07-24 | Nippon Micrometal Corporation | Bonding wire for semiconductor device |
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