CN103928344A - Method for improving N-typed DiMOSFET channel mobility based on N-typed nanometer thin layer - Google Patents
Method for improving N-typed DiMOSFET channel mobility based on N-typed nanometer thin layer Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 31
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 46
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 32
- -1 nitrogen ions Chemical class 0.000 claims abstract description 26
- 230000003647 oxidation Effects 0.000 claims abstract description 24
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 24
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 32
- 238000002513 implantation Methods 0.000 claims description 31
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 29
- 239000001301 oxygen Substances 0.000 claims description 14
- 229910052760 oxygen Inorganic materials 0.000 claims description 14
- ATUOYWHBWRKTHZ-UHFFFAOYSA-N Propane Chemical compound CCC ATUOYWHBWRKTHZ-UHFFFAOYSA-N 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 10
- 229920005591 polysilicon Polymers 0.000 claims description 10
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 9
- 239000012159 carrier gas Substances 0.000 claims description 9
- 239000007789 gas Substances 0.000 claims description 9
- 229910000077 silane Inorganic materials 0.000 claims description 9
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 8
- REDXJYDRNCIFBQ-UHFFFAOYSA-N aluminium(3+) Chemical compound [Al+3] REDXJYDRNCIFBQ-UHFFFAOYSA-N 0.000 claims description 8
- 229910000838 Al alloy Inorganic materials 0.000 claims description 6
- 229910001069 Ti alloy Inorganic materials 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 6
- 230000008021 deposition Effects 0.000 claims description 6
- 239000001257 hydrogen Substances 0.000 claims description 6
- 229910052739 hydrogen Inorganic materials 0.000 claims description 6
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims description 6
- 239000012535 impurity Substances 0.000 claims description 6
- 239000007788 liquid Substances 0.000 claims description 6
- 239000001294 propane Substances 0.000 claims description 6
- 125000006850 spacer group Chemical group 0.000 claims description 6
- 238000000407 epitaxy Methods 0.000 claims description 4
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 claims description 3
- 239000001307 helium Substances 0.000 claims description 3
- 229910052734 helium Inorganic materials 0.000 claims description 3
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 3
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 3
- 238000002347 injection Methods 0.000 abstract description 20
- 239000007924 injection Substances 0.000 abstract description 20
- 238000005516 engineering process Methods 0.000 abstract description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 6
- 150000002500 ions Chemical class 0.000 abstract description 6
- 229910052681 coesite Inorganic materials 0.000 abstract description 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 3
- 239000000377 silicon dioxide Substances 0.000 abstract description 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 3
- 229910052682 stishovite Inorganic materials 0.000 abstract description 3
- 229910052905 tridymite Inorganic materials 0.000 abstract description 3
- 230000004913 activation Effects 0.000 abstract 1
- 238000005229 chemical vapour deposition Methods 0.000 description 8
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 6
- 238000000137 annealing Methods 0.000 description 6
- 238000005530 etching Methods 0.000 description 5
- 238000001259 photo etching Methods 0.000 description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 4
- 238000004140 cleaning Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 229910052786 argon Inorganic materials 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 3
- 238000001035 drying Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000004411 aluminium Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 238000009740 moulding (composite fabrication) Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 235000009566 rice Nutrition 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
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Abstract
The invention discloses a method for improving N-typed DiMOSFET channel mobility based on an N-typed nanometer thin layer, the mode of nitrogen injecting of conducting channel layer through injection forming is changed to the mode of nitrogen injecting of conducting channel layer through an N+ epitaxial layer a formed by extension on the basis of an existing ion injection technology. For an N-channel DiMOSFET device, the extension thickness ranges from 10 nm to 20 nm, the doping concentration ranges from 1*10<18> cm<-3> to 1*10<19>cm<-3>, then oxidation is conducted in a gate oxide technology, nitrogen ions are only contained in a gate oxide layer and a Sic interface, and dangling bonds on the surface are reduced. Compared with existing ion injection nitrogen, the epitaxial layer a is introduced, the problems of rough contact interface of SiC and SiO2, high lattice loss, low activation rate and the like due to the nitrogen injection technology are avoided, and the SiC DiMOSFET device which is high in electronic mobility, low in on-resistance and low in power consumption is obtained.
Description
Technical field
The invention belongs to microelectronics technology, relate to one and improve N-type DiMOSFET channel mobility method based on N-type extension.
Background technology
SiC becomes a kind of semi-conducting material having superiority most of manufacturing high temperature, high-power electronic device with its good physicochemical characteristics and electrology characteristic, and has the power device quality factor much larger than Si material.The research and development of SiC power device MOSFET start from the nineties in 20th century, there is the series of advantages such as input impedance is high, switching speed is fast, operating frequency is high, high temperature high voltage resistant, obtained application widely at aspects such as switching power supply, high-frequency heating, automotive electronics and power amplifiers.
But, SiC power MOS (Metal Oxide Semiconductor) device SiC and SiO at present
2contact interface second-rate, highdensity interfacial state and interface roughness cause device channel mobility and conducting resistance serious degradation, even make the performance of the device based on SiC also not reach the performance of the device based on Si.Therefore, how to reduce SiC and SiO by technique and architecture advances
2the coarse and interface state density of contact interface be the problem of relatively enlivening always.
Implantation and high-temperature annealing process are to cause the coarse main cause of SiC MOS device interfaces.Research shows that the roughness of the high annealing rear surface of 1600 degree left and right can increase more than 10 times.Especially for the DiMOSFET of two injections, the interface roughness that Implantation brings, high lattice damage seriously cause mobility to reduce.In order to improve the mobility of raceway groove, the people such as Sarit Dhar propose, before gate oxidation, raceway groove is carried out to nitrogen injection for 2010, then the nitrogen ion that injects channel surface when gate oxidation just can reduce the dangling bonds on SiC/SiO2 surface, reduce the trap at interface, thereby improved the mobility of device.
What this method adopted is, before gate oxidation, raceway groove is carried out to nitrogen Implantation, and then the technique of gate oxidation, to reduce the trap at interface, thus the mobility of raising device.Although adopt the interfacial characteristics that has improved to a certain extent in this way device, due to device channel member has been carried out to secondary ion injection, the SiC bringing and SiO
2coarse, the high lattice damage of contact interface, although mobility has less raising, seriously cause the reliability of gate oxide to reduce, affected the performance of device.
Summary of the invention
The object of the invention is to overcome the defect that above-mentioned technology exists, provide a kind of and improve N-type iMOSFET channel mobility method, the SiC and the SiO that are brought to suppress injection technology based on N-type nano thin-layer
2the impact of series of problems on device performance such as coarse, the high lattice damage of contact interface, low activity ratio, improve the performance of device.The object of the present invention is achieved like this:
Device architecture of the present invention is to make improvement on the people such as Sarit Dhar propose to improve the method for DiMOSFET channel mobility, to change growing n-type nano thin-layer extension into raceway groove N-shaped Implantation, to avoid forming the series of problems such as the interface roughness that raceway groove brought, high lattice damage, low activity ratio by injection technology.Its concrete technical scheme is:
A kind of N-type DiMOSFET device, comprises: grid, SiO from top to bottom
2spacer medium, source electrode, source region N
+contact, P
+contact, JFET region, P trap, N
-drift layer, N
+substrate and drain electrode, wherein, at SiO
2between spacer medium and JFET region, there is N
+epitaxial loayer, described N
+epitaxial loayer, is longitudinally positioned at SiO
2between spacer medium and JFET region, be laterally positioned at two source region N
+between contact, be oxidized to gate oxide with the oxidation of grid oxygen subsequently.
Preferably, described N
+extension accumulation layer thicknesses is 2nm～5nm.
Preferably, described grid adopts the polysilicon of phosphonium ion doping, and doping content is 5 × 10
19cm
-3～1 × 10
20cm
-3.
Preferably, described SiO
2the thickness range of spacer medium is 50nm～100nm.
One improves N-type DiMOSFET channel mobility method based on N-type extension, comprises the following steps:
(1) at N
+the N of 8～9 μ m nitrogen ion dopings grows on silicon carbide substrates sheet
-drift layer, doping content is 1 × 10
15cm
-3～2 × 10
15cm
-3, epitaxial temperature is 1570 DEG C, and pressure is 100mbar, and reacting gas is silane and propane, and carrier gas is pure hydrogen, impurity source is liquid nitrogen;
(2) at the N of nitrogen ion doping
-on drift layer, carry out repeatedly aluminium ion Selective implantation, forming the degree of depth is 0.5 μ m, and doping content is 3 × 10
18cm
-3p trap, implantation temperature is 650 DEG C;
(3) at the N of nitrogen ion doping
-on drift layer, carry out repeatedly nitrogen ion selectivity and inject, forming the degree of depth is 0.2 μ m, and doping content is 1 × 10
19cm
-3n+ source region, implantation temperature is 650 DEG C;
(4) at the N of nitrogen ion doping
-on drift layer, carry out repeatedly aluminium ion Selective implantation, forming the degree of depth is 0.2 μ m, and doping content is 2 × 10
19cm
-3p+ ohmic contact regions, implantation temperature is 650 DEG C;
(5) the N+ nano thin-layer of the nitrogen ion doping that is 2～5nm at the positive epitaxial growth thickness of whole silicon carbide plate, doping content is 1 × 10
18cm
-3～1 × 10
19cm
-3, epitaxial temperature is 1570 DEG C, and pressure is 100mbar, and reacting gas is silane and propane, and carrier gas is pure hydrogen, impurity source is liquid nitrogen;
(6) whole carborundum front is carried out to dry-oxygen oxidation successively, N+ nano thin-layer is oxidized, forms the SiO of 60nm～100nm
2spacer medium, dry-oxygen oxidation temperature is 1200 DEG C;
(7) at SiO
2on spacer medium, deposit forms the polysilicon gate of the phosphonium ion doping of 200nm, and doping content is 5 × 10
19cm
-3～1 × 10
20cm
-3, deposition temperature is 600～650 DEG C, and deposit pressure is 60～80Pa, and reacting gas is silane and hydrogen phosphide, and carrier gas is helium;
(8) the Al/Ti alloy of deposit 300nm/100nm, as the contact metal layer of source electrode and drain electrode, and anneals and within 3 minutes, forms ohmic contact in nitrogen atmosphere at 1100 ± 50 DEG C of temperature.
Preferably, the method that described step (5) is used is epitaxy technique.
Preferably, described step (5) thickness is 3nm.
Preferably, described step (5) doping content is 5 × 10
18cm
-3.
Preferably, rice thin layer in oxidation N+ that described step (6) direct oxidation step (5) is grown, condition be elder generation at 1200 DEG C after dry-oxygen oxidation one hour, then at 950 DEG C wet-oxygen oxidation one hour.
Compared with prior art, beneficial effect of the present invention is:
1) the present invention adopted N-type extension before being oxidized at grid oxygen, instead of adopted injection to form, thereby had suppressed SiC and SiO that injection technology is brought
2the series of problems such as coarse, the high lattice damage of contact interface, low activity ratio.
2) the present invention, owing to adopting N-type extension before the oxidation of grid oxygen, makes SiC and SiO
2interface roughness reduce, thereby reduce the impact of surface scattering on mobility, carrier mobility is significantly increased; Also reduced the conducting resistance of device, the power-dissipation-reduced while making device work, obtains better device performance simultaneously.
3) the present invention adopted N-type extension before being oxidized at grid oxygen, and then oxidized away N-type thin epitaxy, made N element infilter SiC/SiO2 interface, reduce the dangling bonds at interface, thereby reduce the trapped charge at interface, improve the quality at interface, thereby reduced the impact of surface scattering on mobility.
4) the present invention adopts the alternative injection technology of epitaxy technique to carry out nitrogen Implantation to raceway groove on manufacturing, and technique is simple, is easy to realize.
Brief description of the drawings
Fig. 1 is DiMOSFET device architecture schematic diagram.
Fig. 2 is the flow chart that the present invention is based on N-type nano thin-layer and improve N-type DiMOSFET channel mobility method.
Embodiment
Below in conjunction with the drawings and specific embodiments, technical scheme of the present invention is described in more detail.
With reference to Fig. 1, device architecture of the present invention comprises from bottom to top successively: drain metal 1, N
+substrate 2, N
-drift layer 3, P trap 4, JFET region 5, N+ source region 6, P+ contact zone 7, gate oxide 8, polysilicon 9 and gate metal.Wherein, N
+substrate 2 is highly doped silicon carbide substrates; N
+convex district on substrate 2 is the N of 8～9 μ m nitrogen ion dopings
-drift layer 3, doping content is 1 × 10
15cm
-3～2 × 10
15cm
-3; P trap 4 is repeatedly that the degree of depth that aluminium ion Selective implantation forms is 0.5 μ m, and doping content is 3 × 10
18cm
-3region, be positioned at convex N
-the left upper right corner of drift layer 10; Between p trap, N-region is JFET district 5; N+ source region 6 is arranged in two P traps of left and right, is repeatedly that nitrogen ion selectivity injects, and the degree of depth of formation is 0.2 μ m, and doping content is 1 × 10
19cm
-3; P+ contact zone 7 is arranged in P trap and is close to N+ source region, is repeatedly that the degree of depth that aluminium ion Selective implantation forms is 0.5 μ m, and doping content is 2 × 10
19cm
-3region; Gate oxide 8 is the SiO that 50nm～100nm is thick
2layer; Laterally, between left source metal and left source metal, be longitudinally positioned on JFET region 5; Polysilicon gate 1 is the polysilicon of the 200nm phosphonium ion doping that formed by deposit, and doping content is 5 × 10
19cm
-3～1 × 10
20cm
-3, be positioned at SiO
2directly over spacer medium 8; Source metal 10 is Al/Ti alloys of the 300nm/100nm that forms by deposit, is positioned at source region N
+contact 6 and P
+the top of contact 7; Drain electrode 1 is the Al/Ti alloy of the 300nm/100nm that forms by deposit, is positioned at the back side of silicon carbide substrates 2.
With reference to Fig. 2, manufacture method of the present invention is by embodiment explanation below.
Embodiment 1
Step 1. is at N
+epitaxial growth N on silicon carbide substrates sheet
-drift layer.
To N
+silicon carbide substrates sheet 2 adopts RCA cleaning standard to clean, and is then 8 μ m at substrate surface epitaxial growth thickness, and nitrogen ion doping concentration is 1 × 10
15cm
-3n
-drift layer 3, as step 1 in Fig. 2, its process conditions are: epitaxial temperature is 1570 DEG C, and pressure is 100mbar, and reacting gas adopts silane and propane, and carrier gas adopts pure hydrogen, and impurity source adopts liquid nitrogen.
Many aluminium ion Selective implantations of step 2. form P trap.
(2.1) be the SiO of 0.2 μ m by low pressure hot wall CVD (Chemical Vapor Deposition) method in the positive deposit a layer thickness of silicon carbide plate
2layer, and then deposition thickness is the barrier layer that the Al of 1 μ m is used as P trap 4 Implantations, forms P trap injection region by photoetching and etching;
(2.2) under the ambient temperature of 650 DEG C, P trap injection region being carried out to Al Implantation four times, successively adopt the Implantation Energy of 450keV, 300keV, 200keV and 120keV, is 7.97 × 10 by implantation dosage
13cm
-2, 4.69 × 10
13cm
-2, 3.27 × 10
13cm
-2with 2.97 × 10
13cm
-2aluminium ion, be injected into P trap injection region, form the degree of depth be 0.5 μ m, doping content is 3 × 10
18cm
-3p trap 4, as step 2 in Fig. 2;
(2.3) adopt the RCA standard of cleaning to clean silicon carbide, after drying, make the protection of C film; Then in 1700～1750 DEG C of argon atmospheres, carry out ion-activated annealing 10min.
Many nitrogen ion selectivities of step 3. inject and form N+ source region
(3.1) be the SiO of 0.2 μ m by low pressure hot wall CVD (Chemical Vapor Deposition) method in the positive deposit a layer thickness of silicon carbide plate
2layer, and then deposition thickness is the barrier layer that the Al of 1 μ m is used as N+ source region well 6 Implantations, forms injection region, N+ source region by photoetching and etching
(3.2) under the ambient temperature of 650 DEG C, injection region, N+ source region being carried out to nitrogen Implantation twice, successively adopt the Implantation Energy of 80keV, 30keV, is 3.9 × 10 by implantation dosage
14cm
-2, 1.88 × 10
14cm
-2, be injected into injection region, N+ source region, forming the degree of depth is 0.2 μ m, doping content is 1 × 10
19cm
-3n+ source region 6, as step 3 in Fig. 2;
(3.3) adopt the RCA standard of cleaning to clean silicon carbide, after drying, make the protection of C film; Then in 1700～1750 DEG C of argon atmospheres, carry out ion-activated annealing 10min.
Many aluminium ion Selective implantations of step 4. form P+ ohmic contact regions.
(4.1) be the SiO of 0.2 μ m by low pressure hot wall CVD (Chemical Vapor Deposition) method in the positive deposit a layer thickness of silicon carbide plate
2layer, and then deposition thickness is the barrier layer that the Al of 1 μ m is used as P+ contact zone 7 Implantations, forms P+ contact injection region by photoetching and etching;
(4.2) under the ambient temperature of 650 DEG C, P+ contact zone is carried out to Al Implantation twice, the successively Implantation Energy of 90keV, 30keV, is 1.88 × 10 by implantation dosage
14cm
-2, 3.8 × 10
14cm
-2aluminium ion, be injected into injection region, p+ ohmic contact regions, form the degree of depth be 0.2 μ m, doping content is 2 × 10
19cm
-3p+ contact zone 7, as Fig. 2 step 4;
(4.3) adopt the RCA standard of cleaning to clean silicon carbide, after drying, make the protection of C film; Then in 1700～1750 DEG C of argon atmospheres, carry out ion-activated annealing 10min.
Step 5. epitaxial growth N
+nano thin-layer.
Be 3nm at the positive epitaxial growth thickness of silicon carbide plate, doping content is 5 × 10
18cm
-3n
+extension lamination, as a in two, its process conditions are: epitaxial temperature is 1570 DEG C, and pressure is 100mbar, and reacting gas adopts silane and propane, and carrier gas adopts pure hydrogen, and impurity source adopts liquid nitrogen, Fig. 2 step 5.
Step 6. oxidation forms gate oxidation films.
(6.1) first at 1200 DEG C after dry-oxygen oxidation one hour, then at 950 DEG C wet-oxygen oxidation one hour, the oxide-film that to form thickness be 50nm;
(6.2) form SiO by photoetching, etching
2spacer medium 8, Fig. 2 step 6.
It is 5 × 10 that step 7. deposit forms doping content
19cm
-3, the heavily doped polysilicon gate of phosphonium ion that thickness is 200nm.
Polysilicon by low pressure hot wall CVD (Chemical Vapor Deposition) method at the positive deposit growth of carborundum 200nm, then retains the polysilicon on gate oxidation films by photoetching, etching, and forming phosphonium ion doping content is 5 × 10
19cm
-3, the polysilicon gate 9 that thickness is 200nm, as Fig. 2 step 7, its process conditions are: deposition temperature is 600～650 DEG C, and deposit pressure is 60～80Pa, and reacting gas adopts silane and hydrogen phosphide, and carrier gas adopts helium.
Step 8. deposit forms source contact metal layer and drain contact metal level.
(8.1) gluing, development are carried out in the front of whole silicon carbide plate, form N
+and P
+ohmic contact region, the Al/Ti alloy of deposit 300nm/100nm, is peeled off and is made the positive source metal 10 that forms by ultrasonic wave afterwards, as Fig. 2 step 8;
(8.2) at the Al/Ti alloy of substrate back deposit 300nm/100nm as drain electrode 1, as Fig. 2 step 9;
(8.3), at 1100 ± 50 DEG C of temperature, in nitrogen atmosphere, sample annealing is formed to Ohm contact electrode for 3 minutes.
The above; it is only preferably embodiment of the present invention; protection scope of the present invention is not limited to this; any be familiar with those skilled in the art the present invention disclose technical scope in, the simple change of the technical scheme that can obtain apparently or equivalence replace all fall within the scope of protection of the present invention.
Claims (5)
1. improve a N-type DiMOSFET channel mobility method based on N-type nano thin-layer, it is characterized in that, comprise the following steps:
(1) at N
+the N of 8～9 μ m nitrogen ion dopings grows on silicon carbide substrates sheet
-drift layer, doping content is 1 × 10
15cm
-3～2 × 10
15cm
-3, epitaxial temperature is 1570 DEG C, and pressure is 100mbar, and reacting gas is silane and propane, and carrier gas is pure hydrogen, impurity source is liquid nitrogen;
(2) at the N of nitrogen ion doping
-on drift layer, carry out repeatedly aluminium ion Selective implantation, forming the degree of depth is 0.5 μ m, and doping content is 3 × 10
18cm
-3p trap, implantation temperature is 650 DEG C;
(3) at the N of nitrogen ion doping
-on drift layer, carry out repeatedly nitrogen ion selectivity and inject, forming the degree of depth is 0.2 μ m, and doping content is 1 × 10
19cm
-3n+ source region, implantation temperature is 650 DEG C;
(4) at the N of nitrogen ion doping
-on drift layer, carry out repeatedly aluminium ion Selective implantation, forming the degree of depth is 0.2 μ m, and doping content is 2 × 10
19cm
-3p+ ohmic contact regions, implantation temperature is 650 DEG C;
(5) the N+ nano thin-layer of the nitrogen ion doping that is 2～5nm at the positive epitaxial growth thickness of whole silicon carbide plate, doping content is 1 × 10
18cm
-3～1 × 10
19cm
-3, epitaxial temperature is 1570 DEG C, and pressure is 100mbar, and reacting gas is silane and propane, and carrier gas is pure hydrogen, impurity source is liquid nitrogen;
(6) whole carborundum front is carried out to dry-oxygen oxidation successively, N+ nano thin-layer is oxidized, forms the SiO of 60nm～100nm
2spacer medium, dry-oxygen oxidation temperature is 1200 DEG C;
(7) at SiO
2on spacer medium, deposit forms the polysilicon gate of the phosphonium ion doping of 200nm, and doping content is 5 × 10
19cm
-3～1 × 10
20cm
-3, deposition temperature is 600～650 DEG C, and deposit pressure is 60～80Pa, and reacting gas is silane and hydrogen phosphide, and carrier gas is helium;
(8) the Al/Ti alloy of deposit 300nm/100nm, as the contact metal layer of source electrode and drain electrode, and anneals and within 3 minutes, forms ohmic contact in nitrogen atmosphere at 1100 ± 50 DEG C of temperature.
2. improve N-type DiMOSFET channel mobility method according to claim 1 based on N-type nano thin-layer, it is characterized in that, the method that described step (5) is used is epitaxy technique.
3. improve N-type DiMOSFET channel mobility method according to claim 1 based on N-type nano thin-layer, it is characterized in that, described step (5) thickness is 3nm.
4. improve N-type DiMOSFET channel mobility method according to claim 1 based on N-type nano thin-layer, it is characterized in that, described step (5) doping content is 5 × 10
18cm
-3.
5. according to claim 1ly improve N-type DiMOSFET channel mobility method based on N-type nano thin-layer, it is characterized in that, the oxidation N+ nano thin-layer that described step (6) direct oxidation step (5) is grown, condition is first at 1200 DEG C after dry-oxygen oxidation one hour, then at 950 DEG C wet-oxygen oxidation one hour.
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