CN103915400A - 半导体封装件及其制法 - Google Patents

半导体封装件及其制法 Download PDF

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Publication number
CN103915400A
CN103915400A CN201310021830.8A CN201310021830A CN103915400A CN 103915400 A CN103915400 A CN 103915400A CN 201310021830 A CN201310021830 A CN 201310021830A CN 103915400 A CN103915400 A CN 103915400A
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CN
China
Prior art keywords
electric connection
semiconductor package
pads
connection pad
making
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Pending
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CN201310021830.8A
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English (en)
Inventor
洪隆棠
林伟胜
叶孟宏
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Siliconware Precision Industries Co Ltd
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Siliconware Precision Industries Co Ltd
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Publication of CN103915400A publication Critical patent/CN103915400A/zh
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    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
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Abstract

一种半导体封装件及其制法,该半导体封装件,包括具有电性连接垫的承载件、设于该承载件上并具有电极垫的半导体组件、电性连接该电极垫与电性连接垫的导电组件、形成于该导电组件与该电极垫或电性连接垫之间的氟离子、以及形成于该承载件与导电组件上的封装胶体,且形成该电极垫或该电性连接垫的材质为铝材,以通过该氟离子于封装后形成氟化铝,而提高半导体封装件的抗腐蚀性。

Description

半导体封装件及其制法
技术领域
本发明涉及一种半导体封装件及其制法,尤指一种能提升可靠度的半导体封装件及其制法。
背景技术
随着电子产业的蓬勃发展,电子产品也逐渐迈向多功能、高性能的趋势。如图1A所示,其揭示一种现有打线式半导体封装件1,其将具有多个电极垫110的半导体芯片11设于一如导线架或封装基板的承载件10上,再以导线12电性连接该半导体芯片11与该承载件10的电性连接垫100(或导线架的导脚),之后以如环氧树脂的封装胶体13包覆该半导体芯片11与导线12,以通过该封装胶体13保护该半导体芯片11及承载件10,而避免该半导体芯片11及承载件10受外界的水气或污染物侵害。
于现有半导体封装件1中,该封装胶体13含有氯(Cl)离子130(如图1B所示),且该导线12为铜(Cu)线。
此外,相比于金(Au)线,以铜线作为该导线12不仅能降低成本,且具有较佳的导电性及导热性,而使铜线的线径较细及散热效率较佳。
另外现有半导体封装件1于封装后,如图1B(a)所示,于铝(Al)材(即该电性连接垫100与电极垫110的材质)14a与铜材(即该导线12的材质)14b之间将反应产生铝/铜(Al-Cu)合金化合物15,即现有接口合金共化物(Intermetallic Compound,IMC),如下列化学式(1)所示,且该铝/铜合金化合物15将依成份含量分为第一合金部15a与第二合金部15b,即该第一合金部15a的铝含量较多(因靠近铝材14a),而该第二合金部15b的铜含量较多(因靠近铜材14b)。
9Cu+4Al→Cu9Al4………………………………………(1)
之后,如图1B(b)所示,该封装胶体13中的氯离子130会腐蚀该铝/铜合金化合物15,致使该第二合金部15b与该氯离子130产生氯化铝(AlCl3)层16与铜离子140,如下列化学式(2)所示,此外于水气环境下(如高压蒸煮)会产生氢氧根自由基,如下列化学式(3)所示,所以该氢氧根自由基与该氯化铝层16发生化学反应而产生氧化铝(Al2O3)层17及酸性物质,如图1B(c)及下列化学式(4)所示。
Cu9Al4+12Cl-→4AlCl3+9Cu+12e-……………………(2)
H2O+1/2O2+2e-→2OH-…………………………………(3)
AlCl3+3OH-→Al2O3+3HCl+3e-………………………(4)
然而,氧化铝(Al2O3)为一种绝缘物质,其抗腐蚀性不佳,也就是该氧化铝层17容易腐蚀化,致使该氧化铝层17的腐蚀化速度增加,因而造成铜线(即该铜材14b或导线12)剥离,导致该半导体封装件1发生电性断线,以致于产品的可靠度不佳。
因此,如何克服上述现有技术的问题,实已成目前亟欲解决的课题。
发明内容
鉴于上述现有技术的种种缺点,本发明的主要目的在于提供一种半导体封装件及其制法,以通过该氟离子于封装后形成氟化铝,而提高半导体封装件的抗腐蚀性。
本发明的半导体封装件包括:承载件,其具有多个电性连接垫;半导体组件,其设于该承载件上,该半导体组件具有多个电极垫,且形成该电极垫或该电性连接垫的材质为铝材;多个导电组件,其电性连接该电极垫与该电性连接垫;氟离子,其形成于该导电组件与该电极垫之间、或该导电组件与该电性连接垫之间;以及封装胶体,其形成于该承载件与该些导电组件上。
前述的半导体封装件中,该导电组件为铜线或铜凸块。
本发明提供一种半导体封装件的制法,其包括:提供一具有多个电性连接垫的承载件;设置至少一具有多个电极垫的半导体组件于该承载件上,且形成该电极垫或该电性连接垫的材质为铝材;形成氟离子于该些电极垫上或该些电性连接垫上;以多个导电组件电性连接该电极垫与该电性连接垫;以及形成封装胶体于该承载件与该些导电组件上。
前述的制法中,该导电组件为铜线。
本发明还提供一种半导体封装件的制法,其包括:提供一具有多个电性连接垫的承载件、及至少一具有多个电极垫的半导体组件,且形成该电极垫或该电性连接垫的材质为铝材,此外该些电极垫上或该些电性连接垫上具有氟离子;以多个导电组件设置该半导体组件于该承载件上,且该些导电组件电性连接该电极垫与该电性连接垫;以及形成封装胶体于该承载件与该些导电组件上。
前述的制法中,该导电组件为铜凸块。
前述的两种制法中,还包括以有机氟溶液清洗该电极垫或该电性连接垫,再残留微量氟离子,以形成该氟离子。
前述的半导体封装件及其制法中,该导电组件与该电极垫及该电性连接垫之间产生接口合金共化物。
前述的半导体封装件及其制法中,该氟离子以氟化铝的形式存在,例如,形成氟化铝于该导电组件与该电极垫之间、或该导电组件与该电性连接垫之间。
另外,前述的半导体封装件及其制法中,该封装胶体中含有氯离子,所以复包括形成氯化铝于该些电极垫与该些电性连接垫上。
由上可知,本发明的半导体封装件及其制法,通过添加氟离子以形成氟化铝,而能减少现有氯化铝的含量,进而降低氧化铝的形成量,所以相比于现有技术的腐蚀化速率,本发明的腐蚀化速率大幅减缓,且能提高抗腐蚀性的功效,藉以避免导电组件(即铜线或铜凸块)剥离所产生的电性断路的问题。因此,本发明不仅能提升半导体封装件的可靠度,且能延长高压蒸煮信赖性(pressure cooker test)的寿命。
附图说明
图1A为现有半导体封装件的剖视示意图;
图1B为现有半导体封装件的反应流程示意图;
图2A至图2C为本发明的半导体封装件的制法的第一实施例的剖视示意图;
图2D为本发明的半导体封装件的反应流程示意图;以及
图3A至图3B为本发明的半导体封装件的制法的第二实施例的制法的剖视示意图。
符号说明
1,2,3   半导体封装件
10,20   承载件
100,200 电性连接垫
11      半导体芯片
110,210 电极垫
12      导线
13,23   封装胶体
130,230 氯离子
14a,24a 铝材
14b,24b 铜材
140,240 铜离子
15      铝/铜合金化合物
15a,25a 第一合金部
15b,25b 第二合金部
16      氯化铝层
17      氧化铝层
21      半导体组件
22,32   导电组件
25      接口合金共化物
26      化合物层
28      氟离子。
具体实施方式
以下通过特定的具体实施例说明本发明的实施方式,本领域技术人员可由本说明书所揭示的内容轻易地了解本发明的其它优点及功效。
须知,本说明书所附图式所绘示的结构、比例、大小等,均仅用以配合说明书所揭示的内容,以供本领域技术人员的了解与阅读,并非用以限定本发明可实施的限定条件,所以不具技术上的实质意义,任何结构的修饰、比例关系的改变或大小的调整,在不影响本发明所能产生的功效及所能达成的目的下,均应仍落在本发明所揭示的技术内容得能涵盖的范围内。同时,本说明书中所引用的如“上”及“一”等用语,也仅为便于叙述的明了,而非用以限定本发明可实施的范围,其相对关系的改变或调整,在无实质变更技术内容下,当也视为本发明可实施的范畴。
图2A至图2C为本发明的半导体封装件2的制法的第一实施例的剖面示意图。
如图2A所示,设置至少一具有多个电极垫210的半导体组件21于一具有多个电性连接垫200的承载件20上,再形成氟(F)离子28于该些电极垫210与该些电性连接垫200上。
于本实施例中,该承载件20为封装基板,且形成该电极垫210及该电性连接垫200的材质为铝(Al)材,而于另一实施例中,该电极垫210的材质为其它金属材,仅该电性连接垫200的材质为铝(Al)材;也可依需求,仅该电极垫210的材质为铝(Al)材,该电性连接垫200的材质为其它金属材。
此外,于其它实施例中,该承载件20也可为导线架,且导线架的导脚定义为该电性连接垫200。
另外,通过使用稀释的有机氟溶液清洗该电极垫210与该电性连接垫200,再残留微量氟离子28,以形成所述的氟离子28。
如图2B所示,进行打线工艺,令该电极垫210通过多个导电组件22电性连接至该电性连接垫200。
于本实施例中,该导电组件22为铜(Cu)线,所以该导电组件22与该电极垫210及该电性连接垫200之间将产生接口合金共化物(IMC)25(如图2D所示)。
如图2C及图2D所示,形成含有氯(Cl)离子230的封装胶体23于该承载件20上,以包覆该半导体组件21与该些导电组件22。
当封装后,如图2D所示,于铝材(即该电性连接垫200与电极垫210的材质)24a与铜材(即该导电组件22的材质)24b之间将反应产生接口合金共化物25,即铝/铜(Al-Cu)合金化合物,如下列化学式(5)所示,且该接口合金共化物25将依成份含量分为第一合金部25a与第二合金部25b,如图2D(a)所示,该第一合金部25a的铝含量较多(因靠近铝材24a),而该第二合金部25b的铜含量较多(因靠近铜材24b)。
9Cu+4Al→Cu9Al4………………………………………(5)
之后,该第二合金部25b与该封装胶体23中的氯离子230及该氟离子28将产生铜离子240与一含有氯化铝(AlCl3)及氟化铝(AlF3)的化合物层26,如下列化学式(6)所示。
Cu9Al4+12(Cl-+F-)→4(AlCl3+AlF3)+9Cu+12e-……(6)
此外,于水气环境下(如高压蒸煮)会产生氢氧根自由基,所以该氢氧根自由基与该氯化铝发生化学反应而产生氧化铝(Al2O3)。另一方面,因氟化铝的活性较氯化铝的活性稳定,且氟化铝不易溶于水,所以氟化铝不会氧化成氧化铝。
因此,通过形成氟化铝能减少现有腐蚀反应的中间物的量,也就是减少该氯化铝的含量,因而能大幅降低氧化铝的形成量,较佳地,氯化铝的含量少于氟化铝的含量,所以相比于现有氯化铝层,氟化铝能减缓水气对氯离子腐蚀,使该化合物层26的腐蚀化速率大幅减缓,且能提高抗腐蚀性的功效,因而能避免导电组件22剥离所产生的电性断线的问题,不仅能提升本发明的半导体封装件2的可靠度,且能延长铜线高压蒸煮信赖性(pressure cooker test)的寿命。
图3A至图3B为本发明的半导体封装件3的制法第二实施例的剖面示意图。本实施例与第一实施例的差异主要在于导电组件32的结构及封装方式。
如图3A所示,该导电组件32为铜凸块并形成于该些电极垫210上,且该些电极垫210与该些电性连接垫200上具有氟离子28。
于其它实施例中,该导电组件32也可形成于该电性连接垫200上;或者,该导电组件32形成于该电性连接垫200及该电极垫210上。
如图3B所示,以覆晶方式,通过该些导电组件32设置该半导体组件21于该承载件20上,且该些导电组件32电性连接该电极垫210与该电性连接垫200。
接着,形成封装胶体23于该承载件20上,以包覆该半导体组件21与该些导电组件32。
当封装后,如图2D所示,于铝材24a与铜材24b之间将反应产生接口合金共化物25,且该接口合金共化物25将依成份含量分为第一合金部25a与第二合金部25b,该第一合金部25a的铝含量较多,而该第二合金部25b的铜含量较多。之后,该第二合金部25b与该封装胶体23中的氯离子230及该氟离子28将产生铜离子240与一含有氯化铝及氟化铝的化合物层26。
因氟化铝的活性较氯化铝的活性稳定,且氟化铝不易溶于水,所以氟化铝不会氧化成氧化铝。因此,通过形成氟化铝能减少减少该氯化铝的含量,因而能大幅降低氧化铝的形成量,所以该化合物层26的腐蚀化速率大幅减缓,且能提高抗腐蚀性的功效,因而能避免电性断路的问题,不仅能提升产品可靠度,且能延长铜凸块高压蒸煮信赖性的寿命。
另外,有关覆晶封装的方式繁多,不以上述为限,特此述明。
本发明提供一种半导体封装件2,3,其包括:一具有多个电性连接垫200的承载件20、设于该承载件20上的至少一半导体组件21、连结该电性连接垫200至该半导体组件21的多个导电组件22,32、形成于该导电组件22,32与该电性连接垫200之间的氟离子28、以及形成于该承载件20与该导电组件22,32上的封装胶体23。
所述的承载件20中,其形成该电性连接垫200的材质为铝材。
所述的半导体组件21具有多个电极垫210,且形成该电极垫210的材质为铝材。
所述的导电组件22,32电性连接该电极垫210与该电性连接垫200。于一实施例中,该导电组件22为铜线;于另一实施例中,该导电组件32为铜凸块。于一实施例中,该导电组件22,32与该电极垫210及该电性连接垫200之间产生接口合金共化物25,例如,铝/铜合金化合物。
所述的氟离子28复形成于该导电组件22,32与该电极垫210之间,也可以氟化铝(AlF3)的形式存在。
所述的封装胶体23包覆该半导体组件21。于一实施例中,该封装胶体23中含有氯离子230,致使氯化铝(AlCl3)形成于该些电极垫210与该些电性连接垫200上,但其含量少于氟化铝的含量。
综上所述,本发明的半导体封装件及其制法,主要通过添加氟离子以形成氟化铝,且氟化铝不会氧化成氧化铝,因而能减少该氯化铝的含量,以有效降低氧化铝的形成量,所以于含有水气的环境下能大幅减缓氯离子腐蚀接口合金共化物的速率,因而能提高抗腐蚀性的功效,以防止半导体封装件发生电性连接断路。
上述实施例仅用以例示性说明本发明的原理及其功效,而非用于限制本发明。任何本领域技术人员均可在不违背本发明的精神及范畴下,对上述实施例进行修改。因此本发明的权利保护范围,应如权利要求书所列。

Claims (15)

1.一种半导体封装件,包括:
承载件,其具有多个电性连接垫;
半导体组件,其设于该承载件上,该半导体组件具有多个电极垫,且形成该电极垫或该电性连接垫的材质为铝材;
多个导电组件,其电性连接该电极垫与该电性连接垫;
氟离子,其形成于该导电组件与该电极垫之间、或该导电组件与该电性连接垫之间;以及
封装胶体,其形成于该承载件与该些导电组件上。
2.根据权利要求1所述的半导体封装件,其特征在于,该导电组件为铜线或铜凸块。
3.根据权利要求1所述的半导体封装件,其特征在于,该导电组件与该电极垫及该电性连接垫之间产生接口合金共化物。
4.根据权利要求1所述的半导体封装件,其特征在于,该封装胶体中含有氯离子。
5.根据权利要求4所述的半导体封装件,其特征在于,该半导体封装件还包括氯化铝,其形成于该些电极垫与该些电性连接垫上。
6.根据权利要求1所述的半导体封装件,其特征在于,该氟离子以氟化铝的形式存在。
7.一种半导体封装件的制法,其包括:
提供一具有多个电性连接垫的承载件;
设置至少一具有多个电极垫的半导体组件于该承载件上,且形成该电极垫或该电性连接垫的材质为铝材;
形成氟离子于该些电极垫上或该些电性连接垫上;
以多个导电组件电性连接该电极垫与该电性连接垫;以及
形成封装胶体于该承载件与该些导电组件上。
8.根据权利要求7所述的半导体封装件的制法,其特征在于,该导电组件为铜线。
9.一种半导体封装件的制法,其包括:
提供一具有多个电性连接垫的承载件、及至少一具有多个电极垫的半导体组件,且形成该电极垫或该电性连接垫的材质为铝材,此外该些电极垫上或该些电性连接垫上具有氟离子;
以多个导电组件设置该半导体组件于该承载件上,且该些导电组件电性连接该电极垫与该电性连接垫;以及
形成封装胶体于该承载件与该些导电组件上。
10.根据权利要求9所述的半导体封装件的制法,其特征在于,该导电组件为铜凸块。
11.根据权利要求7或9所述的半导体封装件的制法,其特征在于,该导电组件与该电极垫及该电性连接垫之间产生接口合金共化物。
12.根据权利要求7或9所述的半导体封装件的制法,其特征在于,该制法还包括以有机氟溶液清洗该电极垫或该电性连接垫,再残留微量氟离子,以形成该氟离子。
13.根据权利要求7或9所述的半导体封装件的制法,其特征在于,该制法还包括形成氟化铝于该导电组件与该电极垫之间、或该导电组件与该电性连接垫之间。
14.根据权利要求7或9所述的半导体封装件的制法,其特征在于,该封装胶体中含有氯离子。
15.根据权利要求14所述的半导体封装件的制法,其特征在于,该制法还包括形成氯化铝于该些电极垫或该些电性连接垫上。
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090184319A1 (en) * 2008-01-22 2009-07-23 Sang-Gab Kim Display substrate and a method of manufacturing the display substrate
US20110049703A1 (en) * 2009-08-25 2011-03-03 Jun-Chung Hsu Flip-Chip Package Structure
US20110278736A1 (en) * 2008-12-12 2011-11-17 Stats Chippac, Ltd. Semiconductor Device and Method of Forming a Vertical Interconnect Structure for 3-D FO-WLCSP
US20120001336A1 (en) * 2010-07-02 2012-01-05 Texas Instruments Incorporated Corrosion-resistant copper-to-aluminum bonds
CN102651373A (zh) * 2011-02-23 2012-08-29 索尼公司 半导体器件的制造方法、半导体器件和电子装置
WO2012148967A2 (en) * 2011-04-25 2012-11-01 Air Products And Chemicals, Inc. Cleaning lead-frames to improve wirebonding process
US20120299182A1 (en) * 2010-02-03 2012-11-29 Tomohiro Uno Copper bonding wire for semiconductor and bonding structure thereof

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9117756B2 (en) * 2012-01-30 2015-08-25 Freescale Semiconductor, Inc. Encapsulant with corrosion inhibitor

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090184319A1 (en) * 2008-01-22 2009-07-23 Sang-Gab Kim Display substrate and a method of manufacturing the display substrate
US20110278736A1 (en) * 2008-12-12 2011-11-17 Stats Chippac, Ltd. Semiconductor Device and Method of Forming a Vertical Interconnect Structure for 3-D FO-WLCSP
US20110049703A1 (en) * 2009-08-25 2011-03-03 Jun-Chung Hsu Flip-Chip Package Structure
US20120299182A1 (en) * 2010-02-03 2012-11-29 Tomohiro Uno Copper bonding wire for semiconductor and bonding structure thereof
US20120001336A1 (en) * 2010-07-02 2012-01-05 Texas Instruments Incorporated Corrosion-resistant copper-to-aluminum bonds
CN102651373A (zh) * 2011-02-23 2012-08-29 索尼公司 半导体器件的制造方法、半导体器件和电子装置
WO2012148967A2 (en) * 2011-04-25 2012-11-01 Air Products And Chemicals, Inc. Cleaning lead-frames to improve wirebonding process

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