CN103887257A - 低寄生电感电力电子模块封装结构 - Google Patents

低寄生电感电力电子模块封装结构 Download PDF

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Publication number
CN103887257A
CN103887257A CN201210570350.2A CN201210570350A CN103887257A CN 103887257 A CN103887257 A CN 103887257A CN 201210570350 A CN201210570350 A CN 201210570350A CN 103887257 A CN103887257 A CN 103887257A
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China
Prior art keywords
electronic module
power electronic
parasitic inductance
packaging structure
power
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Pending
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CN201210570350.2A
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English (en)
Inventor
谷彤
盛况
汪涛
郭清
谢刚
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Zhejiang University ZJU
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Zhejiang University ZJU
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Priority to CN201210570350.2A priority Critical patent/CN103887257A/zh
Publication of CN103887257A publication Critical patent/CN103887257A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

低寄生电感电力电子模块封装结构，本发明涉及电力电子技术领域，尤其涉及适合应用于大功率电力半导体模块、功率控制电路、智能功率组件和高频开关电源等。针对现有电力电子模块封装结构寄生电感较大的问题，使用水平支架结构，使这种新型电力电子模块封装结构和传统结构相比，具有更低的寄生电感和更小的体积。

Description

低寄生电感电力电子模块封装结构
技术领域
本发明涉及电力电子技术领域，尤其涉及适合应用于大功率电力半导体模块、功率控制电路、智能功率组件和高频开关电源等，具体是涉及一种电力电子功率模块封装结构。
背景技术
传统的电力电子模块封装结构如图1所示，芯片1固定于DBC板2上，DBC板2固定于基板3上，然后通过导线和导电桥连接芯片和DBC板上铜层电路。DBC板上铜层电路和支架相连，从而达到电性的连接。整个导电回路由支架及DBC板上铜层电路构成。导电回路存在寄生电感。
发明内容
本发明的目的在于针对现有电力电子模块封装结构在应用中的不足，提供一种电力电子模块封装结构，这种新型电力电子模块封装结构和传统结构相比，具有更低的寄生电感和更小的体积。
为解决上述技术问题，本发明采用如下方案是：
使用水平支架结构，支架水平连接于DBC板上铜层电路，使电力电子模块导电回路面积减小，减小其寄生电感。电力电子模块高度减小，缩小其体积。
本发明由于采用水平支架结构，具有以下显著技术效果：
①与传统电力电子模块封装结构相比，新型电力电子模块封装结构具有更低的寄生电感。
②与传统电力电子模块封装结构相比，新型电力电子模块封装结构具有更小的体积。
附图说明
图1是传统电力电子模块封装结构图；
图2是本发明电力电子模块封装结构图。
其中：1-芯片、2-DBC板、3-基板、4-支架。
具体实施方式
下面结合附图对本发明作进一步描述。
一种电力电子模块封装结构，如图2所示，芯片1固定于DBC板2上，DBC板2固定于基板3上，然后通过导线和导电桥连接芯片和DBC板上铜层电路。水平支架4与DBC板上铜层电路相连，从而达到电性的连接。
最后，还需要注意的是，以上实施例子仅是本发明的具体实施例子，显然，本发明不限于以上实施例子，还可以有许多变形。本领域的普通技术人员能从本发明公开的内容直接导出或联想到的所有变形，均应认为是本发明的保护范围。

Claims (1)

1.一种新型电力电子模块封装结构，其特征在于：支架水平连接于DBC板。
CN201210570350.2A 2012-12-20 2012-12-20 低寄生电感电力电子模块封装结构 Pending CN103887257A (zh)

Priority Applications (1)

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CN201210570350.2A CN103887257A (zh) 2012-12-20 2012-12-20 低寄生电感电力电子模块封装结构

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CN201210570350.2A CN103887257A (zh) 2012-12-20 2012-12-20 低寄生电感电力电子模块封装结构

Publications (1)

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CN103887257A true CN103887257A (zh) 2014-06-25

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1705107A (zh) * 2004-05-31 2005-12-07 三洋电机株式会社 电路装置
CN1836328A (zh) * 2003-08-14 2006-09-20 国际整流器公司 用于epas/ehpas应用的模块
CN102097416A (zh) * 2010-11-04 2011-06-15 嘉兴斯达微电子有限公司 一种新型封装结构的大功率模块
CN201946588U (zh) * 2010-12-30 2011-08-24 比亚迪股份有限公司 一种功率半导体器件的封装结构
CN202034367U (zh) * 2011-03-04 2011-11-09 南京银茂微电子制造有限公司 一种无焊接端子的功率模块

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1836328A (zh) * 2003-08-14 2006-09-20 国际整流器公司 用于epas/ehpas应用的模块
CN1705107A (zh) * 2004-05-31 2005-12-07 三洋电机株式会社 电路装置
CN102097416A (zh) * 2010-11-04 2011-06-15 嘉兴斯达微电子有限公司 一种新型封装结构的大功率模块
CN201946588U (zh) * 2010-12-30 2011-08-24 比亚迪股份有限公司 一种功率半导体器件的封装结构
CN202034367U (zh) * 2011-03-04 2011-11-09 南京银茂微电子制造有限公司 一种无焊接端子的功率模块

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Application publication date: 20140625