CN103871981A - 具有经改造的散热器的低外形芯片封装 - Google Patents

具有经改造的散热器的低外形芯片封装 Download PDF

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CN103871981A
CN103871981A CN201310683570.0A CN201310683570A CN103871981A CN 103871981 A CN103871981 A CN 103871981A CN 201310683570 A CN201310683570 A CN 201310683570A CN 103871981 A CN103871981 A CN 103871981A
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radiator
chamber
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substrate
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尚塔努·卡尔丘里
翟军
张蕾蕾
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Nvidia Corp
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
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    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

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Abstract

公开了具有经改造的散热器的低外形芯片封装。集成电路系统包括热耦连到半导体芯片并且具有形成在散热器中的腔或开口的散热器。腔或开口经定位使得安装到与半导体芯片相同的封装衬底的电容器和/或其它无源部件至少部分地布置在腔或开口中。因为无源部件布置在腔或开口中,所以集成电路系统具有经降低的封装厚度。

Description

具有经改造的散热器的低外形芯片封装
技术领域
本发明的实施例总地涉及集成电路芯片封装,并且更具体地,涉及具有经改造的散热器的低外形芯片封装。
背景技术
在集成电路(IC)芯片的封装中,总地需要最小化芯片封装的大小和厚度。在移动计算设备中,诸如智能电话、膝上型计算机、电子平板电脑等等,特别需要最小化IC封装的厚度,使得这类移动设备在大小和重量方面进一步降低。然而,一般而言,典型IC封装的厚度由于芯片封装的各部件之间的机械干扰而不能容易地降低。这特别适用于包括安装到与IC芯片相同的衬底的电容器或其它无源器件的IC封装,因为这类外部器件可能比IC芯片自身对IC封装的厚度贡献更多,从而限制IC封装的最小厚度。
因此,本领域存在对于具有经降低的厚度的IC封装的需要。
发明内容
本发明的一个实施例阐述了具有经降低的封装厚度的集成电路系统。IC系统包括热耦连到半导体芯片的散热器,并且该散热器具有形成在散热器中的腔或开口。腔或开口经定位使得安装到封装衬底的电容器和/或其它无源部件至少部分地布置在腔或开口中。
本发明的一个优势在于,消除了安装在封装衬底上的无源器件与散热器之间的干扰,使得IC系统的厚度仅受IC芯片和散热器的厚度限制。
附图说明
因此,可以详细地理解本发明的上述特征,并且可以参考实施例得到对如上面所简要概括的本发明更具体的描述,其中一些实施例在附图中示出。然而,应当注意的是,附图仅示出了本发明的典型实施例,因此不应被认为是对其范围的限制,本发明可以具有其他等效的实施例。
图1是根据本发明的一个实施例所安排的集成电路系统的示意性立体图。
图2是以图1中的剖面A-A取得的、图1中的IC系统的示意性剖视图。
图3是根据本发明的另一个实施例所安排的IC系统的示意性剖视图。
图4示出了其中可以实现本发明的一个或多个实施例的计算设备。
为了清晰起见,同样的参考数字已经在适用的地方用来指明各图之间公共的同样的元件。应预期到的是,一个实施例的特征可以包含在其它实施例中而无需进一步陈述。
具体实施方式
图1是根据本发明的一个实施例所安排的集成电路(IC)系统100的示意性立体图。IC系统100包括(图2示出的)IC芯片以及构造为将IC芯片电地和机械地连接到印刷电路板的相关联的封装组件150。如所示,IC系统100进一步包括具有形成在其中的一个或多个开口152的散热器151。
图2是以图1中的剖面A-A取得的、IC系统100的示意性剖视图。IC系统100包括IC芯片120、一个或多个无源部件130以及封装组件150。封装组件150包括散热器151、形成在其中的开口152、封装衬底153以及封装引脚154。
IC芯片120是半导体芯片,诸如中央处理单元(CPU)、图形处理单元(GPU)、应用处理器、存储器设备或其它逻辑设备、片上系统或在操作期间生成足以从散热器151的使用获益的热量的任何半导体芯片。一般地,IC芯片120是不包含在芯片载体或封装中的未经密封的裸片。此外,IC芯片120安装在封装衬底153上并且电连接到封装衬底153。在图2示出的实施例中,IC芯片120经由焊合到形成在封装衬底153上的结合焊盘的微凸块而电连接到电封装衬底153。然而,IC芯片120和封装衬底153之间的电连接可以使用本领域公知的任何技术上可行的方法来进行而不超出本发明的范围。底部填充、重叠模塑(overmold)或任何其它技术上可行的封装技术可以用来保护IC芯片120和封装衬底153之间的电连接。
无源部件130也安装在封装衬底153上并且电连接到封装衬底153,并且可以包括解耦电容器、电阻器、电感器或安装到封装衬底153的任何其它无源电部件。解耦电容器典型地用来降低在操作期间的到IC芯片120的信号连接和电力中的噪声,安装在封装衬底153上的电感器和电阻器可以用来实施类似功能。由于诸如IC芯片120的IC芯片的大小在厚度方面逐渐降低,所以安装在封装衬底153上的无源部件130可能比IC芯片120在封装衬底153上方延伸更远。特别地,无源部件130的高度135可能大于IC芯片120的厚度125。因此,IC系统100的最小厚度105受无源部件130的高度135限制,而不是受IC芯片120的厚度125限制。然而,根据本发明的实施例,腔或槽152形成在散热器151中并且与无源部件130对齐,使得无源部件130部分地布置在所述腔或槽152中。以这种方式,无源部件130的高度135可以大于IC芯片120的厚度125而不增加IC系统100的最小厚度105。
封装组件150保护IC芯片120免受环境潮湿和其它沾污,最小化对IC芯片120的机械冲击和应力,并且促进IC芯片120与印刷电路板或IC系统100外部的其它安装衬底之间的电连接。封装组件150的散热器151热耦连到IC芯片120以增强由IC芯片120所生成的热量的发散。在一些实施例中,散热器151由具有相对高热导率(thermal conductivity)的单片金属形成,诸如经冲压的铜或铝板。对于散热器151适合的材料包括铜、铝或具有至少等于铝的热导率的热导率的任何其它金属,即至少大约230Wm-1K-1
在一些实施例中,散热器151通过与其直接接触进行放置来热耦连到IC芯片120。在图2示出的实施例中,散热器151经由布置在散热器151和IC芯片120之间的热界面材料159而热耦连到IC芯片120。热界面材料159是构造为最大化IC芯片120和散热器151之间的热传导的薄层导热材料。对于热界面材料159适合的材料包括导热凝胶、热油脂、焊料或导热板,诸如可机械压缩的间隙垫。
此外,散热器151包括一个或多个腔或开口,诸如槽152,其与安装在封装衬底150上的一个或多个部件对齐,所述部件诸如无源部件130。因为槽152与无源部件130对齐,所以无源部件130部分地布置在槽152中并且IC系统100的最小厚度105显著降低。在一些实施例中,散热器151中的这类开口或腔延伸完全穿过散热器151,如图1和2所示。在这类实施例中,槽152可以通过任何技术上可行的方法来形成,诸如机加工(machining)、冲压(stamping)等等。在其它实施例中,形成在散热器151中的腔不一定延伸穿过散热器151。下文结合图3描述了一个这类实施例。
封装衬底153给IC系统100提供结构刚性以及电接口用于路由IC芯片120与印刷电路板或其它安装器件之间的输入和输出信号和电力。封装衬底153一般是刚性的并且典型地是IC芯片120安装在其上的热绝缘衬底。在一些实施例中,封装衬底153是基于层压板的衬底并且包括累积在核心153B的顶面和底面上的积层(build-up layer)153A或层压板的堆叠。形成在积层153A中的互连层和形成在核心153B中的导电过孔153C提供IC芯片120与封装引脚154之间的导电线路。虽然图2示出的IC系统100的实施例包括核心153B的每个表面上的两个积层153A,但是应该理解的是,封装衬底153可以反而具有更多或更少积层153A而不超出本发明的范围。此外,在一些实施例中,封装衬底153包括用于IC芯片120和无源部件130的安装的任何适合的衬底结构。例如,在一些实施例中,封装衬底153可以是内插件(interposer)衬底而不是基于层压板的封装衬底。在这类实施例中,内插件衬底可以由具有形成在其上的一层或多层互连的半导体晶片形成,并且可以包括硅通孔以促进从内插件的一侧到另一侧的电连接。
封装引脚154提供IC系统100与IC系统100外部的安装衬底之间的电连接,所述安装衬底诸如印刷电路板。封装引脚154可以包括本领域公知的任何技术上可行的芯片封装电连接,包括球形网格阵列(BGA)、插针网格阵列(PGA)等等。
图3是根据本发明的另一个实施例所安排的、IC系统300的示意性剖视图。IC系统300在组织和操作方面与图2中的IC系统100大致类似,并且包括IC芯片120、一个或多个无源部件130以及封装组件350。封装组件350与图2中的封装组件150不同,因为封装组件350包括散热器351,散热器351中具有形成在其中的腔352而不是完全穿过散热器351所形成的开口。如所示,腔352与无源部件130对齐,使得无源部件130部分地布置在其中,从而降低IC系统300的最小厚度105。腔352可以通过机加工或通过本领域公知的任何技术上可行的方法来形成。
图4示出了其中可以实现本发明的一个或多个实施例的计算设备。特别地,图4是具有根据本发明的实施例所构造的经封装的半导体器件420的计算机系统400的框图。如所示,计算机系统400包括存储器410和耦连到存储器410的经封装的半导体器件420。计算机系统400可以是台式计算机、膝上型计算机、智能电话、数字平板电脑、个人数字助理或其它技术上可行的计算设备。存储器410可以包括易失性、非易失性和/或可移动存储器元件,诸如随机存取存储器(RAM)、只读存储器(ROM)、磁性或光学硬盘驱动器、闪存驱动器等等。经封装的半导体器件420在组织和操作方面与上文关于图1-3所描述的IC系统100或200大致类似,并且可以包括CPU、GPU、应用处理器或其它逻辑设备、或任何其它含芯片的设备。
总而言之,本发明的实施例阐述了具有经降低的封装厚度的IC系统。IC系统包括散热器,散热器热耦连到半导体芯片并且具有形成在散热器中并且经安置使得安装到封装衬底的电容器和/或其它无源器件至少部分地布置在腔或开口中的腔或开口。有利地,这类IC系统的厚度受IC芯片的厚度的限制,而不是受安装在与IC芯片相同的封装衬底上的无源部件的高度的限制。
虽然上述内容针对本发明的实施例,但可对本发明的其他和进一步的实施例进行设计而不脱离其基本范围,并且其基本范围由下面的权利要求来确定。

Claims (10)

1.一种系统,包括:
半导体裸片,其安装在封装衬底上;
散热器,其具有热耦连到所述半导体裸片的其表面的一部分以及形成在所述表面中的腔;以及
无源器件,其安装在所述衬底上并且至少部分地布置在所述腔内。
2.根据权利要求1所述的系统,进一步包括布置在所述散热器和所述半导体裸片之间的热界面材料。
3.根据权利要求1所述的系统,其中所述半导体裸片包括中央处理单元和图形处理单元之一。
4.根据权利要求1所述的系统,其中所述衬底包括封装衬底和封装内插件中的一个。
5.根据权利要求1所述的系统,其中所述无源器件包括以下各项中的一个:电容器、电阻器以及电感器。
6.根据权利要求1所述的系统,其中所述散热器包括具有等于或大于大约230W m-1K-1的热导率的材料。
7.根据权利要求1所述的系统,进一步包括安装在所述衬底上的多个无源器件,以及形成在所述表面中的多个腔,其中每个无源器件至少部分地布置在所述腔中的一个内。
8.根据权利要求1所述的系统,其中所述腔包括延伸穿过所述散热器的开口。
9.根据权利要求1所述的系统,其中所述半导体裸片比所述无源器件更短。
10.根据权利要求1所述的系统,进一步包括安装到所述衬底并且至少部分地布置在所述腔内的第二无源器件。
CN201310683570.0A 2012-12-13 2013-12-12 具有经改造的散热器的低外形芯片封装 Pending CN103871981A (zh)

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TW201431016A (zh) 2014-08-01

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