CN103825701B - Method for classical Qi chaotic switching system with different fractional orders and circuit - Google Patents

Abstract

The present invention provides a method and a circuit for realizing a classical Qi chaotic switching system with different fractional orders. Operational amplifier U1, operational amplifier U2, resistors and capacitors are used to form an inverting adder and fractional inverting integrators of different orders. Utilize multiplier U3, multiplier U4 and multiplier U6 to realize multiplication operation, utilize analog switch U5 to realize the selection output of analog signal, described operational amplifier U1 and operational amplifier U2 adopt LF347D, described multiplier U3, multiplier U4 and multiplier The device U6 adopts AD633JN, the analog switch U5 adopts ADG888, the operational amplifier U1 is connected to the multiplier U3, the multiplier U4, the multiplier U6 and the analog switch U5, and the operational amplifier U2 is connected to the multiplier U3, the multiplier U6 and the analog switch U5, the multiplier U3 is connected to the operational amplifier U1, the multiplier U4 is connected to the operational amplifier U2, the analog switch U5 is connected to the operational amplifier U1 and the operational amplifier U2, the multiplier U6 is connected to the operational amplifier U1, and a The new switching method and circuit of the new chaotic system provide a new idea for increasing the switching types of the chaotic system and applying the chaotic system to engineering practice.

Description

A method and circuit for realizing classical Qi chaotic switching systems with different fractional orders

technical field

The invention relates to a chaotic system and circuit realization, in particular to a method and a circuit for realizing classical Qi chaotic switching systems with different fractional orders.

Background technique

At present, the existing methods and circuits for switching chaotic systems mainly include the switching between different linear items or nonlinear items in the chaotic system, and the fractional order form based on these two switching modes. Regarding the fractional order chaos of different orders The switching method and circuit of the system have not been proposed yet. The present invention proposes a classical Qi chaotic switching system method and circuit with different fractional orders. The present invention proposes a novel switching method and circuit of a novel chaotic system. The switching type of chaotic system and the application of this chaotic system in engineering practice provide a new way of thinking.

Contents of the invention

The technical problem to be solved in the present invention is to provide a method and a circuit for realizing a classical Qi chaotic switching system with different fractional orders. The present invention adopts the following technical means to achieve the purpose of the invention:

1, a kind of method that realizes the different classical Qi chaotic switching system of fractional order, it is characterized in that, comprises the following steps:

(1) The equation of the classical Qi chaotic system i is:

$\left\{\begin{array}{ccc}\mathrm{<span\; class="notranslate">\; dx</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; yz</span>}& & \\ \mathrm{<span\; class="notranslate">\; dy</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&alpha;x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; xz</span>}& \mathrm{<span\; class="notranslate">\; i</span>}& \mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 35</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&beta;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 80</span>}\\ \mathrm{<span\; class="notranslate">\; dz</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; xy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&beta;z</span>}& & \end{array}\right.$

(2) The equation of the 0.9-order classical Qi chaotic system ii is:

$\left\{\begin{array}{ccc}{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; yz</span>}& & \\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&alpha;x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; xz</span>}& \mathrm{<span\; class="notranslate">\; i</span>}& \mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 35</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&beta;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 80</span>}\\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; xy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&beta;z</span>}& & \end{array}\right.$

(3) The equation of the 0.1-order classical Qi chaotic system iii is:

$\left\{\begin{array}{ccc}{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.1</span>}}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; yz</span>}& & \\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.1</span>}}\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&alpha;x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; xz</span>}& \mathrm{<span\; class="notranslate">\; iii</span>}& \mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 35</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&beta;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 80</span>}\\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.1</span>}}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; xy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&beta;z</span>}& & \end{array}\right.$

(4) Construct switching function q=f(x), where the expression iv of f(x) is:

$\mathrm{<span\; class="notranslate">\; q</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\left\{\begin{array}{cc}\mathrm{<span\; class="notranslate">\; 0.9</span>}& \mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; ></span>\mathrm{<span\; class="notranslate">\; 0</span>}\\ \mathrm{<span\; class="notranslate">\; 0.1</span>}& \mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; 0</span>}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; iv</span>}$

(5) Constructing a classical Qi chaotic switching system v with different fractional orders from ii, iii and iv is:

$\begin{array}{cc}\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; yz</span>}\\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&alpha;x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; xz</span>}\\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; xy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&beta;z</span>}\end{array}\right.& \mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 35</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&beta;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 80</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; q</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\left\{\begin{array}{cc}\mathrm{<span\; class="notranslate">\; 0.9</span>}& \mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; ></span>\mathrm{<span\; class="notranslate">\; 0</span>}\\ \mathrm{<span\; class="notranslate">\; 0.1</span>}& \mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; 0</span>}\end{array}\right.\end{array}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; v</span>}$

(6) Construct an analog circuit system according to the classical Qi chaotic switching system v with different fractional orders, and use operational amplifier U1, operational amplifier U2, resistors and capacitors to form an inverting adder and fractional inverting integrators of different orders. Multiplier U3, multiplier U4 and multiplier U6 realize multiplication, utilize analog switch U5 to realize the selection output of analog signal, described operational amplifier U1 and operational amplifier U2 adopt LF347D, described multiplier U3, multiplier U4 and multiplier U6 adopts AD633JN, the analog switch U5 adopts ADG888, the operational amplifier U1 is connected to the multiplier U3, the multiplier U4, the multiplier U6 and the analog switch U5, and the operational amplifier U2 is connected to the multiplier U3, the multiplier U6 and the analog switch U5, the multiplier U3 is connected to the operational amplifier U1, the multiplier U4 is connected to the operational amplifier U2, the analog switch U5 is connected to the operational amplifier U1 and the operational amplifier U2, and the multiplier U6 is connected to the operational amplifier U1;

The first pin of the operational amplifier U1 is connected to the second pin of the operational amplifier U1 through a resistor R3, and connected to the sixth pin of the operational amplifier U1 through a resistor R8, and the third, fifth, and tenth pins of the operational amplifier U1 are , Pin 12 is grounded, pin 4 is connected to VCC, pin 11 is connected to VEE, pin 6 of operational amplifier U1 is connected in parallel with resistor Ry11 and capacitor Cy11, connected in parallel with resistor Ry12 and capacitor Cy12, and then connected with resistor Ry13 After connecting in parallel with the capacitor Cy13, connect the 7th pin of the analog switch U5, through the parallel connection of the resistor Ry21 and the capacitor Cy21, connect the parallel connection of the resistor Ry22 and the capacitor Cy22, then connect the parallel connection of the resistor Ry23 and the capacitor Cy23, and then connect the analog The 5th pin of the switch U5, the 7th pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor R2, the 6th pin of the operational amplifier U1 is connected through the resistor R4, and the 3rd pin of the multiplier U4 Pin, connected to the first pin of the multiplier U6, the eighth pin of the operational amplifier U1 connected to the second pin of the operational amplifier U1 through the resistor R5, connected to the ninth pin of the operational amplifier U1 through the resistor R6, and connected to the operational amplifier U2 The 2nd pin of the multiplier U3 is connected to the 1st pin of the multiplier U4, the 9th pin of the operational amplifier U1 is connected in parallel with the resistor Rx11 and the capacitor Cx11, and connected to the resistor Rx12 and the capacitor Cx12 Parallel connection, then connect the parallel connection of resistor Rx13 and capacitor Cx13, then connect the second pin of analog switch U5, through the parallel connection of resistor Rx21 and capacitor Cx21, connect the parallel connection of resistor Rx22 and capacitor Cx22, and then connect the connection of resistor Rx23 and capacitor Cx23 After parallel connection, connect the 4th pin of the analog switch U5, the 14th pin of the operational amplifier U1 to the 13th pin of the operational amplifier U1 through the resistor R1, and the 9th pin of the operational amplifier U1 through the resistor R7;

The 6th and 7th pins of the operational amplifier U2 are suspended, the 3rd, 5th, 10th, and 12th pins of the operational amplifier U2 are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 11th pin of the operational amplifier U2 is connected to VEE. The first pin is connected to the ground through the series connection of resistors R14 and R15, connected to the 8th and 9th pins of the analog switch U5 through R14, the 8th pin of the operational amplifier U2 is connected to the 9th pin of the operational amplifier U2 through the resistor R12, and then multiplied The 3rd pin of the multiplier U3 is connected to the 3rd pin of the multiplier U6, and the 9th pin of the operational amplifier U2 is connected to the parallel connection of the resistor Rz11 and the capacitor Cz11, connected to the parallel connection of the resistor Rz12 and the capacitor Cz12, and then connected to the resistor Rz13 and the capacitor After the parallel connection of Cz13, connect the 10th pin of the analog switch U5, through the parallel connection of the resistor Rz21 and the capacitor Cz21, connect the parallel connection of the resistor Rz22 and the capacitor Cz22, then connect the parallel connection of the resistor Rz23 and the capacitor Cz23, and then connect the analog switch U5 The 12th pin of the operational amplifier U2, the 14th pin of the operational amplifier U2 is connected to the 13th pin of the operational amplifier U2 through the resistor R11, and the 9th pin of the operational amplifier U2 is connected through the resistor R13;

The first pin of the multiplier U3 is connected to the eighth pin of the operational amplifier U1, the third pin is connected to the eighth pin of the operational amplifier U2, the second, fourth, and sixth pins are all grounded, and the fifth pin is connected to the eighth pin of the operational amplifier U2. VEE, the 7th pin is connected to the 6th pin of the operational amplifier U1 through the resistor R9, and the 8th pin is connected to VCC;

The first pin of the multiplier U4 is connected to the 8th pin of the operational amplifier U1, the 3rd pin is connected to the 7th pin of the operational amplifier U1, the 2nd, 4th and 6th pins are all grounded, and the 5th pin is connected to the VEE, the 7th pin is connected to the 13th pin of the operational amplifier U2 through the resistor R10, and the 8th pin is connected to VCC;

The first pin of the analog switch U5 is connected to VCC, the 16th pin is grounded, the 13th, 14th and 15th pins are suspended, the 3rd pin is connected to the 8th pin of the operational amplifier U1, and the 6th pin is connected to the operational amplifier The 7th pin of U1 and the 11th pin are connected to the 8th pin of the operational amplifier U2;

The first pin of the multiplier U6 is connected to the seventh pin of the operational amplifier U1, the third pin is connected to the eighth pin of the operational amplifier U2, the second, fourth, and sixth pins are all grounded, and the fifth pin is connected to the VEE, the 7th pin is connected to the 13th pin of the operational amplifier U1 through the resistor R16, and the 8th pin is connected to VCC.

2. A circuit for realizing different classical Qi chaotic switching systems of fractional orders, characterized in that, the use of operational amplifier U1, operational amplifier U2 and resistors and capacitors to form an inverting adder and fractional inverting integrals of different orders Utilize multiplier U3, multiplier U4 and multiplier U6 to realize multiplication operation, utilize analog switch U5 to realize the selective output of analog signal, described operational amplifier U1 and operational amplifier U2 adopt LF347D, described multiplier U3, multiplier U4 And multiplier U6 adopts AD633JN, and described analog switch U5 adopts ADG888, and described operational amplifier U1 connects multiplier U3, multiplier U4, multiplier U6 and analog switch U5, and described operational amplifier U2 connects multiplier U3, multiplier U6 And the analog switch U5, the multiplier U3 is connected to the operational amplifier U1, the multiplier U4 is connected to the operational amplifier U2, the analog switch U5 is connected to the operational amplifier U1 and the operational amplifier U2, and the multiplier U6 is connected to the operational amplifier U1;

The first pin of the operational amplifier U1 is connected to the second pin of the operational amplifier U1 through a resistor R3, and connected to the sixth pin of the operational amplifier U1 through a resistor R8, and the third, fifth, and tenth pins of the operational amplifier U1 are , Pin 12 is grounded, pin 4 is connected to VCC, pin 11 is connected to VEE, pin 6 of operational amplifier U1 is connected in parallel with resistor Ry11 and capacitor Cy11, connected in parallel with resistor Ry12 and capacitor Cy12, and then connected with resistor Ry13 After connecting in parallel with the capacitor Cy13, connect the 7th pin of the analog switch U5, through the parallel connection of the resistor Ry21 and the capacitor Cy21, connect the parallel connection of the resistor Ry22 and the capacitor Cy22, then connect the parallel connection of the resistor Ry23 and the capacitor Cy23, and then connect the analog The 5th pin of the switch U5, the 7th pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor R2, the 6th pin of the operational amplifier U1 is connected through the resistor R4, and the 3rd pin of the multiplier U4 Pin, connected to the first pin of the multiplier U6, the eighth pin of the operational amplifier U1 connected to the second pin of the operational amplifier U1 through the resistor R5, connected to the ninth pin of the operational amplifier U1 through the resistor R6, and connected to the operational amplifier U2 The 2nd pin of the multiplier U3 is connected to the 1st pin of the multiplier U4, the 9th pin of the operational amplifier U1 is connected in parallel with the resistor Rx11 and the capacitor Cx11, and connected to the resistor Rx12 and the capacitor Cx12 Parallel connection, then connect the parallel connection of resistor Rx13 and capacitor Cx13, then connect the second pin of analog switch U5, through the parallel connection of resistor Rx21 and capacitor Cx21, connect the parallel connection of resistor Rx22 and capacitor Cx22, and then connect the connection of resistor Rx23 and capacitor Cx23 After parallel connection, connect the 4th pin of the analog switch U5, the 14th pin of the operational amplifier U1 to the 13th pin of the operational amplifier U1 through the resistor R1, and the 9th pin of the operational amplifier U1 through the resistor R7;

The 6th and 7th pins of the operational amplifier U2 are suspended, the 3rd, 5th, 10th, and 12th pins of the operational amplifier U2 are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 11th pin of the operational amplifier U2 is connected to VEE. The first pin is connected to the ground through the series connection of resistors R14 and R15, connected to the 8th and 9th pins of the analog switch U5 through R14, the 8th pin of the operational amplifier U2 is connected to the 9th pin of the operational amplifier U2 through the resistor R12, and then multiplied The 3rd pin of the multiplier U3 is connected to the 3rd pin of the multiplier U6, and the 9th pin of the operational amplifier U2 is connected to the parallel connection of the resistor Rz11 and the capacitor Cz11, connected to the parallel connection of the resistor Rz12 and the capacitor Cz12, and then connected to the resistor Rz13 and the capacitor After the parallel connection of Cz13, connect the 10th pin of the analog switch U5, through the parallel connection of the resistor Rz21 and the capacitor Cz21, connect the parallel connection of the resistor Rz22 and the capacitor Cz22, then connect the parallel connection of the resistor Rz23 and the capacitor Cz23, and then connect the analog switch U5 The 12th pin of the operational amplifier U2, the 14th pin of the operational amplifier U2 is connected to the 13th pin of the operational amplifier U2 through the resistor R11, and the 9th pin of the operational amplifier U2 is connected through the resistor R13;

The first pin of the multiplier U3 is connected to the eighth pin of the operational amplifier U1, the third pin is connected to the eighth pin of the operational amplifier U2, the second, fourth, and sixth pins are all grounded, and the fifth pin is connected to the eighth pin of the operational amplifier U2. VEE, the 7th pin is connected to the 6th pin of the operational amplifier U1 through the resistor R9, and the 8th pin is connected to VCC;

The first pin of the multiplier U4 is connected to the 8th pin of the operational amplifier U1, the 3rd pin is connected to the 7th pin of the operational amplifier U1, the 2nd, 4th and 6th pins are all grounded, and the 5th pin is connected to the VEE, the 7th pin is connected to the 13th pin of the operational amplifier U2 through the resistor R10, and the 8th pin is connected to VCC;

The first pin of the analog switch U5 is connected to VCC, the 16th pin is grounded, the 13th, 14th and 15th pins are suspended, the 3rd pin is connected to the 8th pin of the operational amplifier U1, and the 6th pin is connected to the operational amplifier The 7th pin of U1 and the 11th pin are connected to the 8th pin of the operational amplifier U2;

The first pin of the multiplier U6 is connected to the seventh pin of the operational amplifier U1, the third pin is connected to the eighth pin of the operational amplifier U2, the second, fourth, and sixth pins are all grounded, and the fifth pin is connected to the VEE, the 7th pin is connected to the 13th pin of the operational amplifier U1 through the resistor R16, and the 8th pin is connected to VCC.

The beneficial effect of the invention is that a novel switching method and circuit of a new chaotic system is proposed, which provides a new idea for increasing the switching types of the chaotic system and applying the chaotic system to engineering practice.

Description of drawings

FIG. 1 is a schematic diagram of a circuit connection structure of a preferred embodiment of the present invention.

Fig. 2 and Fig. 3 are the actual connection diagrams of the circuit of the present invention.

Detailed ways

The present invention will be further described in detail below with reference to the accompanying drawings and preferred embodiments, see Fig. 1-Fig. 3 .

1, a kind of method that realizes the different classical Qi chaotic switching system of fractional order, it is characterized in that, comprises the following steps:

(1) The equation of the classical Qi chaotic system i is:

$\left\{\begin{array}{ccc}\mathrm{<span\; class="notranslate">\; dx</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; yz</span>}& & \\ \mathrm{<span\; class="notranslate">\; dy</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&alpha;x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; xz</span>}& \mathrm{<span\; class="notranslate">\; i</span>}& \mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 35</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&beta;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 80</span>}\\ \mathrm{<span\; class="notranslate">\; dz</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; xy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&beta;z</span>}& & \end{array}\right.$

(2) The equation of the 0.9-order classical Qi chaotic system ii is:

$\left\{\begin{array}{ccc}{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; yz</span>}& & \\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&alpha;x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; xz</span>}& \mathrm{<span\; class="notranslate">\; i</span>}& \mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 35</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&beta;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 80</span>}\\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; xy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&beta;z</span>}& & \end{array}\right.$

(3) The equation of the 0.1-order classical Qi chaotic system iii is:

$\left\{\begin{array}{ccc}{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.1</span>}}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; yz</span>}& & \\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.1</span>}}\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&alpha;x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; xz</span>}& \mathrm{<span\; class="notranslate">\; iii</span>}& \mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 35</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&beta;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 80</span>}\\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.1</span>}}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; xy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&beta;z</span>}& & \end{array}\right.$

(4) Construct switching function q=f(x), where the expression iv of f(x) is:

$\mathrm{<span\; class="notranslate">\; q</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\left\{\begin{array}{cc}\mathrm{<span\; class="notranslate">\; 0.9</span>}& \mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; ></span>\mathrm{<span\; class="notranslate">\; 0</span>}\\ \mathrm{<span\; class="notranslate">\; 0.1</span>}& \mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; 0</span>}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; iv</span>}$

(5) Constructing a classical Qi chaotic switching system v with different fractional orders from ii, iii and iv is:

$\begin{array}{cc}\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; yz</span>}\\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&alpha;x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; xz</span>}\\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; xy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&beta;z</span>}\end{array}\right.& \mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 35</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&beta;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 80</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; q</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\left\{\begin{array}{cc}\mathrm{<span\; class="notranslate">\; 0.9</span>}& \mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; ></span>\mathrm{<span\; class="notranslate">\; 0</span>}\\ \mathrm{<span\; class="notranslate">\; 0.1</span>}& \mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; 0</span>}\end{array}\right.\end{array}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; v</span>}$

(6) Construct an analog circuit system according to the Qi chaotic switching system v with different fractional orders, use the operational amplifier U1, operational amplifier U2, resistors and capacitors to form an inverting adder and fractional inverting integrators of different orders, and use multiplication Multiplier U3, multiplier U4 and multiplier U6 realize multiplication operation, utilize analog switch U5 to realize the selection output of analog signal, described operational amplifier U1 and operational amplifier U2 adopt LF347D, described multiplier U3, multiplier U4 and multiplier U6 Adopt AD633JN, described analog switch U5 adopts ADG888, described operational amplifier U1 connects multiplier U3, multiplier U4, multiplier U6 and analog switch U5, described operational amplifier U2 connects multiplier U3, multiplier U6 and analog switch U5 , the multiplier U3 is connected to the operational amplifier U1, the multiplier U4 is connected to the operational amplifier U2, and the analog switch U5 is connected to the operational amplifier U1 and the operational amplifier U2;

The first pin of the operational amplifier U1 is connected to the second pin of the operational amplifier U1 through a resistor R3, and connected to the sixth pin of the operational amplifier U1 through a resistor R8, and the third, fifth, and tenth pins of the operational amplifier U1 are , Pin 12 is grounded, pin 4 is connected to VCC, pin 11 is connected to VEE, pin 6 of operational amplifier U1 is connected in parallel with resistor Ry11 and capacitor Cy11, connected in parallel with resistor Ry12 and capacitor Cy12, and then connected with resistor Ry13 After connecting in parallel with the capacitor Cy13, connect the 7th pin of the analog switch U5, through the parallel connection of the resistor Ry21 and the capacitor Cy21, connect the parallel connection of the resistor Ry22 and the capacitor Cy22, then connect the parallel connection of the resistor Ry23 and the capacitor Cy23, and then connect the analog The 5th pin of the switch U5, the 7th pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor R2, the 6th pin of the operational amplifier U1 is connected through the resistor R4, and the 3rd pin of the multiplier U4 Pin, connected to the first pin of the multiplier U6, the eighth pin of the operational amplifier U1 connected to the second pin of the operational amplifier U1 through the resistor R5, connected to the ninth pin of the operational amplifier U1 through the resistor R6, and connected to the operational amplifier U2 The 2nd pin of the multiplier U3 is connected to the 1st pin of the multiplier U4, the 9th pin of the operational amplifier U1 is connected in parallel with the resistor Rx11 and the capacitor Cx11, and connected to the resistor Rx12 and the capacitor Cx12 Parallel connection, then connect the parallel connection of resistor Rx13 and capacitor Cx13, then connect the second pin of analog switch U5, through the parallel connection of resistor Rx21 and capacitor Cx21, connect the parallel connection of resistor Rx22 and capacitor Cx22, and then connect the connection of resistor Rx23 and capacitor Cx23 After parallel connection, connect the 4th pin of the analog switch U5, the 14th pin of the operational amplifier U1 to the 13th pin of the operational amplifier U1 through the resistor R1, and the 9th pin of the operational amplifier U1 through the resistor R7;

The 6th and 7th pins of the operational amplifier U2 are suspended, the 3rd, 5th, 10th, and 12th pins of the operational amplifier U2 are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 11th pin of the operational amplifier U2 is connected to VEE. The first pin is connected to the ground through the series connection of resistors R14 and R15, connected to the 8th and 9th pins of the analog switch U5 through R14, the 8th pin of the operational amplifier U2 is connected to the 9th pin of the operational amplifier U2 through the resistor R12, and then multiplied The 3rd pin of the multiplier U3 is connected to the 3rd pin of the multiplier U6, and the 9th pin of the operational amplifier U2 is connected to the parallel connection of the resistor Rz11 and the capacitor Cz11, connected to the parallel connection of the resistor Rz12 and the capacitor Cz12, and then connected to the resistor Rz13 and the capacitor After the parallel connection of Cz13, connect the 10th pin of the analog switch U5, through the parallel connection of the resistor Rz21 and the capacitor Cz21, connect the parallel connection of the resistor Rz22 and the capacitor Cz22, then connect the parallel connection of the resistor Rz23 and the capacitor Cz23, and then connect the analog switch U5 The 12th pin of the operational amplifier U2, the 14th pin of the operational amplifier U2 is connected to the 13th pin of the operational amplifier U2 through the resistor R11, and the 9th pin of the operational amplifier U2 is connected through the resistor R13;

The first pin of the multiplier U3 is connected to the eighth pin of the operational amplifier U1, the third pin is connected to the eighth pin of the operational amplifier U2, the second, fourth, and sixth pins are all grounded, and the fifth pin is connected to the eighth pin of the operational amplifier U2. VEE, the 7th pin is connected to the 6th pin of the operational amplifier U1 through the resistor R9, and the 8th pin is connected to VCC;

The first pin of the multiplier U4 is connected to the 8th pin of the operational amplifier U1, the 3rd pin is connected to the 7th pin of the operational amplifier U1, the 2nd, 4th and 6th pins are all grounded, and the 5th pin is connected to the VEE, the 7th pin is connected to the 13th pin of the operational amplifier U2 through the resistor R10, and the 8th pin is connected to VCC;

The first pin of the analog switch U5 is connected to VCC, the 16th pin is grounded, the 13th, 14th and 15th pins are suspended, the 3rd pin is connected to the 8th pin of the operational amplifier U1, and the 6th pin is connected to the operational amplifier The 7th pin of U1 and the 11th pin are connected to the 8th pin of the operational amplifier U2;

The first pin of the multiplier U6 is connected to the seventh pin of the operational amplifier U1, the third pin is connected to the eighth pin of the operational amplifier U2, the second, fourth, and sixth pins are all grounded, and the fifth pin is connected to the VEE, the 7th pin is connected to the 13th pin of the operational amplifier U1 through the resistor R16, and the 8th pin is connected to VCC.

2. A circuit for realizing different classical Qi chaotic switching systems of fractional orders, characterized in that, the use of operational amplifier U1, operational amplifier U2 and resistors and capacitors to form an inverting adder and fractional inverting integrals of different orders Utilize multiplier U3, multiplier U4 and multiplier U6 to realize multiplication operation, utilize analog switch U5 to realize the selective output of analog signal, described operational amplifier U1 and operational amplifier U2 adopt LF347D, described multiplier U3, multiplier U4 And multiplier U6 adopts AD633JN, and described analog switch U5 adopts ADG888, and described operational amplifier U1 connects multiplier U3, multiplier U4, multiplier U6 and analog switch U5, and described operational amplifier U2 connects multiplier U3, multiplier U6 and an analog switch U5, the multiplier U3 is connected to the operational amplifier U1, the multiplier U4 is connected to the operational amplifier U2, and the analog switch U5 is connected to the operational amplifier U1 and the operational amplifier U2;

The first pin of the operational amplifier U1 is connected to the second pin of the operational amplifier U1 through a resistor R3, and connected to the sixth pin of the operational amplifier U1 through a resistor R8, and the third, fifth, and tenth pins of the operational amplifier U1 are , Pin 12 is grounded, pin 4 is connected to VCC, pin 11 is connected to VEE, pin 6 of operational amplifier U1 is connected in parallel with resistor Ry11 and capacitor Cy11, connected in parallel with resistor Ry12 and capacitor Cy12, and then connected with resistor Ry13 After connecting in parallel with the capacitor Cy13, connect the 7th pin of the analog switch U5, through the parallel connection of the resistor Ry21 and the capacitor Cy21, connect the parallel connection of the resistor Ry22 and the capacitor Cy22, then connect the parallel connection of the resistor Ry23 and the capacitor Cy23, and then connect the analog The 5th pin of the switch U5, the 7th pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor R2, the 6th pin of the operational amplifier U1 is connected through the resistor R4, and the 3rd pin of the multiplier U4 Pin, connected to the first pin of the multiplier U6, the eighth pin of the operational amplifier U1 connected to the second pin of the operational amplifier U1 through the resistor R5, connected to the ninth pin of the operational amplifier U1 through the resistor R6, and connected to the operational amplifier U2 The 2nd pin of the multiplier U3 is connected to the 1st pin of the multiplier U4, the 9th pin of the operational amplifier U1 is connected in parallel with the resistor Rx11 and the capacitor Cx11, and connected to the resistor Rx12 and the capacitor Cx12 Parallel connection, then connect the parallel connection of resistor Rx13 and capacitor Cx13, then connect the second pin of analog switch U5, through the parallel connection of resistor Rx21 and capacitor Cx21, connect the parallel connection of resistor Rx22 and capacitor Cx22, and then connect the connection of resistor Rx23 and capacitor Cx23 After parallel connection, connect the 4th pin of the analog switch U5, the 14th pin of the operational amplifier U1 to the 13th pin of the operational amplifier U1 through the resistor R1, and the 9th pin of the operational amplifier U1 through the resistor R7;

The 6th and 7th pins of the operational amplifier U2 are suspended, the 3rd, 5th, 10th, and 12th pins of the operational amplifier U2 are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 11th pin of the operational amplifier U2 is connected to VEE. The first pin is connected to the ground through the series connection of resistors R14 and R15, connected to the 8th and 9th pins of the analog switch U5 through R14, the 8th pin of the operational amplifier U2 is connected to the 9th pin of the operational amplifier U2 through the resistor R12, and then multiplied The 3rd pin of the multiplier U3 is connected to the 3rd pin of the multiplier U6, and the 9th pin of the operational amplifier U2 is connected to the parallel connection of the resistor Rz11 and the capacitor Cz11, connected to the parallel connection of the resistor Rz12 and the capacitor Cz12, and then connected to the resistor Rz13 and the capacitor After the parallel connection of Cz13, connect the 10th pin of the analog switch U5, through the parallel connection of the resistor Rz21 and the capacitor Cz21, connect the parallel connection of the resistor Rz22 and the capacitor Cz22, then connect the parallel connection of the resistor Rz23 and the capacitor Cz23, and then connect the analog switch U5 The 12th pin of the operational amplifier U2, the 14th pin of the operational amplifier U2 is connected to the 13th pin of the operational amplifier U2 through the resistor R11, and the 9th pin of the operational amplifier U2 is connected through the resistor R13;

The first pin of the multiplier U3 is connected to the eighth pin of the operational amplifier U1, the third pin is connected to the eighth pin of the operational amplifier U2, the second, fourth, and sixth pins are all grounded, and the fifth pin is connected to the eighth pin of the operational amplifier U2. VEE, the 7th pin is connected to the 6th pin of the operational amplifier U1 through the resistor R9, and the 8th pin is connected to VCC;

The first pin of the multiplier U4 is connected to the 8th pin of the operational amplifier U1, the 3rd pin is connected to the 7th pin of the operational amplifier U1, the 2nd, 4th and 6th pins are all grounded, and the 5th pin is connected to the VEE, the 7th pin is connected to the 13th pin of the operational amplifier U2 through the resistor R10, and the 8th pin is connected to VCC;

The first pin of the analog switch U5 is connected to VCC, the 16th pin is grounded, the 13th, 14th and 15th pins are suspended, the 3rd pin is connected to the 8th pin of the operational amplifier U1, and the 6th pin is connected to the operational amplifier The 7th pin of U1 and the 11th pin are connected to the 8th pin of the operational amplifier U2;

The first pin of the multiplier U6 is connected to the seventh pin of the operational amplifier U1, the third pin is connected to the eighth pin of the operational amplifier U2, the second, fourth, and sixth pins are all grounded, and the fifth pin is connected to the VEE, the 7th pin is connected to the 13th pin of the operational amplifier U1 through the resistor R16, and the 8th pin is connected to VCC.

Resistance in the circuit R1=R3=R7=R8=R11=R13=10kΩ, R9=R10=R16=1kΩ, R2=R6=2.86kΩ, R4=100kΩ, R5=1.25kΩ, R12=37.5kΩ, R14=100kΩ, R15=80kΩ, Rx11=Ry11=Rz11=62.84MΩ, Rx12=Ry12=Rz12=250kΩ, Rx13=Ry13=Rz13=2.5kΩ, Rx21=Ry21=Rz21=0.636MΩ, Rx22=Ry22=Rz22=0.3815MΩ, Rx23= Ry23=Rz23=0.5672MΩ, Cx11=Cy11=Cz11=1.2μF, Cx12=Cy12=Cz13=1.8μF, Cx13=Cy13=Cz13=1.1μF, Cx21=Cy21=Cz21=15.75μF, Cx22=Cy22=Cz22=0.1575 μF, Cx23=Cy23=Cz23=633.5nF.

Of course, the above description is not a limitation of the present invention, and the present invention is not limited to the above examples. Changes, modifications, additions or replacements made by those skilled in the art within the scope of the present invention also belong to the scope of the present invention. protected range.

Claims (2)

1. a method for realizing the different classical Qi chaotic switching systems of fractional order is characterized in that, comprising the following steps: (1) The equation of the classical Qi chaotic system i is: $\begin{array}{ccc}\left\{\begin{array}{c}\mathrm{<span\; class="notranslate">\; dx</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; yz</span>}\\ \mathrm{<span\; class="notranslate">\; dy</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&alpha;x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; xz</span>}\\ \mathrm{<span\; class="notranslate">\; dz</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; xy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&beta;z</span>}\end{array}\right.& \mathrm{<span\; class="notranslate">\; i</span>}& \mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 35</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&beta;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 80</span>}\end{array}$ (2) The equation of the 0.9-order classical Qi chaotic system ii is: $\begin{array}{ccc}\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; yz</span>}\\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&alpha;x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; xz</span>}\\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0.9</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; xy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&beta;z</span>}\end{array}\right.& \mathrm{<span\; class="notranslate">\; i</span>}& \mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 35</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&beta;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 80</span>}\end{array}$ (3) The equation of the 0.1-order classical Qi chaotic system iii is: $\begin{array}{ccc}\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; .</span>\mathrm{<span\; class="notranslate">\; 1</span>}}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; .</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; yz</span>}\\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; .</span>\mathrm{<span\; class="notranslate">\; 1</span>}}\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; .</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&alpha;x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; xz</span>}\\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; .</span>\mathrm{<span\; class="notranslate">\; 1</span>}}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; .</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; xy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&beta;z</span>}\end{array}\right.& \mathrm{<span\; class="notranslate">\; i</span>}& \mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 35</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&beta;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 80</span>}\end{array}$ (4) Construct switching function q=f(x), where the expression iv of f(x) is: $\mathrm{<span\; class="notranslate">\; q</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\left\{\begin{array}{ccc}\mathrm{<span\; class="notranslate">\; 0.9</span>}& \mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; ></span>\mathrm{<span\; class="notranslate">\; 0</span>}& \\ & & \mathrm{<span\; class="notranslate">\; iv</span>}\\ \mathrm{<span\; class="notranslate">\; 0.1</span>}& \mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; 0</span>}& \end{array}\right.$ (5) Constructing a classical Qi chaotic switching system v with different fractional orders from ii, iii and iv is: $\begin{array}{ccc}\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; yz</span>}\\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&alpha;x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; xz</span>}\\ {\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; q</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; xy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&beta;z</span>}\end{array}\right.& \mathrm{<span\; class="notranslate">\; \&rho;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 35</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&beta;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 80</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; q</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\left\{\begin{array}{cc}\mathrm{<span\; class="notranslate">\; 0.9</span>}& \mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; ></span>\mathrm{<span\; class="notranslate">\; 0</span>}\\ \mathrm{<span\; class="notranslate">\; 0.1</span>}& \mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; \&le;</span>\mathrm{<span\; class="notranslate">\; 0</span>}\end{array}\right.& \mathrm{<span\; class="notranslate">\; v</span>}\end{array}$ (6) Construct an analog circuit system according to the classical Qi chaotic switching system v with different fractional orders, and use the operational amplifier U1, operational amplifier U2, resistors and capacitors to form an inverting adder and fractional inverting integrators of different orders. Multiplier U3, multiplier U4 and multiplier U6 realize multiplication, utilize analog switch U5 to realize the selection output of analog signal, described operational amplifier U1 and operational amplifier U2 adopt LF347D, described multiplier U3, multiplier U4 and multiplier U6 adopts AD633JN, the analog switch U5 adopts ADG888, the operational amplifier U1 is connected to the multiplier U3, the multiplier U4, the multiplier U6 and the analog switch U5, and the operational amplifier U2 is connected to the multiplier U3, the multiplier U6 and the analog switch U5, the multiplier U3 is connected to the operational amplifier U1, the multiplier U4 is connected to the operational amplifier U2, the analog switch U5 is connected to the operational amplifier U1 and the operational amplifier U2, and the multiplier U6 is connected to the operational amplifier U1; The first pin of the operational amplifier U1 is connected to the second pin of the operational amplifier U1 through a resistor R3, and connected to the sixth pin of the operational amplifier U1 through a resistor R8, and the third, fifth, and tenth pins of the operational amplifier U1 are , Pin 12 is grounded, pin 4 is connected to VCC, pin 11 is connected to VEE, pin 6 of operational amplifier U1 is connected in parallel with resistor Ry11 and capacitor Cy11, connected in parallel with resistor Ry12 and capacitor Cy12, and then connected with resistor Ry13 After connecting in parallel with the capacitor Cy13, connect the 7th pin of the analog switch U5, through the parallel connection of the resistor Ry21 and the capacitor Cy21, connect the parallel connection of the resistor Ry22 and the capacitor Cy22, then connect the parallel connection of the resistor Ry23 and the capacitor Cy23, and then connect the analog The 5th pin of the switch U5, the 7th pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor R2, the 6th pin of the operational amplifier U1 is connected through the resistor R4, and the 3rd pin of the multiplier U4 Pin, connected to the first pin of the multiplier U6, the eighth pin of the operational amplifier U1 connected to the second pin of the operational amplifier U1 through the resistor R5, connected to the ninth pin of the operational amplifier U1 through the resistor R6, and connected to the operational amplifier U2 The 2nd pin of the multiplier U3 is connected to the 1st pin of the multiplier U4, the 9th pin of the operational amplifier U1 is connected in parallel with the resistor Rx11 and the capacitor Cx11, and connected to the resistor Rx12 and the capacitor Cx12 Parallel connection, then connect the parallel connection of resistor Rx13 and capacitor Cx13, then connect the second pin of analog switch U5, through the parallel connection of resistor Rx21 and capacitor Cx21, connect the parallel connection of resistor Rx22 and capacitor Cx22, and then connect the connection of resistor Rx23 and capacitor Cx23 After parallel connection, connect the 4th pin of the analog switch U5, the 14th pin of the operational amplifier U1 to the 13th pin of the operational amplifier U1 through the resistor R1, and the 9th pin of the operational amplifier U1 through the resistor R7; The 6th and 7th pins of the operational amplifier U2 are suspended, the 3rd, 5th, 10th, and 12th pins of the operational amplifier U2 are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 11th pin of the operational amplifier U2 is connected to VEE. The first pin is connected to the ground through the series connection of resistors R14 and R15, connected to the 8th and 9th pins of the analog switch U5 through R14, the 8th pin of the operational amplifier U2 is connected to the 9th pin of the operational amplifier U2 through the resistor R12, and then multiplied The 3rd pin of the multiplier U3 is connected to the 3rd pin of the multiplier U6, and the 9th pin of the operational amplifier U2 is connected to the parallel connection of the resistor Rz11 and the capacitor Cz11, connected to the parallel connection of the resistor Rz12 and the capacitor Cz12, and then connected to the resistor Rz13 and the capacitor After the parallel connection of Cz13, connect the 10th pin of the analog switch U5, through the parallel connection of the resistor Rz21 and the capacitor Cz21, connect the parallel connection of the resistor Rz22 and the capacitor Cz22, then connect the parallel connection of the resistor Rz23 and the capacitor Cz23, and then connect the analog switch U5 The 12th pin of the operational amplifier U2, the 14th pin of the operational amplifier U2 is connected to the 13th pin of the operational amplifier U2 through the resistor R11, and the 9th pin of the operational amplifier U2 is connected through the resistor R13; The first pin of the multiplier U3 is connected to the eighth pin of the operational amplifier U1, the third pin is connected to the eighth pin of the operational amplifier U2, the second, fourth, and sixth pins are all grounded, and the fifth pin is connected to the eighth pin of the operational amplifier U2. VEE, the 7th pin is connected to the 6th pin of the operational amplifier U1 through the resistor R9, and the 8th pin is connected to VCC; The first pin of the multiplier U4 is connected to the 8th pin of the operational amplifier U1, the 3rd pin is connected to the 7th pin of the operational amplifier U1, the 2nd, 4th and 6th pins are all grounded, and the 5th pin is connected to the VEE, the 7th pin is connected to the 13th pin of the operational amplifier U2 through the resistor R10, and the 8th pin is connected to VCC; The first pin of the analog switch U5 is connected to VCC, the 16th pin is grounded, the 13th, 14th and 15th pins are suspended, the 3rd pin is connected to the 8th pin of the operational amplifier U1, and the 6th pin is connected to the operational amplifier The 7th pin of U1 and the 11th pin are connected to the 8th pin of the operational amplifier U2; The first pin of the multiplier U6 is connected to the seventh pin of the operational amplifier U1, the third pin is connected to the eighth pin of the operational amplifier U2, the second, fourth, and sixth pins are all grounded, and the fifth pin is connected to the VEE, the 7th pin is connected to the 13th pin of the operational amplifier U1 through the resistor R16, and the 8th pin is connected to VCC. 2. A circuit that realizes different classic Qi chaotic switching systems of fractional orders is characterized in that, utilizes operational amplifier U1, operational amplifier U2 and resistance and capacitance to form inverting adder and fractional order inverting integral of different orders Utilize multiplier U3, multiplier U4 and multiplier U6 to realize multiplication operation, utilize analog switch U5 to realize the selective output of analog signal, described operational amplifier U1 and operational amplifier U2 adopt LF347D, described multiplier U3, multiplier U4 And multiplier U6 adopts AD633JN, and described analog switch U5 adopts ADG888, and described operational amplifier U1 connects multiplier U3, multiplier U4, multiplier U6 and analog switch U5, and described operational amplifier U2 connects multiplier U3, multiplier U6 and an analog switch U5, the multiplier U3 is connected to the operational amplifier U1, the multiplier U4 is connected to the operational amplifier U2, and the analog switch U5 is connected to the operational amplifier U1 and the operational amplifier U2; The first pin of the operational amplifier U1 is connected to the second pin of the operational amplifier U1 through a resistor R3, and connected to the sixth pin of the operational amplifier U1 through a resistor R8, and the third, fifth, and tenth pins of the operational amplifier U1 are , Pin 12 is grounded, pin 4 is connected to VCC, pin 11 is connected to VEE, pin 6 of operational amplifier U1 is connected in parallel with resistor Ry11 and capacitor Cy11, connected in parallel with resistor Ry12 and capacitor Cy12, and then connected with resistor Ry13 After connecting in parallel with the capacitor Cy13, connect the 7th pin of the analog switch U5, through the parallel connection of the resistor Ry21 and the capacitor Cy21, connect the parallel connection of the resistor Ry22 and the capacitor Cy22, then connect the parallel connection of the resistor Ry23 and the capacitor Cy23, and then connect the analog The 5th pin of the switch U5, the 7th pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor R2, the 6th pin of the operational amplifier U1 is connected through the resistor R4, and the 3rd pin of the multiplier U4 Pin, connected to the first pin of the multiplier U6, the eighth pin of the operational amplifier U1 connected to the second pin of the operational amplifier U1 through the resistor R5, connected to the ninth pin of the operational amplifier U1 through the resistor R6, and connected to the operational amplifier U2 The 2nd pin of the multiplier U3 is connected to the 1st pin of the multiplier U4, the 9th pin of the operational amplifier U1 is connected in parallel with the resistor Rx11 and the capacitor Cx11, and connected to the resistor Rx12 and the capacitor Cx12 Parallel connection, then connect the parallel connection of resistor Rx13 and capacitor Cx13, then connect the second pin of analog switch U5, through the parallel connection of resistor Rx21 and capacitor Cx21, connect the parallel connection of resistor Rx22 and capacitor Cx22, and then connect the connection of resistor Rx23 and capacitor Cx23 After parallel connection, connect the 4th pin of the analog switch U5, the 14th pin of the operational amplifier U1 to the 13th pin of the operational amplifier U1 through the resistor R1, and the 9th pin of the operational amplifier U1 through the resistor R7; The 6th and 7th pins of the operational amplifier U2 are suspended, the 3rd, 5th, 10th, and 12th pins of the operational amplifier U2 are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 11th pin of the operational amplifier U2 is connected to VEE. The first pin is connected to the ground through the series connection of resistors R14 and R15, connected to the 8th and 9th pins of the analog switch U5 through R14, the 8th pin of the operational amplifier U2 is connected to the 9th pin of the operational amplifier U2 through the resistor R12, and then multiplied The 3rd pin of the multiplier U3 is connected to the 3rd pin of the multiplier U6, and the 9th pin of the operational amplifier U2 is connected to the parallel connection of the resistor Rz11 and the capacitor Cz11, connected to the parallel connection of the resistor Rz12 and the capacitor Cz12, and then connected to the resistor Rz13 and the capacitor After the parallel connection of Cz13, connect the 10th pin of the analog switch U5, through the parallel connection of the resistor Rz21 and the capacitor Cz21, connect the parallel connection of the resistor Rz22 and the capacitor Cz22, then connect the parallel connection of the resistor Rz23 and the capacitor Cz23, and then connect the analog switch U5 The 12th pin of the operational amplifier U2, the 14th pin of the operational amplifier U2 is connected to the 13th pin of the operational amplifier U2 through the resistor R11, and the 9th pin of the operational amplifier U2 is connected through the resistor R13; The first pin of the multiplier U3 is connected to the eighth pin of the operational amplifier U1, the third pin is connected to the eighth pin of the operational amplifier U2, the second, fourth, and sixth pins are all grounded, and the fifth pin is connected to the eighth pin of the operational amplifier U2. VEE, the 7th pin is connected to the 6th pin of the operational amplifier U1 through the resistor R9, and the 8th pin is connected to VCC; The first pin of the multiplier U4 is connected to the 8th pin of the operational amplifier U1, the 3rd pin is connected to the 7th pin of the operational amplifier U1, the 2nd, 4th and 6th pins are all grounded, and the 5th pin is connected to the VEE, the 7th pin is connected to the 13th pin of the operational amplifier U2 through the resistor R10, and the 8th pin is connected to VCC; The first pin of the analog switch U5 is connected to VCC, the 16th pin is grounded, the 13th, 14th and 15th pins are suspended, the 3rd pin is connected to the 8th pin of the operational amplifier U1, and the 6th pin is connected to the operational amplifier The 7th pin of U1 and the 11th pin are connected to the 8th pin of the operational amplifier U2; The first pin of the multiplier U6 is connected to the seventh pin of the operational amplifier U1, the third pin is connected to the eighth pin of the operational amplifier U2, the second, fourth, and sixth pins are all grounded, and the fifth pin is connected to the VEE, the 7th pin is connected to the 13th pin of the operational amplifier U1 through the resistor R16, and the 8th pin is connected to VCC.