CN103780374A - Chen chaotic system switching method and circuit containing x<2> with different fractional orders - Google Patents
Chen chaotic system switching method and circuit containing x<2> with different fractional orders Download PDFInfo
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- CN103780374A CN103780374A CN201410063231.7A CN201410063231A CN103780374A CN 103780374 A CN103780374 A CN 103780374A CN 201410063231 A CN201410063231 A CN 201410063231A CN 103780374 A CN103780374 A CN 103780374A
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Claims (2)
- A fractional-order different containing x 2chen chaos switched system method, it is characterized in that being, comprise the following steps:(1) containing x 2the equation of chen chaos system i be:(2) 0.9 rank are containing x 2the equation of chen chaos system ii be:(3) 0.1 rank are containing x 2the equation of chen chaos system iii be:(4) structure switching function q=f (x), wherein the expression formula iv of f (x) is:(5) by ii, iii and iv construct a kind of fractional-order different containing x 2chen chaos switched system v be:(6) according to fractional-order different containing x 2chen chaos switched system v constructing analog Circuits System, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity form the fractional order inverting integrator of anti-phase adder and different orders, utilize multiplier U3 and multiplier U4 to realize multiplying, utilize analog switch U5 to realize the selection output of analog signal, described operational amplifier U1 and operational amplifier U2 adopt LF347D, described multiplier U3 and multiplier U4 adopt AD633JN, described analog switch U5 adopts ADG888, described operational amplifier U1 connects multiplier U3, multiplier U4 and analog switch U5, described operational amplifier U2 connects multiplier U3 and analog switch U5, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U2, described analog switch U5 concatenation operation amplifier U1 and operational amplifier U2,The 1st pin of described operational amplifier U1 joins by resistance R 3 and the 2nd pin of operational amplifier U1, join by resistance R 8 and the 6th pin of operational amplifier U1, the 3rd of operational amplifier U1, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin of operational amplifier U1 is in parallel by resistance R y11 and capacitor C y11's, connecting resistance Ry12 is in parallel with capacitor C y12's, again after connecting resistance Ry13 and capacitor C y13 in parallel, connect again the 7th pin of analog switch U5, in parallel by resistance R y21 and capacitor C y21, connecting resistance Ry22 is in parallel with capacitor C y22's, again after connecting resistance Ry23 and capacitor C y23 in parallel, connect again the 5th pin of analog switch U5, the 7th pin of operational amplifier U1 connects the 13rd pin of operational amplifier U1 by resistance R 2, connect the 2nd pin of operational amplifier U1 by resistance R 5, the 8th pin of operational amplifier U1 connects the 9th pin of operational amplifier U1 by resistance R 6, connect the 6th pin of operational amplifier U1 by resistance R 4, connect the 2nd pin of operational amplifier U2, connect the 1st pin of multiplier U3, meet the 1st of multiplier U4, 3 pins, the 9th pin of operational amplifier U1 is in parallel by resistance R x11 and capacitor C x11's, connecting resistance Rx12 is in parallel with capacitor C x12's, again after connecting resistance Rx13 and capacitor C x13 in parallel, connect again the 2nd pin of analog switch U5, in parallel by resistance R x21 and capacitor C x21, connecting resistance Rx22 is in parallel with capacitor C x22's, again after connecting resistance Rx23 and capacitor C x23 in parallel, connect again the 4th pin of analog switch U5, the 14th pin of operational amplifier U1 connects the 13rd pin of operational amplifier U1 by resistance R 1, connect the 9th pin of operational amplifier U1 by resistance R 7,The 6th of described operational amplifier U2, 7 pins are unsettled, the 3rd of described operational amplifier U2, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 1st pin of operational amplifier U2 is by the series connection ground connection of resistance R 14 and R15, meet the 8th of analog switch U5 by R14, 9 pins, the 8th pin of operational amplifier U2 connects the 9th pin of operational amplifier U2 by resistance R 12, connect the 3rd pin of multiplier U3, the 9th pin of operational amplifier U2 is in parallel by resistance R z11 and capacitor C z11's, connecting resistance Rz12 is in parallel with capacitor C z12's, again after connecting resistance Rz13 and capacitor C z13 in parallel, connect again the 10th pin of analog switch U5, in parallel by resistance R z21 and capacitor C z21, connecting resistance Rz22 is in parallel with capacitor C z22's, again after connecting resistance Rz23 and capacitor C z23 in parallel, connect again the 12nd pin of analog switch U5, the 14th pin of operational amplifier U2 connects the 13rd pin of operational amplifier U2 by resistance R 11, connect the 9th pin of operational amplifier U2 by resistance R 13,The 1st pin of described multiplier U3 connects the 8th pin of operational amplifier U1, the 3rd pin connects the 8th pin of operational amplifier U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, the 7th pin connects the 6th pin of operational amplifier U1 by resistance R 9, the 8th pin meets VCC;The 1st, 3 pins of described multiplier U4 connect the 8th pin of operational amplifier U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects the 13rd pin of operational amplifier U2 by resistance R 10, and the 8th pin meets VCC;The 1st pin of described analog switch U5 meets VCC, the 16th pin ground connection, and the 13rd, 14,15 pins are unsettled, and the 3rd pin connects the 8th pin of operational amplifier U1, and the 6th pin connects the 7th pin of operational amplifier U1, and the 11st pin connects the 8th pin of operational amplifier U2.
- A fractional-order different containing x 2chen chaos switched system circuit, it is characterized in that being, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity form the fractional order inverting integrator of anti-phase adder and different orders, utilize multiplier U3 and multiplier U4 to realize multiplying, utilize analog switch U5 to realize the selection output of analog signal, described operational amplifier U1 and operational amplifier U2 adopt LF347D, described multiplier U3 and multiplier U4 adopt AD633JN, described analog switch U5 adopts ADG888, described operational amplifier U1 connects multiplier U3, multiplier U4 and analog switch U5, described operational amplifier U2 connects multiplier U3 and analog switch U5, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U2, described analog switch U5 concatenation operation amplifier U1 and operational amplifier U2,The 1st pin of described operational amplifier U1 joins by resistance R 3 and the 2nd pin of operational amplifier U1, join by resistance R 8 and the 6th pin of operational amplifier U1, the 3rd of operational amplifier U1, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin of operational amplifier U1 is in parallel by resistance R y11 and capacitor C y11's, connecting resistance Ry12 is in parallel with capacitor C y12's, again after connecting resistance Ry13 and capacitor C y13 in parallel, connect again the 7th pin of analog switch U5, in parallel by resistance R y21 and capacitor C y21, connecting resistance Ry22 is in parallel with capacitor C y22's, again after connecting resistance Ry23 and capacitor C y23 in parallel, connect again the 5th pin of analog switch U5, the 7th pin of operational amplifier U1 connects the 13rd pin of operational amplifier U1 by resistance R 2, connect the 2nd pin of operational amplifier U1 by resistance R 5, the 8th pin of operational amplifier U1 connects the 9th pin of operational amplifier U1 by resistance R 6, connect the 6th pin of operational amplifier U1 by resistance R 4, connect the 2nd pin of operational amplifier U2, connect the 1st pin of multiplier U3, meet the 1st of multiplier U4, 3 pins, the 9th pin of operational amplifier U1 is in parallel by resistance R x11 and capacitor C x11's, connecting resistance Rx12 is in parallel with capacitor C x12's, again after connecting resistance Rx13 and capacitor C x13 in parallel, connect again the 2nd pin of analog switch U5, in parallel by resistance R x21 and capacitor C x21, connecting resistance Rx22 is in parallel with capacitor C x22's, again after connecting resistance Rx23 and capacitor C x23 in parallel, connect again the 4th pin of analog switch U5, the 14th pin of operational amplifier U1 connects the 13rd pin of operational amplifier U1 by resistance R 1, connect the 9th pin of operational amplifier U1 by resistance R 7,The 6th of described operational amplifier U2, 7 pins are unsettled, the 3rd of described operational amplifier U2, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 1st pin of operational amplifier U2 is by the series connection ground connection of resistance R 14 and R15, meet the 8th of analog switch U5 by R14, 9 pins, the 8th pin of operational amplifier U2 connects the 9th pin of operational amplifier U2 by resistance R 12, connect the 3rd pin of multiplier U3, the 9th pin of operational amplifier U2 is in parallel by resistance R z11 and capacitor C z11's, connecting resistance Rz12 is in parallel with capacitor C z12's, again after connecting resistance Rz13 and capacitor C z13 in parallel, connect again the 10th pin of analog switch U5, in parallel by resistance R z21 and capacitor C z21, connecting resistance Rz22 is in parallel with capacitor C z22's, again after connecting resistance Rz23 and capacitor C z23 in parallel, connect again the 12nd pin of analog switch U5, the 14th pin of operational amplifier U2 connects the 13rd pin of operational amplifier U2 by resistance R 11, connect the 9th pin of operational amplifier U2 by resistance R 13,The 1st pin of described multiplier U3 connects the 8th pin of operational amplifier U1, the 3rd pin connects the 8th pin of operational amplifier U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, the 7th pin connects the 6th pin of operational amplifier U1 by resistance R 9, the 8th pin meets VCC;The 1st, 3 pins of described multiplier U4 connect the 8th pin of operational amplifier U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects the 13rd pin of operational amplifier U2 by resistance R 10, and the 8th pin meets VCC;The 1st pin of described analog switch U5 meets VCC, the 16th pin ground connection, and the 13rd, 14,15 pins are unsettled, and the 3rd pin connects the 8th pin of operational amplifier U1, and the 6th pin connects the 7th pin of operational amplifier U1, and the 11st pin connects the 8th pin of operational amplifier U2.
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CN201410063231.7A CN103780374B (en) | 2014-02-22 | 2014-02-22 | Chen chaotic system switching method and circuit containing x<2> with different fractional orders |
PCT/CN2014/000403 WO2015123796A1 (en) | 2014-02-22 | 2014-04-14 | chen CHAOTIC SYSTEM SWITCHING METHOD AND CIRCUIT CONTAINING x2 WITH DIFFERENTFRACTIONAL ORDERS |
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Cited By (1)
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CN104393983A (en) * | 2014-11-11 | 2015-03-04 | 胡春华 | 0.2 order and x2 Chen chaotic system circuit based on a hybrid fractional order integral circuit module |
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CN109215458A (en) * | 2018-10-31 | 2019-01-15 | 张剑锋 | A kind of three rank class Lorentz 3+2 type chaos circuits |
CN112422261B (en) * | 2019-08-23 | 2022-05-20 | 天津科技大学 | Generalized Sprotet-A system with four cluster conservative chaotic streams and construction method thereof |
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CN102385659B (en) * | 2011-12-13 | 2012-11-28 | 滨州学院 | Method for realizing fractional-order three-system automatic-switchover chaotic system and analog circuit |
CN102904709B (en) * | 2012-09-27 | 2014-12-24 | 国家电网公司 | Method for automatically switching four Chen type system based fractional order chaotic systems and analog circuit |
CN102946308B (en) * | 2012-11-19 | 2015-07-29 | 湖南大学 | A kind of new Fractional Order Hyperchaotic circuit |
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- 2014-02-22 CN CN201410063231.7A patent/CN103780374B/en not_active Expired - Fee Related
- 2014-04-14 WO PCT/CN2014/000403 patent/WO2015123796A1/en active Application Filing
Non-Patent Citations (3)
Title |
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屈双惠等: "《分数阶四翼超混沌系统和分数阶Chen系统的异结构同步》", 《四川大学学报(自然科学版)》, vol. 51, no. 1, 31 January 2014 (2014-01-31) * |
王忠林等: "《一个切换Chen混沌系统的设计与实现》", 《中国自动化学会控制理论专业委员会》, 24 June 2011 (2011-06-24) * |
黄露等: "《五维混沌Chen系统的电路实现及其控制方法分析》", 《海南师范大学学报(自然科学版)》, vol. 24, no. 3, 31 March 2011 (2011-03-31) * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104393983A (en) * | 2014-11-11 | 2015-03-04 | 胡春华 | 0.2 order and x2 Chen chaotic system circuit based on a hybrid fractional order integral circuit module |
CN104393983B (en) * | 2014-11-11 | 2016-01-20 | 国网山东省电力公司泰安供电公司 | A kind of 0.2 rank mixed type fractional order integration circuit arrangement |
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CN103780374B (en) | 2015-06-10 |
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