CN103779240B - 制造电路板的方法及使用其制造的芯片封装件和电路板 - Google Patents
制造电路板的方法及使用其制造的芯片封装件和电路板 Download PDFInfo
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- CN103779240B CN103779240B CN201310376164.XA CN201310376164A CN103779240B CN 103779240 B CN103779240 B CN 103779240B CN 201310376164 A CN201310376164 A CN 201310376164A CN 103779240 B CN103779240 B CN 103779240B
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
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- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
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- H01L2924/12042—LASER
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- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
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- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
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- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
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- H05K1/0373—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement containing additives, e.g. fillers
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- H05K2201/09—Shape and layout
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- H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
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- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09845—Stepped hole, via, edge, bump or conductor
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- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0548—Masks
- H05K2203/0554—Metal used as mask for etching vias, e.g. by laser ablation
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- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
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- General Chemical & Material Sciences (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
Claims (16)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20120116744 | 2012-10-19 | ||
KR10-2012-0116744 | 2012-10-19 | ||
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