CN103762227A - Oxide thin film, transistor with same and preparation method of transistor - Google Patents
Oxide thin film, transistor with same and preparation method of transistor Download PDFInfo
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- CN103762227A CN103762227A CN201410031240.8A CN201410031240A CN103762227A CN 103762227 A CN103762227 A CN 103762227A CN 201410031240 A CN201410031240 A CN 201410031240A CN 103762227 A CN103762227 A CN 103762227A
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- sull
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- 239000010409 thin film Substances 0.000 title claims abstract description 53
- 238000002360 preparation method Methods 0.000 title claims abstract description 25
- 229910007604 Zn—Sn—O Inorganic materials 0.000 claims abstract description 17
- 239000000758 substrate Substances 0.000 claims description 57
- 239000012212 insulator Substances 0.000 claims description 45
- 238000000034 method Methods 0.000 claims description 33
- 239000010408 film Substances 0.000 claims description 16
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 229910052788 barium Inorganic materials 0.000 claims description 7
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 7
- 239000010936 titanium Substances 0.000 claims description 7
- 239000011701 zinc Substances 0.000 claims description 7
- 229910021627 Tin(IV) chloride Inorganic materials 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- 238000000231 atomic layer deposition Methods 0.000 claims description 6
- DSAJWYNOEDNPEQ-UHFFFAOYSA-N barium atom Chemical compound [Ba] DSAJWYNOEDNPEQ-UHFFFAOYSA-N 0.000 claims description 6
- 238000005660 chlorination reaction Methods 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 6
- 238000010438 heat treatment Methods 0.000 claims description 6
- 238000004528 spin coating Methods 0.000 claims description 6
- 238000003756 stirring Methods 0.000 claims description 6
- HPGGPRDJHPYFRM-UHFFFAOYSA-J tin(iv) chloride Chemical compound Cl[Sn](Cl)(Cl)Cl HPGGPRDJHPYFRM-UHFFFAOYSA-J 0.000 claims description 6
- 239000004246 zinc acetate Substances 0.000 claims description 6
- -1 zinc acetate compound Chemical class 0.000 claims description 6
- 239000004411 aluminium Substances 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052719 titanium Inorganic materials 0.000 claims description 5
- XNWFRZJHXBZDAG-UHFFFAOYSA-N 2-METHOXYETHANOL Chemical compound COCCO XNWFRZJHXBZDAG-UHFFFAOYSA-N 0.000 claims description 4
- 229910052684 Cerium Inorganic materials 0.000 claims description 4
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 claims description 4
- 229910052779 Neodymium Inorganic materials 0.000 claims description 4
- 229910052777 Praseodymium Inorganic materials 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 claims description 4
- ZMIGMASIKSOYAM-UHFFFAOYSA-N cerium Chemical compound [Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce] ZMIGMASIKSOYAM-UHFFFAOYSA-N 0.000 claims description 4
- 229910052735 hafnium Inorganic materials 0.000 claims description 4
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims description 4
- 229910052746 lanthanum Inorganic materials 0.000 claims description 4
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 claims description 4
- 239000007791 liquid phase Substances 0.000 claims description 4
- 229910052749 magnesium Inorganic materials 0.000 claims description 4
- 239000011777 magnesium Substances 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- QEFYFXOXNSNQGX-UHFFFAOYSA-N neodymium atom Chemical compound [Nd] QEFYFXOXNSNQGX-UHFFFAOYSA-N 0.000 claims description 4
- PUDIUYLPXJFUGB-UHFFFAOYSA-N praseodymium atom Chemical compound [Pr] PUDIUYLPXJFUGB-UHFFFAOYSA-N 0.000 claims description 4
- 229910052727 yttrium Inorganic materials 0.000 claims description 4
- VWQVUPCCIRVNHF-UHFFFAOYSA-N yttrium atom Chemical compound [Y] VWQVUPCCIRVNHF-UHFFFAOYSA-N 0.000 claims description 4
- 229910052726 zirconium Inorganic materials 0.000 claims description 4
- ZOIORXHNWRGPMV-UHFFFAOYSA-N acetic acid;zinc Chemical compound [Zn].CC(O)=O.CC(O)=O ZOIORXHNWRGPMV-UHFFFAOYSA-N 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims description 2
- 230000008021 deposition Effects 0.000 claims description 2
- 150000003839 salts Chemical class 0.000 claims description 2
- 239000000463 material Substances 0.000 abstract description 16
- 239000004065 semiconductor Substances 0.000 abstract description 9
- 230000015572 biosynthetic process Effects 0.000 abstract description 3
- 239000000969 carrier Substances 0.000 abstract 1
- 238000013508 migration Methods 0.000 abstract 1
- 230000005012 migration Effects 0.000 abstract 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 10
- 239000000126 substance Substances 0.000 description 8
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 6
- 239000002210 silicon-based material Substances 0.000 description 6
- 239000002800 charge carrier Substances 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 239000011521 glass Substances 0.000 description 5
- 229910044991 metal oxide Inorganic materials 0.000 description 5
- 239000000377 silicon dioxide Substances 0.000 description 5
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000001459 lithography Methods 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- 229910007541 Zn O Inorganic materials 0.000 description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical class [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 3
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052725 zinc Inorganic materials 0.000 description 3
- 239000011787 zinc oxide Substances 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 229910052791 calcium Inorganic materials 0.000 description 2
- 239000011575 calcium Substances 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 239000008236 heating water Substances 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000002207 thermal evaporation Methods 0.000 description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 2
- 229910001887 tin oxide Inorganic materials 0.000 description 2
- 238000002834 transmittance Methods 0.000 description 2
- OYPRJOBELJOOCE-UHFFFAOYSA-N Calcium Chemical compound [Ca] OYPRJOBELJOOCE-UHFFFAOYSA-N 0.000 description 1
- UXVMQQNJUSDDNG-UHFFFAOYSA-L Calcium chloride Chemical compound [Cl-].[Cl-].[Ca+2] UXVMQQNJUSDDNG-UHFFFAOYSA-L 0.000 description 1
- 235000007926 Craterellus fallax Nutrition 0.000 description 1
- 240000007175 Datura inoxia Species 0.000 description 1
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 238000005269 aluminizing Methods 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- QVQLCTNNEUAWMS-UHFFFAOYSA-N barium oxide Inorganic materials [Ba]=O QVQLCTNNEUAWMS-UHFFFAOYSA-N 0.000 description 1
- CSSYLTMKCUORDA-UHFFFAOYSA-N barium(2+);oxygen(2-) Chemical compound [O-2].[Ba+2] CSSYLTMKCUORDA-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000001110 calcium chloride Substances 0.000 description 1
- 229910001628 calcium chloride Inorganic materials 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000009833 condensation Methods 0.000 description 1
- 230000005494 condensation Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- JAONJTDQXUSBGG-UHFFFAOYSA-N dialuminum;dizinc;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Al+3].[Al+3].[Zn+2].[Zn+2] JAONJTDQXUSBGG-UHFFFAOYSA-N 0.000 description 1
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910001195 gallium oxide Inorganic materials 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000007062 hydrolysis Effects 0.000 description 1
- 238000006460 hydrolysis reaction Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 231100000614 poison Toxicity 0.000 description 1
- 230000007096 poisonous effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920006254 polymer film Polymers 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
- H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
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Abstract
The invention belongs to the field of semiconductor devices and provides an oxide thin film. The oxide thin film is a Ba-Zn-Sn-O oxide thin film. The molar ratio of elements in oxide is that Ba:Zn:Sn=0.4-0.6:1.8-2.2:2. The invention further provides a transistor with the oxide thin film and a preparation method of the transistor. An oxide thin film channel layer on the basis of Ba-Zn-Sn-O is adopted so that the capacity of control over formation of current carriers by the oxide thin film channel layer can be enhanced, the switch ratio can be improved, the migration rate can be remarkably increased, the subthreshold gradient can be optimized, and on the basis that the reliability and the electrical properties of the thin film transistor are guaranteed, the oxide thin film channel layer of the thin film transistor has a wider material selection range.
Description
Technical field
The invention belongs to field of semiconductor devices, be specifically related to a kind of semiconductor device that includes sull and preparation method thereof.
Background technology
In image display technology field, conventionally can adopt in a large number thin-film transistor built-up circuit to drive display unit.And in the past in long time, thin-film transistor generally adopts the Semiconductor with CMOS(Complementary Metal Oxide, complementary metal oxide semiconductors (CMOS)) the silicon based material of process compatible prepares.
But the light transmission of silicon based material is poor.And when these silicon based materials of preparation, the film forming of the amorphous silicon that can prepare at low temperatures compared with polysilicon, also needs approximately 200 ℃ of above high temperature.Can not as base material, prepare silicon based material with possessing cheapness, light weight, flexual polymer film.Therefore, with silicon based material, prepare thin-film transistor, exist the more significant shortcomings such as heating cost is high, preparation time is long.
In view of silica-based TFT(Thin Film Transistor, Thin Film Transistor (TFT), be thin-film transistor) there is above-mentioned shortcoming in device and preparation method, and the semi-conducting material that can replace silicon based material is being found always and developed to scientists in recent ten years.Transparent oxide semiconductor material, owing to can realizing film formation at low temp, and has the excellent characteristics such as higher mobility, has been a great concern.Wherein, as document K.Nomura et al. " Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors ", Nature, 432, described in p488-492 (2004), the In-Ga-Zn-O film forming with In, Ga, Zn element, because it compares the ZnO semiconductor using with tradition, there is less cut-off current, larger switch current ratio and higher mobility, become the focus of research gradually.
But, due in In-Ga-Zn-O membrane structure, Ga element is with the associativity problem of O element, and in the channel layer that makes to form, oxygen room is more, the inhibition ability forming for charge carrier a little less than, to thin-film transistor threshold voltage, leakage current I
offand on-off ratio has larger impact.And the content of In element in the earth's crust is 1 × 10
-5%, and be poisonous.And the content of Sn element in the earth's crust is 4 × 10
-3%, compares more horn of plenty, and meanwhile, due to the similarity of atomic structure, Sn can play the effect of carrier mobility in the raising material identical with In.
For pure ZTO(Zn-Sn-O) film, channel layer to charge carrier form control ability a little less than, the leakage current while simultaneously turn-offing is larger.Suitably doping can significantly improve the performance of ZTO; The control ability forming for charge carrier with the channel layer that overcomes existing ZTO thin-film transistor a little less than, turn-off the problem that leakage current is large simultaneously.
Therefore, if can develop brand-new sull, overcome the shortcoming of existing sull, certainly will have very large application prospect and economic worth.
Summary of the invention
For the weak point of this area, first object of the present invention is to propose a kind of sull.
Second object of the present invention is to propose a kind of transistor that contains sull.
The 3rd object of the present invention is to propose the described transistorized method of preparation.
The technical scheme that realizes above-mentioned purpose of the present invention is:
A kind of sull, it is Ba-Zn-Sn-O sull, in oxide, the mol ratio of each element is Ba:Zn:Sn=0.4～0.6:1.8～2.2:2, ratio in oxide is corresponding to the ratio in barium monoxide, zinc oxide, tin oxide, for example, in the Ba-Zn-Sn-O sull of Ba0.5mol, Zn2mol, Sn2mol, the molal quantity of oxygen is 4.5mol.
Further, in described sull, also doped with at least one in metallic element titanium, aluminium, magnesium, zirconium, hafnium, praseodymium, cerium, yttrium, lanthanum or neodymium, and the molar content of the metallic element adulterating is 10～99% of Ba molar content.
The transistor that contains sull of the present invention.
Preferably, described transistor is bottom gate alternating expression thin-film transistor; Described bottom gate alternating expression thin-film transistor comprises: sull channel layer, substrate, gate electrode, gate insulator, source area and drain region;
Described sull channel layer, gate electrode, gate insulator, source area and drain region are all arranged on substrate, and described sull channel layer and gate electrode are separated by gate insulator; Described source area and drain region are divided and are located at sull channel layer both sides, and do not contact with each other.
Described transistorized structure can be: from described substrate upwards, set gradually gate electrode, gate insulator, sull channel layer; And gate insulator cover described gate electrode, with described substrate contact; Described source area and drain region are divided and are located at sull channel layer both sides, and do not contact with each other.
Or described transistorized structure can be: from described substrate upwards, set gradually sull channel layer, gate insulator, gate electrode; Described source area and drain region are divided and are located at sull channel layer both sides, and with described substrate contact.
Or described transistorized structure can be: from described substrate upwards, set gradually sull channel layer, gate insulator, gate electrode; The both sides that are located at sull channel layer top are divided in described source area and drain region, and with described substrate contact.
Prepare transistorized method of the present invention, comprise step: prepare conductive film with metal or conductive oxide, adopt sol-gal process to prepare described sull channel layer, prepare gate insulator with vapour deposition or magnetron sputtering or Atomic layer deposition method, by etching make described conductive film part form gate electrode, part forms source area and drain region.
Described substrate can adopt silicon, glass or plastics.Described gate electrode, source area and described drain region can adopt metal (as Ti, Pt, Ru, Cu, Au, Ag, Mo, Cr, Al, Ta, W or its alloy) or conductive oxide (as the one in tin oxide, zinc oxide, indium oxide, tin indium oxide, indium zinc oxide, gallium oxide zinc or aluminum zinc oxide).
Described gate insulator can be such as SiO
2, Si
3n
4, SiON, HfO
2, Al
2o
3, Y
2o
3or Ta
2o
5and so on dielectric material, high-k dielectric material or their mixture.
According to transistor concrete structure difference, can select the priority different order of a step.For example structure " from described substrate upwards, sets gradually gate electrode, gate insulator, sull channel layer; And gate insulator cover described gate electrode, with described substrate contact; Described source area and drain region are divided and are located at sull channel layer both sides, and do not contact with each other ", preparation process is:
A: clean substrate;
B: forming gate electrode above described substrate: make gate electrode area by lithography above described substrate, adopt the ITO(Indium Tin Oxides of magnetron sputtering technique growth one deck 50～300 nanometer thickness, nano indium tin metal oxide) conductive film, uses stripping means to form gate electrode.
C: form gate insulator in described gate electrode and described substrate above not by part that described gate electrode covered: described gate electrode and described substrate not by part that described gate electrode covered above, adopt PECVD(Plasma Enhanced Chemical Vapor Deposition, plasma enhanced chemical vapor deposition method) technology or magnetron sputtering technique or ALD(Atomic layer deposition, ald) the folded gate dielectric layer of silicon dioxide of technology growth one deck 50～200 nanometer thickness.
D: forming sull channel layer above described gate insulator: the sull that the chemical formula that forms 80-150 nanometer above described gate insulator is Ba-Zn-Sn-O.
E: make described gate electrode exposed by etching, then the both sides above described sull channel layer form respectively source area and drain region: the above-mentioned made sample of getting ready is carried out to photoetching, use watery hydrochloric acid to etch away a part of sull channel layer, photoetching fall the described gate insulator of appropriate section with hf etching again, exposes gate electrode; Then, adopt mask plate, use the mode of thermal evaporation to draw as electrode at source-drain area formation 100nm Al, just obtained the TFT device of required preparation.
Preferably, adopt sol-gal process to prepare described sull channel layer, comprise: selective chlorination barium, stannic chloride and zinc acetate compound are as presoma, in EGME liquid phase, described presoma is mixed according to molar ratio, stir 15 minutes to 1 hour at temperature 30-60 ℃, until form stable vitreosol system in solution, this colloidal sol is deposited in substrate by spin coating method, in air atmosphere, is positioned over heat treatment 10-30min at 110-140 ℃.
Or, adopt sol-gal process to prepare described sull channel layer, comprise: selective chlorination barium, the soluble salt of stannic chloride, zinc acetate and metallic element titanium, aluminium, magnesium, zirconium, hafnium, praseodymium, cerium, yttrium, lanthanum or neodymium, as presoma, in EGME, described presoma is mixed according to molar ratio, at temperature 30-60 ℃, stir 15 minutes to 1 hour, until form stable vitreosol system in solution, this colloidal sol is deposited in substrate by spin coating method, in air atmosphere, is positioned over heat treatment 10-30min at 110-140 ℃.
Beneficial effect of the present invention is:
The sull channel layer of employing based on Ba-Zn-Sn-O, can strengthen the control ability that sull channel layer forms for charge carrier, improve on-off ratio, significantly increase mobility, optimize sub-threshold slope, guaranteeing, in the reliability and electrology characteristic basis of thin-film transistor, to make the sull channel layer of thin-film transistor have material range of choice widely;
Head store invention also can be passed through the doping of other elements, and the characteristic of the sull channel layer based on Ba-Zn-Sn-O is modulated, and further improves the reliability of thin-film transistor; Be conducive to form at low temperatures amorphous film, be conducive to guarantee consistency prepared by device, the stability of improving the device of manufacturing by low temperature process; Can not reduce under the prerequisite of device performance with the In that Sn replaces in traditional scheme, saving resource, reduces costs.
Accompanying drawing explanation
Fig. 1 is the bottom gate alternating expression thin-film transistor structure schematic diagram described in the embodiment of the present invention 1;
Fig. 2 is preparation method's flow chart of the bottom gate alternating expression thin-film transistor described in the embodiment of the present invention 1;
Fig. 3 is the coplanar formula thin-film transistor structure of the bottom gate described in the embodiment of the present invention 2 schematic diagram;
Fig. 4 is the top grid alternating expression thin-film transistor structure schematic diagram described in the embodiment of the present invention 3;
Fig. 5 is the coplanar formula thin-film transistor structure of the top grid schematic diagram described in the embodiment of the present invention 4.
Embodiment
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.Those skilled in the art should know, and following examples are only for the present invention is described, but are not used for limiting the scope of the invention.
The present invention's material used is can purchase available conventional material from the market, and not specified operational means also can be considered the technological means of this area routine.
Fig. 1 is the present embodiment bottom gate alternating expression thin-film transistor (TFT with inverted staggered structure) structural representation, as shown in Figure 1, described bottom gate alternating expression thin-film transistor comprises: substrate 1(glass), gate electrode 2, gate insulator 3, sull channel layer 4, source area 5 and drain region 6.
The chemical formula of the sull that described sull channel layer 4 adopts is Ba-Zn-Sn-O; The content mol ratio of each element is 0.5:2:2.
The preparation of this sull: selective chlorination barium, stannic chloride and zinc acetate compound are as precursor material, in liquid phase, these raw materials are mixed according to proportioning, be placed in water-bath stirs 0.5 hour at 50 ℃ of specified temps, by hydrolysis, condensation chemical reaction, in solution, form stable vitreosol system, then the colloidal sol in this system is deposited on substrate by spin coating method, in air atmosphere, be positioned at 120 ℃ of drying bakers and place 10 minutes, finally form the film that chemical formula is Ba-Zn-Sn-O.
Transistor preparation process is as Fig. 2:
A: clean substrate: use supersonic cleaning machine to clean substrate of glass, first substrate of glass is immersed in acetone to heating water bath to 50 ℃, ultrasonic 5 minutes; Again substrate of glass is immersed in absolute ethyl alcohol to heating water bath to 50 ℃, ultrasonic 5 minutes.
B: forming gate electrode above described substrate: make gate electrode area by lithography above described substrate, adopt the ITO(Indium Tin Oxides of magnetron sputtering technique growth one deck 150 nanometer thickness, nano indium tin metal oxide) conductive film, uses stripping means to form gate electrode.
C: form gate insulator in described gate electrode and described substrate above not by part that described gate electrode covered: described gate electrode and described substrate not by part that described gate electrode covered above, adopt PECVD(Plasma Enhanced Chemical Vapor Deposition, plasma enhanced chemical vapor deposition method) the folded gate dielectric layer of silicon dioxide of method growth one deck 150 nanometer thickness.
D: forming sull channel layer above described gate insulator: the sull that the chemical formula that forms approximately 100 nanometers above described gate insulator is Ba-Zn-Sn-O.
E: make described gate electrode exposed by etching, then the both sides above described sull channel layer form respectively source area and drain region: the above-mentioned made sample of getting ready is carried out to photoetching, use watery hydrochloric acid to etch away a part of sull channel layer, photoetching fall the gate insulator of appropriate section with hf etching again, exposes gate electrode; Then, adopting mask plate to cover does not need the place of aluminizing, and uses the mode of thermal evaporation to evaporate aluminium, and the Al electrode that forms 100nm at source-drain area is drawn, and has just obtained the TFT device of required preparation.
Experimental result shows, the bottom gate alternating expression thin-film transistor that the present embodiment obtains, and its cut-off current can be higher than 1 × 10
-11a, on-off ratio is higher than 7 × 10
6, mobility can be higher than 5cm
2/ (Vs), subthreshold value Slew Rate, lower than 1, is a kind of TFT device of better performances.
Fig. 3 is the coplanar formula thin-film transistor of the present embodiment bottom gate (TFT with inverted coplanar structure) structural representation, and the coplanar formula thin-film transistor of described bottom gate comprises: substrate 1, gate electrode 2, gate insulator 3, sull channel layer 4, source area 5 and drain region 6.
The chemical formula of the sull that described sull channel layer 4 adopts is Ba-Zn-Sn-O; The content mol ratio of each element is 0.6:2.2:2.The preparation method of this sull is with embodiment 1.
Described gate electrode 2 is arranged on substrate 1 (silicon base) top; Gate insulator 3 covers on gate electrode 2, and the part not covered by gate electrode 2 with substrate 1 contacts; The side of source area 5 above gate insulator 3, the opposite side of drain region 6 above gate insulator 3; Sull channel layer 4 is positioned at source area 5 and drain region 6 and gate insulator 3 tops.Gate electrode, source area and drain region adopt metal Ti material.
According to the architectural feature of the coplanar formula thin-film transistor of described bottom gate, those skilled in the art easily obtain corresponding preparation method according to embodiment 1, the difference is that:
B: forming gate electrode above described substrate: make gate electrode area by lithography above described substrate, adopt the Ti conductive film of magnetron sputtering technique growth one deck 200 nanometer thickness, use stripping means to form gate electrode.
C: form gate insulator in described gate electrode and described substrate above not by part that described gate electrode covered: described gate electrode and described substrate not by part that described gate electrode covered above, adopt the folded gate dielectric layer of silicon dioxide of magnetically controlled sputter method growth one deck 150 nanometer thickness.
The bottom gate alternating expression thin-film transistor that the present embodiment obtains has the same good performance with embodiment 1.
Fig. 4 is the present embodiment top grid alternating expression thin-film transistor (TFT with top gate staggered structure) structural representation, and described top grid alternating expression thin-film transistor comprises: substrate 1, gate electrode 2, gate insulator 3, sull channel layer 4, source area 5 and drain region 6.
The chemical formula of the sull that described sull channel layer 4 adopts is Ba-Zn-Sn-O; The content mol ratio of each element is 0.5:2.2:2.The preparation method of this sull is with embodiment 1.
Structure between transistorized each parts is as follows:
Described sull channel layer 4 arranges substrate (plastic-substrates) top, and source area 5 and drain region 6 are in sull channel layer 4 both sides and do not contact with each other; Gate insulator 3 is arranged on the top of sull channel layer 4; Gate electrode 2 is arranged on the top of described gate insulator 3.Gate electrode, source area and drain region adopt tin indium oxide material.
According to the architectural feature of described top grid alternating expression thin-film transistor, those skilled in the art easily obtain corresponding preparation method according to embodiment 1, the difference is that:
B: forming gate electrode above described substrate: make gate electrode area by lithography above described substrate, adopt the ITO(Indium Tin Oxides of magnetron sputtering technique growth one deck 100 nanometer thickness, nano indium tin metal oxide) conductive film, uses stripping means to form gate electrode.
C: form gate insulator in described gate electrode and described substrate above not by part that described gate electrode covered: described gate electrode and described substrate not by part that described gate electrode covered above, adopt ALD(Atomic layer deposition, ald) the folded gate dielectric layer of silicon dioxide of method growth one deck 100 nanometer thickness.
The bottom gate alternating expression thin-film transistor that the present embodiment obtains has the same good performance with embodiment 1.
Fig. 5 is the coplanar formula thin-film transistor of the present embodiment top grid (TFT with top gate coplanar structure) structural representation, and grid coplanar formula thin-film transistor in described top comprises: substrate 1, gate electrode 2, gate insulator 3, sull channel layer 4, source area 5 and drain region 6.
The oxide for calcium doping of the sull that described sull channel layer 4 adopts, the content mol ratio of Ca, Ba, Zn, the each element of Sn is 0.4:0.5:2:2.Miscellaneous part material is with embodiment 1.The preparation method of sull is: selective chlorination barium, stannic chloride, zinc acetate and calcium chloride, as presoma, in liquid phase EGME, described presoma is mixed according to molar ratio, at temperature 30-60 ℃, stir 0.5 hour, until form stable vitreosol system in solution, this colloidal sol is deposited in substrate by spin coating method, in air atmosphere, be positioned over heat treatment 10-30min at 110-140 ℃.
Miscellaneous part in the coplanar formula thin-film transistor of described top grid is identical with the material that miscellaneous part in the thin-film transistor of bottom gate alternating expression described in embodiment 1 adopts, except the material of described sull channel layer, the difference also having is that the structure between each parts is as follows:
According to the architectural feature of the coplanar formula thin-film transistor of described top grid, those skilled in the art easily obtain corresponding preparation method according to embodiment 1, therefore, at this, its preparation method are repeated no more.The bottom gate alternating expression thin-film transistor that the present embodiment obtains has the same good performance with embodiment 1.
Comparative example 1
The chemical formula of sull is Ga-ZTO; The content of each element is respectively Ga:Zn:Sn=0.5:2:2.Preparation method is: sol-gal process.Identical with the preparation method of example 1
The performance of the sull obtaining: cut-off current can reach 10
-10a, on-off ratio 4.35*10
6, mobility can reach 0.98cm
2/ (Vs), subthreshold value Slew Rate is 0.67
Comparative example 2
The chemical formula of existing sull is Ba-IZO; The content of each element is respectively Ba:In:Zn=0.5:2:2.Preparation method is: sputtering method.
The performance of the sull obtaining: cut-off current can reach 10
-10a, on-off ratio can reach 10
5, mobility can reach 1.43cm
2/ (Vs), subthreshold value Slew Rate is 0.94.
Than traditional thin-film transistor based on In-Ga-Zn-O, thin-film transistor based on Ba-Zn-Sn-O of the present invention has advantage: adopt the sull channel layer based on Ba-Zn-Sn-O, can strengthen the control ability that sull channel layer forms for charge carrier, improve on-off ratio, increase mobility, optimize sub-threshold slope; Guaranteeing, in the reliability and electrology characteristic basis of thin-film transistor, to make the sull channel layer of thin-film transistor have material range of choice widely; And by the doping of other elements, can modulate the characteristic of the sull channel layer based on Ba-Zn-Sn-O, further improve the reliability of thin-film transistor; Be conducive to form at low temperatures amorphous film, be conducive to guarantee consistency prepared by device, the stability of improving the device of manufacturing by low temperature process; Utilize Ba-ZTO can improve the light transmittance of some visible light wave ranges simultaneously, form composite construction and can realize the high light transmittance of whole visible light wave range with ZTO; Can not reduce under the prerequisite of device performance with the In that Sn replaces in traditional scheme, saving resource, reduces costs.
Above execution mode is only for illustrating the present invention; and be not limitation of the present invention; the those of ordinary skill in relevant technologies field; without departing from the spirit and scope of the present invention; can also make a variety of changes and modification; therefore all technical schemes that are equal to also belong to category of the present invention, and scope of patent protection of the present invention should be defined by the claims.
Claims (10)
1. a sull, is characterized in that, is Ba-Zn-Sn-O sull, and in oxide, the mol ratio of each element is Ba:Zn:Sn=0.4～0.6:1.8～2.2:2.
2. sull according to claim 1, it is characterized in that, in described sull, also doped with at least one in metallic element titanium, aluminium, magnesium, zirconium, hafnium, praseodymium, cerium, yttrium, lanthanum or neodymium, and the molar content of the metallic element adulterating is 10～99% of Ba molar content.
3. contain the transistor of the sull described in claim 1 or 2.
4. transistor according to claim 3, is characterized in that, described transistor is bottom gate alternating expression thin-film transistor; Described bottom gate alternating expression thin-film transistor comprises: sull channel layer, substrate, gate electrode, gate insulator, source area and drain region;
Described sull channel layer, gate electrode, gate insulator, source area and drain region are all arranged on substrate, and described sull channel layer and gate electrode are separated by gate insulator; Described source area and drain region are divided and are located at sull channel layer both sides, and do not contact with each other.
5. transistor according to claim 4, is characterized in that, from described substrate upwards, sets gradually gate electrode, gate insulator, sull channel layer; And gate insulator cover described gate electrode, with described substrate contact; Described source area and drain region are divided and are located at sull channel layer both sides, and do not contact with each other.
6. transistor according to claim 4, is characterized in that, from described substrate upwards, sets gradually sull channel layer, gate insulator, gate electrode; Described source area and drain region are divided and are located at sull channel layer both sides, and with described substrate contact.
7. transistor according to claim 4, is characterized in that, from described substrate upwards, sets gradually sull channel layer, gate insulator, gate electrode; The both sides that are located at sull channel layer top are divided in described source area and drain region, and with described substrate contact.
8. the arbitrary described transistorized method of preparation claim 3-7, comprise step: prepare conductive film with metal or conductive oxide, adopt sol-gal process to prepare described sull channel layer, prepare gate insulator with vapour deposition or magnetron sputtering or Atomic layer deposition method, by etching make described conductive film part form gate electrode, part forms source area and drain region.
9. method according to claim 8, it is characterized in that, adopt sol-gal process to prepare described sull channel layer, comprise: selective chlorination barium, stannic chloride and zinc acetate compound are as presoma, in EGME, described presoma is mixed according to molar ratio, at temperature 30-60 ℃, stir 15 minutes to 1 hour, until form stable vitreosol system in solution, this colloidal sol is deposited in substrate by spin coating method, in air atmosphere, is positioned over heat treatment 10-30min at 110-140 ℃.
10. method according to claim 8, it is characterized in that, adopt sol-gal process to prepare described sull channel layer, comprise: selective chlorination barium, stannic chloride, zinc acetate and metallic element titanium, aluminium, magnesium, zirconium, hafnium, praseodymium, cerium, yttrium, the soluble salt of lanthanum or neodymium, as presoma, in liquid phase, described presoma is mixed according to molar ratio, at temperature 30-60 ℃, stir, in solution, form stable vitreosol system, this colloidal sol is deposited in substrate by spin coating method, in air atmosphere, be positioned over heat treatment 10-30min at 110-140 ℃.
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Cited By (2)
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|---|---|---|---|---|
| CN108987465A (en) * | 2018-06-26 | 2018-12-11 | 浙江大学 | A kind of amorphous oxide semiconductor film and thin film transistor (TFT) containing II race element |
| US11624109B2 (en) | 2017-12-22 | 2023-04-11 | Lg Chem, Ltd. | Method for manufacturing transparent conductive film |
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| US6200680B1 (en) * | 1994-06-06 | 2001-03-13 | Nippon Shokubai Co., Ltd. | Fine zinc oxide particles, process for producing the same, and use thereof |
| CN102201367A (en) * | 2010-03-24 | 2011-09-28 | 三星电子株式会社 | Thin film transistor array panel and method of fabricating the same |
| US20120049181A1 (en) * | 2010-08-26 | 2012-03-01 | Industry-Academic Cooperation Foundation, Yonsei University | Composition for oxide thin film, method of preparing the composition, method of forming the oxide thin film, and electronic device using the composition |
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| US6200680B1 (en) * | 1994-06-06 | 2001-03-13 | Nippon Shokubai Co., Ltd. | Fine zinc oxide particles, process for producing the same, and use thereof |
| CN102201367A (en) * | 2010-03-24 | 2011-09-28 | 三星电子株式会社 | Thin film transistor array panel and method of fabricating the same |
| US20120049181A1 (en) * | 2010-08-26 | 2012-03-01 | Industry-Academic Cooperation Foundation, Yonsei University | Composition for oxide thin film, method of preparing the composition, method of forming the oxide thin film, and electronic device using the composition |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US11624109B2 (en) | 2017-12-22 | 2023-04-11 | Lg Chem, Ltd. | Method for manufacturing transparent conductive film |
| CN108987465A (en) * | 2018-06-26 | 2018-12-11 | 浙江大学 | A kind of amorphous oxide semiconductor film and thin film transistor (TFT) containing II race element |
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