CN103730451A - Multi-chip packaging body and packaging method - Google Patents
Multi-chip packaging body and packaging method Download PDFInfo
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- CN103730451A CN103730451A CN201310685792.6A CN201310685792A CN103730451A CN 103730451 A CN103730451 A CN 103730451A CN 201310685792 A CN201310685792 A CN 201310685792A CN 103730451 A CN103730451 A CN 103730451A
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- chip
- lead frame
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4901—Structure
- H01L2224/4903—Connectors having different sizes, e.g. different diameters
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73221—Strap and wire connectors
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
The invention provides a multi-chip packaging body and a packaging method. The multi-chip packaging body comprises a first function chip and a controller chip. The first function chip and the controller chip are arranged on a chip base of a lead frame respectively. The first function chip is welded on the chip base through tin welding powder and is connected to a pin of the lead frame through a chip welding wire. The first function chip is connected with and transmits dynamic signals to the controller chip so that the controller chip can determine working state and give real-time protection. The multi-chip packaging body and the packaging method have the advantages that the functional chip and the controller chip are arranged on the same lead frame, horizontally achieving multi-chip packaging, saving internal space of electronic products and achieving downsizing and lightweight of electronic products. A plurality of chips integrated in the multi-chip package structure can achieve different functions respectively, so that multi-function and high integration of electronic products are achieved. Besides, the chip is connected with the pin through the chip welding wire in an electrical mode, which is more suitable for high-power devices.
Description
Technical field
The present invention relates to semiconductor packaging field, relate in particular to a kind of multi-chip encapsulation body and method for packing thereof.
Background technology
Along with semiconductor technology evolves, integrated circuit multifunction, high integration require packaging body can realize multiple different function simultaneously.But in conventional package body,, because the number of chips of encapsulation is few, achieved function is very single, cannot meet the new demand that electronic market client improves constantly.Can only adopt respectively multiple different packaging body, realize respectively corresponding simple function, cause electronic terminal product cannot realize miniaturization, lighting.
Summary of the invention
Technical problem to be solved by this invention is, a kind of multi-chip encapsulation body and method for packing thereof are provided, it can arrange functional chip and controller chip on same lead frame, transversely realized multi-chip package, save the space of electronic product inside, realize the miniaturization of electronic product, lightening and multifunction.
In order to address the above problem; the invention provides a kind of multi-chip encapsulation body; comprise the first functional chip and controller chip; described the first functional chip and controller chip are arranged at respectively on the chip base of lead frame; and described the first functional chip is welded on described chip base by glass putty scolder and by chip bonding wire, is connected on the pin of described lead frame; described the first functional chip is connected with described controller chip and transmits Dynamic Signal to controller chip, so that controller chip is determined operating state and carried out real-time guard.
Further; also comprise one second functional chip; described the second functional chip is welded on described chip base by glass putty scolder and by chip bonding wire, is connected on the pin of described lead frame; described the second functional chip is connected with described controller chip and transmits Dynamic Signal to controller chip, so that controller chip is determined operating state and carried out real-time guard.
Further, described the first functional chip is temperature sensor chip or current sensor chip, and described the first functional chip provides dynamic temperature or current signal to controller chip.
A method for packing for above-mentioned multi-chip encapsulation body, comprises the steps:
Use glass putty scolder the first functional chip to be welded on the chip base of lead frame;
Adopt chip bonding wire that the first functional chip is connected with the pin of lead frame, described chip bonding wire adopts tin
The electrode of scolder and described the first functional chip and the welding of the pin of lead frame;
Lead frame is heated for the first time, to solidify described glass putty scolder;
Adopt weld bonds agent to be welded on the chip base of lead frame controller chip;
Lead frame is heated for the second time, to solidify described weld bonds agent;
Bonding, to realize being electrically connected between the pin of controller chip and the first functional chip and lead frame.
After heating steps, further comprise the step to the first functional chip surface clean for the first time, the glass putty scolder of volatilization while heating for the first time to remove.
After the first functional chip is welded on the step on the chip base of lead frame, further comprise that a use glass putty scolder is welded on the second functional chip the step on the chip base of lead frame;
After the step being connected with the pin of lead frame at the first functional chip, further comprise an employing chip bonding wire is connected the second functional chip step with the pin of lead frame, described chip bonding wire adopts glass putty scolder and the electrode of described the second functional chip and the welding of the pin of lead frame.
The described heating-up temperature of heating is for the first time 240 ~ 260 ℃, and be 5 ~ 10 minutes heating time.
The described heating-up temperature of heating is for the second time 160 ~ 180 ℃, and be 1 ~ 2 hour heating time.
Described controller chip adopts conductive silver paste to be welded on the chip base of lead frame.
The invention has the advantages that, functional chip and controller chip are set on same lead frame, transversely realized multi-chip package, save the space of electronic product inside, realize the miniaturization, lightening of electronic product.Integrated multiple chips in multichip packaging structure, can realize respectively different functions, such as current sense function, temperature sensing function, controller monitoring function etc., realizes the multifunction, highly integrated of electronic product.And adopt chip bonding wire to realize chip and be connected with the electricity of pin, be more applicable for high power device.
Accompanying drawing explanation
Figure 1 shows that the method for packing flow chart of multi-chip encapsulation body of the present invention;
Accompanying drawing 2A ~ accompanying drawing 2D is depicted as the process chart of multi-chip package method of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the embodiment of multi-chip encapsulation body provided by the invention and method for packing thereof is elaborated.
Figure 1 shows that the method for packing flow chart of multi-chip encapsulation body of the present invention, referring to Fig. 1, described method for packing comprises the steps: step S10, uses glass putty scolder the first functional chip to be welded on the chip base of lead frame; Step S11, employing chip bonding wire are connected the first functional chip with the pin of lead frame, described chip bonding wire adopts glass putty scolder and the electrode of described the first functional chip and the welding of the pin of lead frame; Step S12, lead frame is heated for the first time, to solidify described glass putty scolder; Step S13, adopt weld bonds agent to be welded on the chip base of lead frame controller chip; Step S14, lead frame is heated for the second time, to solidify described weld bonds agent; Step S15, Bonding, to realize being electrically connected between the pin of controller chip and the first functional chip and lead frame; Step S16, plastic packaging, cutting.
Accompanying drawing 2A ~ accompanying drawing 2D is depicted as the process chart of multi-chip package method of the present invention.
Referring to accompanying drawing 2A and step S10, use glass putty scolder that the first functional chip 1 is welded on the chip base 4 of lead frame 3.Described the first functional chip 1 is high-power chip, for example, and temperature sensor chip or current sensor chip.In this embodiment, described the first functional chip 1 is temperature sensor chip.Further, after step S10, also comprise that a use glass putty scolder is welded on the second functional chip 7 step on the chip base 4 of lead frame 3.Described the second functional chip 7 is high-power chip, and in this embodiment, described the second functional chip 7 is current sensor chip.Described the first functional chip 1 and the second functional chip 7 are welded on described chip base 4 by glass putty scolder.
The reason of using glass putty scolder as chip attach agent, the first functional chip 1 and the second functional chip 7 to be welded on chip base 4 is, in subsequent step, need to adopt glass putty scolder that described chip bonding wire 5 and electrode (not indicating in accompanying drawing) and the pin 6 of lead frame 3 of described the first functional chip 1 are welded, in follow-up heating steps for the first time, in order to solidify described glass putty scolder, need glass putty scolder to carry out high-temperature heating.If the first functional chip 1 and the second functional chip 7 stick on chip base 4 by conductive silver paste,, in follow-up heating steps for the first time, too high temperature can change to the chemical characteristic of conductive silver paste, thereby weakens or lose the function as binding agent.
Referring to accompanying drawing 2B and step S11, adopt chip bonding wire 5 that the first functional chip 1 is connected with the pin 6 of lead frame 3, described chip bonding wire 5 adopts electrode (not indicating in accompanying drawing) and the pin 6 of lead frame 3 of glass putty scolder and described the first functional chip 1 to weld.Further, after step S10, also comprise an employing chip bonding wire 5 is connected the second functional chip 7 step with the pin 6 of lead frame 3, described chip bonding wire 5 adopts electrode (not indicating in accompanying drawing) and the pin 6 of lead frame 3 of glass putty scolder and described the second functional chip 7 to weld.Because described the first functional chip 1 and the second functional chip 7 are high-power chip, its operating current is larger, and in order to reduce resistance, described the first functional chip 1 and the second functional chip 7 adopt chip bonding wire 5 to be electrically connected with the pin 6 of described lead frame 3.Described chip bonding wire 5 can be copper sheet.Simultaneously because the welding performance of glass putty scolder is better than conductive silver paste, so adopt glass putty scolder as weld bonds agent when chip welds.
Referring to step S12, lead frame 3 is heated for the first time, to solidify described glass putty scolder.In this embodiment, heating for the first time heater used is reflow ovens, and heating-up temperature is 240 ~ 260 ℃, and be 5 ~ 10 minutes heating time.
After step S12, further comprise the step of a pair of the first functional chip 1 and the second functional chip 7 surface clean, the glass putty scolder of volatilization while heating for the first time to remove.While heating for the first time, the glass putty solder compositions of volatilization can be attached to the first functional chip 1 and the second functional chip 7 surfaces, affect the electricity switching performance of the first functional chip 1 and the second functional chip 7, need to the contamination on the first functional chip 1 and the second functional chip 7 surfaces be removed by chemical solvent, in this embodiment, described chemical solvent is neutral water-base cleaning liquid.
Referring to accompanying drawing 2C and step S13, adopt weld bonds agent to be welded on the chip base 4 of lead frame 3 controller chip 2.In this embodiment, described weld bonds agent is conductive silver paste.Due in follow-up heating steps for the second time, heating-up temperature is lower, and the chemical property of described conductive silver paste can not change, so, adopt in this step conductive silver paste to weld described controller chip 2.
Step S14, heats for the second time to lead frame 3, to solidify described weld bonds agent.In this embodiment, heating for the second time heater used is baking oven, and heating-up temperature is 160 ~ 180 ℃, and be 1 ~ 2 hour heating time, and described conductive silver paste is solidified.
Referring to accompanying drawing 2D and step S15, Bonding, to realize being electrically connected between the pin 6 of controller chip 2 and the first functional chip 1 and lead frame 3, in this embodiment, also comprises the second functional chip 7.In this step, adopt metal wire 8, for example, copper cash or gold thread, be connected to each other the pin 6 of controller chip 2 and the first functional chip 1, the second functional chip 7 and lead frame 3, to realize, conducts.Because controller chip 2 is small-power chip, so, when controller chip 2 carries out Bonding, can adopt metal wire.
Referring to step S16, plastic packaging, cutting.This step is this area common technology, is not repeated herein.
The present invention also provides a kind of multi-chip encapsulation body, referring to Fig. 2 D, a kind of multi-chip encapsulation body comprises the first functional chip 1 and controller chip 2, described the first functional chip 1 and controller chip 2 are arranged at respectively on the chip base 4 of lead frame 3, and described the first functional chip 1 is welded on described chip base 4 and by chip bonding wire 5, is connected on the pin 6 of described lead frame 3 by glass putty scolder.Described the first functional chip 1 is connected and transmits Dynamic Signal to controller chip 2 with described controller chip 2, so that controller chip 2 is determined operating state and carried out real-time guard.
Further, described multi-chip encapsulation body also comprises one second functional chip 7, and described the second functional chip 7 is welded on described chip base 4 and by chip bonding wire 5, is connected on the pin 6 of described lead frame 3 by glass putty scolder.Described the second functional chip 7 is connected and transmits Dynamic Signal to controller chip 2 with described controller chip 2, so that controller chip 2 is determined operating state and carried out real-time guard.
In this embodiment; described the first functional chip 1 is temperature sensor chip; described the second functional chip 7 is current sensor chip; described the first functional chip 1 provides dynamic temperature signal to controller chip 2; described the second functional chip 7 provides dynamic current signal to controller chip 2, and controller chip 2 is determined the operating state of packaging body and carries out real-time guard according to temperature signal and current signal.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (9)
1. a multi-chip encapsulation body; it is characterized in that; comprise the first functional chip and controller chip; described the first functional chip and controller chip are arranged at respectively on the chip base of lead frame; described the first functional chip is welded on described chip base by glass putty scolder and by chip bonding wire, is connected on the pin of described lead frame; described the first functional chip is connected with described controller chip and transmits Dynamic Signal to controller chip, so that controller chip is determined operating state and carried out real-time guard.
2. multi-chip encapsulation body according to claim 1; it is characterized in that; also comprise one second functional chip; and described the second functional chip is welded on described chip base by glass putty scolder and by chip bonding wire, is connected on the pin of described lead frame; described the second functional chip is connected with described controller chip; and transmit Dynamic Signal to controller chip, so that controller chip is determined operating state and is carried out real-time guard.
3. multi-chip encapsulation body according to claim 1, is characterized in that, described the first functional chip is temperature sensor chip or current sensor chip, for dynamic temperature or current signal are provided to controller chip.
4. a method for packing for multi-chip encapsulation body claimed in claim 1, is characterized in that, comprises the steps: to use glass putty scolder the first functional chip to be welded on the chip base of lead frame; Adopt chip bonding wire that the first functional chip is connected with the pin of lead frame, described chip bonding wire adopts glass putty scolder and the electrode of described the first functional chip and the welding of the pin of lead frame; Lead frame is heated for the first time, to solidify described glass putty scolder; Adopt weld bonds agent to be welded on the chip base of lead frame controller chip; Lead frame is heated for the second time, to solidify described weld bonds agent; Bonding, to realize being electrically connected between the pin of controller chip and the first functional chip and lead frame.
5. the method for packing of multi-chip encapsulation body according to claim 4, is characterized in that, after heating steps, further comprises the step to the first functional chip surface clean for the first time, the glass putty scolder of volatilization while heating for the first time to remove.
6. the method for packing of multi-chip encapsulation body according to claim 4, it is characterized in that, after the first functional chip is welded on the step on the chip base of lead frame, further comprise that a use glass putty scolder is welded on one second functional chip the step on the chip base of lead frame; After the step being connected with the pin of lead frame at the first functional chip, further comprise an employing chip bonding wire is connected the second functional chip step with the pin of lead frame, described chip bonding wire adopts glass putty scolder and the electrode of described the second functional chip and the welding of the pin of lead frame.
7. the method for packing of multi-chip encapsulation body according to claim 4, is characterized in that, the described heating-up temperature of heating is for the first time 240 ~ 260 ℃, and be 5 ~ 10 minutes heating time.
8. the method for packing of multi-chip encapsulation body according to claim 4, is characterized in that, the described heating-up temperature of heating is for the second time 160 ~ 180 ℃, and be 1 ~ 2 hour heating time.
9. the method for packing of multi-chip encapsulation body according to claim 4, is characterized in that, described controller chip adopts conductive silver paste to be welded on the chip base of lead frame.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310685792.6A CN103730451A (en) | 2013-12-16 | 2013-12-16 | Multi-chip packaging body and packaging method |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310685792.6A CN103730451A (en) | 2013-12-16 | 2013-12-16 | Multi-chip packaging body and packaging method |
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| CN103730451A true CN103730451A (en) | 2014-04-16 |
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| CN201310685792.6A Pending CN103730451A (en) | 2013-12-16 | 2013-12-16 | Multi-chip packaging body and packaging method |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109461715A (en) * | 2018-09-29 | 2019-03-12 | 南京中感微电子有限公司 | A kind of multi-die packages body |
| CN109950236A (en) * | 2017-12-21 | 2019-06-28 | 北京万应科技有限公司 | Sensor microsystems packaging method and sensor microsystems |
| CN111816575A (en) * | 2020-06-19 | 2020-10-23 | 浙江亚芯微电子股份有限公司 | Three-chip packaging process |
| CN113663895A (en) * | 2021-08-26 | 2021-11-19 | 南通斯康泰智能装备有限公司 | IC pin cross-section tin coating process and tin coating equipment thereof |
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| US20050224924A1 (en) * | 2004-03-30 | 2005-10-13 | Koh Kwang W | Leadless semiconductor package and manufacturing method thereof |
| CN1862808A (en) * | 2005-05-11 | 2006-11-15 | 盛群半导体股份有限公司 | Chip architecture with multiple functions |
| US20080197465A1 (en) * | 2007-02-20 | 2008-08-21 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method of manufacturing the same |
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2013
- 2013-12-16 CN CN201310685792.6A patent/CN103730451A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050224924A1 (en) * | 2004-03-30 | 2005-10-13 | Koh Kwang W | Leadless semiconductor package and manufacturing method thereof |
| CN1862808A (en) * | 2005-05-11 | 2006-11-15 | 盛群半导体股份有限公司 | Chip architecture with multiple functions |
| US20080197465A1 (en) * | 2007-02-20 | 2008-08-21 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method of manufacturing the same |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109950236A (en) * | 2017-12-21 | 2019-06-28 | 北京万应科技有限公司 | Sensor microsystems packaging method and sensor microsystems |
| CN109461715A (en) * | 2018-09-29 | 2019-03-12 | 南京中感微电子有限公司 | A kind of multi-die packages body |
| CN111816575A (en) * | 2020-06-19 | 2020-10-23 | 浙江亚芯微电子股份有限公司 | Three-chip packaging process |
| CN113663895A (en) * | 2021-08-26 | 2021-11-19 | 南通斯康泰智能装备有限公司 | IC pin cross-section tin coating process and tin coating equipment thereof |
| CN113663895B (en) * | 2021-08-26 | 2023-04-07 | 南通斯康泰智能装备有限公司 | IC pin cross-section tin coating process and tin coating equipment thereof |
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Application publication date: 20140416 |