CN103715117A - Device and method for manufacturing semiconductor device - Google Patents
Device and method for manufacturing semiconductor device Download PDFInfo
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- CN103715117A CN103715117A CN201310375764.4A CN201310375764A CN103715117A CN 103715117 A CN103715117 A CN 103715117A CN 201310375764 A CN201310375764 A CN 201310375764A CN 103715117 A CN103715117 A CN 103715117A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
The invention provides a device and method for manufacturing semiconductor devices, which minimizing dislocation of a bonding layer for thinner semiconductor chips. The device comprises a supplying portion for supplying rolled sheets, and an attaching portion which attaches wafers to a pulled-out sheet portion and rings for pulling the sheets to the vacant portion on the periphery of the wafer on the sheet. The sheet comprises a substrate, a peeling layer on the substrate and an adhesive layer on the peeling layer. The attaching portion attaches so that a sheet, of which the referential direction of a directional identifying portion and the pulling-out direction of the sheet is at a 15-75 degrees, is arranged on a wafer.
Description
Related application
On September 28th, 2012) and No. 2013-94679 (applying date: on April 26th, 2013), as application basis, enjoy priority of Japanese patent application the application be take No. 2012-218800, the Japanese patent application (applying date:.The application is by the full content that comprises basis application with reference to these basis applications.
Technical field
The present invention relates to the manufacture method of manufacturing installation and the semiconductor device of semiconductor device.
Background technology
In the one side of wafer, be formed with the circuit of a plurality of semiconductor devices.Another side at wafer is formed with bond layer.
The manufacture method that has following semiconductor device: when utilizing cutter sheet material (dicing blade) that wafer is divided into single semiconductor chip, bond layer is also cut apart from semiconductor wafer side in the lump with wafer.This manufacture method can be dwindled the dislocation (position skew) of semiconductor chip and bond layer.
On the other hand, have and be commonly referred to as the first manufacture method of the semiconductor device of cutting: when wafer is divided into single semiconductor chip, utilize cutter sheet material on wafer, to form groove, from the back side that does not form circuit of wafer, carry out grinding until the thickness of arrival slot afterwards.This manufacture method can reduce the thickness of semiconductor chip.
Formerly in cutting, because wafer is divided into semiconductor chip during grinding overleaf, so cannot bond layer be set at chip back surface in advance.Because cannot combine two above-mentioned manufacturing directions, so be difficult to reduce bond layer with respect to the dislocation of the semiconductor chip of thin thickness.
Summary of the invention
The problem that invention will solve
The invention provides and can reduce bond layer with respect to the manufacturing installation of the semiconductor device of the dislocation of the semiconductor chip of thin thickness, the manufacture method of semiconductor device.
For solving the technical scheme of problem
The manufacturing installation of the semiconductor device that execution mode relates to, is characterized in that possessing: supply unit, and it is for supplying with the sheet material that is wound into cylinder shape; With attaching portion, the part that it is drawn out at the described sheet material that is wound into cylinder shape from described supply unit attaches wafer, in the described wafer of being positioned at of described sheet material blank parts around, attach the ring for the described sheet material that stretches, described sheet material has base base material and bond layer, described attaching portion attaches, and makes take direction that the direction identification part that arranges on described wafer is benchmark and the angle that pull-out direction was become of sheet material described in cylinder shape to become 15～75 degree.
The manufacture method of the semiconductor device that execution mode relates to is pulled out described sheet material from be wound into the sheet material of cylinder shape; The part being drawn out at described sheet material attaches the wafer that is provided with a plurality of semiconductor chips, in the described wafer of being positioned at of described sheet material blank parts around, attaches ring; By described wafer is placed on objective table, along the face direction that is attached at described sheet material of described wafer, increase the distance of described objective table and described ring, the bond layer of described sheet material is separated into and the corresponding shape of described semiconductor chip thus; In the lump semiconductor chip described in each is peeled off from described sheet material with described bond layer, the manufacture method of this semiconductor device is characterised in that, described sheet material have base material, on described base material, arrange peel off promoting layer and peeling off the bond layer arranging in promoting layer.
Accompanying drawing explanation
Fig. 1 means the flow chart of the manufacture method of semiconductor device.
Fig. 2 means the stereogram of the manufacture process of semiconductor device.
Fig. 3 means the stereogram of the manufacture process of semiconductor device.
Fig. 4 means the stereogram of the manufacture process of semiconductor device.
Fig. 5 means the stereogram of the manufacture process of semiconductor device.
Fig. 6 means the stereogram of the manufacture process of semiconductor device.
Fig. 7 means the stereogram of the manufacture process of semiconductor device.
Fig. 8 means the cutaway view of the manufacture process of semiconductor device.
Fig. 9 means the stereogram of the manufacture process of conductor means.
Figure 10 means the cutaway view of the manufacture process of semiconductor device.
Figure 11 means the stereogram of the manufacture process of semiconductor device.
Figure 12 means the figure of manufacturing installation.
Figure 13 means the cross section structure figure of supply part.
Figure 14 means the figure of the manufacture process of supply part.
Figure 15 means the figure of manufacturing installation.
Figure 16 means the figure of manufacturing installation.
Figure 17 means the figure of manufacturing installation.
Figure 18 is the percentage elongation of supply part and the graph of a relation of hot strength.
Figure 19 is apart from the graph of a relation with angle
Description of reference numerals
100 ... wafer, 101 ... blade material, 102 ... groove, 103 ... protection sheet material, 104 ... grinding tool, 105 ... DAF, 106 ... band, 107 ... ring, 108 ... base material, 109 ... peel off promoting layer, 110 ... objective table, 111 ... chip material, 112 ... framework, 113 ... supply part, 114 ... pull-out direction, 115 ... mounting portion, 116 ... direction identification part, 117 ... high elastic modulus band, 201 ... supply unit, 202 ... attaching portion, 203 ... recoverer, 204 ... support portion
Embodiment
Below, about the manufacture method of semiconductor device and an execution mode applying the manufacturing installation of this manufacture method, referring to figs. 1 through Figure 11, describe.In addition,, in each execution mode, identical in fact component part is marked to identical Reference numeral, and description thereof is omitted.But accompanying drawing is schematically, thickness from the relation of planar dimension, the thickness ratios of each layer etc. are different with reality.In addition, the term of inferior direction in the expression in explanation, indication forms face side by the circuit of semiconductor substrate described later and was made as relative direction when upper, sometimes to take the real direction that acceleration of gravity direction is benchmark different.
First, the manufacture method about the semiconductor device of present embodiment describes.Fig. 1 illustrates the manufacture method of semiconductor device.Fig. 2 illustrates the manufacture process of semiconductor device to Figure 11.
First, as shown in Figure 2, along be formed with a plurality of integrated circuits wafer 100 guarantee at the Cutting Road between each integrated circuit (dicing street), utilize blade material 101 on wafer 100, to form groove 102(cutting action 1).Now, than the thickness of wafer 100 shallow from being formed with face (surface) side of integrated circuit, form groove 102.That is,, in the stage of cutting action 1, although becoming, each integrated circuit by groove, divides the state that comes, connects in face (back side) side of surperficial opposition side respectively.
Then, as shown in Figure 3, protection sheet material 103 is set on wafer 100 surfaces that are formed with groove 102.Protection sheet material 103 is not injured by the dust of grindstone dust etc. for the protection of integrated circuit.In addition, protection sheet material 103 arranges in order to remain on the position separately of each integrated circuit separated after the grinding of the back side described later.In protection sheet material, can use having both of for example take that polyvinyl chloride and/or polyolefin be principal component for preventing the good cementability of intrusion and the film of good fissility of polluter.
Next, as shown in Figure 4, grinding (grinding back surface operation 2) is carried out at the back side of 104 pairs of wafers 100 of grinding tool such as grinding pad (pad) of the emery wheel of rotation and/or supply lapping liquid (slurry).Carry out the grinding of wafer 100, until the residual thickness of wafer 100 at least reaches the degree of depth of the groove 102 forming in cutting action 1.Be ground until the wafer 100 of the degree of depth of arrival slot 102 as shown in Figure 5, becomes each state being separated from each other of each integrated circuit.
As shown in Figure 6, by wafer 100 mountings that become the state that each integrated circuit is separated from each other to be with (the wafer installation procedure 3) on 106 that is provided with from the teeth outwards adhesive film (DAF105).In wafer 100 blank parts around that is positioned at 106, load for supporting the also ring 107 of transfer wafers 100.DAF105 becomes the state of the rear side that is bonded to wafer 100 in wafer installation procedure 3.DAF105 can be used for example take the adhesion sheet material that epoxy and/or polyimides, acrylic acid is principal component.With 106, can use on base material 108 and arrange and peel off the laminate film that promoting layer (RL) 109 forms, this base material 108 for example be take polyvinyl chloride and/or polyolefin and is principal component and easily extends, and this is peeled off promoting layer (RL) 109 and uses the fluorine resins such as polytetrafluoroethylene and/or take sclerosis when irradiation ultraviolet radiation and ultraviolet hardening resin that the epoxy easily peeled off of becoming is principal component etc.
As shown in Figure 7, from being positioned in the wafer 100 106, remove screening glass material 103.The wafer 100 of having removed protection sheet material 103 becomes that face side exposes and rear side is attached at the state of DAF105.In addition, in this stage, as shown in Figure 8, wafer 100 becomes the state that each integrated circuit is separated from each other, and DAF105 is not separated into and the corresponding shape of each integrated circuit, is the shape roughly the same with the profile of wafer 100 integral body.
As shown in Fig. 8 and Fig. 9, Figure 10, will be positioned in rear side with the wafer 100 on 106, be that 108 sides of base material load on objective table 110.At wafer 100 after objective table 110 mounting, make to encircle 107 with respect to wafer 100 overleaf side relatively by moving (expansion operation 4) apart from Ex to the direction of leaving.If load and make to encircle 107 move under the state of objective table 110 at wafer 100, to being with 106 to apply tension force, with 106 elongations, make each integrated circuit distance each other become large.
If to being with 106 to apply tension force, the DAF105 also one side being attached to 106 applies tension force.The another side of DAF105 is attached at wafer 100.At this, wafer 100 is used the semi-conducting materials such as silicon and/or sapphire, gallium arsenic.These semi-conducting materials be with 106 and/or DAF105 compare, if modulus of elasticity is more than or equal to 10 times, with respect to tension force, be difficult to extend.That is the major part that, puts on the tension force of DAF105 acts on the elongation of the Cutting Road part of each integrated circuit key.Its result, when the movement of ring 107 exceeds certain certain limit, DAF105, at Cutting Road partial rupture, is separated into (be strictly with respect to the part of by Cutting Road dividing slightly more similar figures) shape roughly the same with the part of dividing by Cutting Road (chip material 111 described later).
During above-mentioned expansion operation 4, preferably, the ultimate elongation degree of DAF105 is less than or equal to 130%, is more preferably and is less than or equal to 50%.This be because, calculate semiconductor chip be divided into φ 300mm wafer 100 after the square of length of side 20mm be attached at DAF105 with 106 state under expanded 30mm(make to encircle 107 by Ex=30mm to back side side shifting) time, the incision of 30 μ m (kerf) width (distance of semiconductor chip part) expands to 130%.Now, suppose and be with 106 to extend equably.And if consider wafer 100 the transporting property in the wafer automatic conveying device after expansion operation 4, preferred, the distance Ex of expansion (making to encircle 107 to back side side shifting) is less than or equal to 12mm.Because now, the width of the line of cut in above-mentioned supposition is 50%.But lower than 1% in the situation that, the possibility that DAF105 breaks when pulling out to pull-out direction 114 by supply unit 201 raises, so improper at ultimate elongation degree.
Figure 12 means the figure of manufacturing installation.Semiconductor wafer 100 by with 106 is given high elastic modulus band 117 around, and prevents the preferential stretching of wafer 100 peripheries, can in 100 of wafers, expand equably between semiconductor sub-prime.The size of high elastic modulus band 117 now, preferably, internal diameter is larger than φ 305mm, external diameter is less than or equal to 340mm.Modular ratio DAF105 is high with the synthetic modulus of elasticity (the outward appearance modulus of elasticity of duplexer) with 106.
After DAF105 separation, each the independent sheet material (chip material 111) by the wafer of each integrated circuit separation 100 and DAF105, a group by a group from being with 106 to peel off, and are attached to (installation procedure 5) on framework 112 via DAF105 by chip material 111.After chip material 111 is attached on framework 112, utilize baking oven and/or hot plate to heat framework 112, and chip material 111 and framework 112 are firmly fixed.
According to the manufacture method of above-mentioned semiconductor device, even if carry out before grinding step 2 overleaf, in the situation of cutting action 1, also DAF105 can be arranged on to the back side of chip material 111 with the roughly the same shape of the profile with chip material 111.In addition, DAF105 is with respect to the position of chip material 111, because DAF105 is separated along Cutting Road ego integrity ground under the state that is attached at wafer 100, so precision is high.In addition, the operation needing especially in order to take high position precision setting DAF105 is only expansion operation 4.Wafer 100 is only carried out to expansion operation 41 time.For example at each wafer, 300 chip materials 111 are set and expand operation cost in the situation that of 3 seconds, the time that the special operation that must append spends is only 0.01 second at each chip material 111, and production is high.
The DAF105 using in manufacture method about above-mentioned semiconductor device and be with 106 to describe.As shown in figure 13, in the one side of base material 108, be formed with and peel off promoting layer 109 on 106.With 106 peel off 109 sides of promoting layer, become the state that is provided with in advance DAF105 before mounting wafer 100.
Be with 106, as shown in figure 14, can form by the DAF105 that peels off promoting layer 109 and sheet of the sheet of fitting on sheet base material 108.Base material 108 and peel off promoting layer 109, DAF105, pulls out the material that is wound into the state of cylinder shape respectively to the direction of pull-out direction 114, make base material 108 and peel off promoting layer 109, DAF105 overlaps.Use warmed-up roller for example to the base material 108 having overlapped and peel off promoting layer 109, DAF105 exerts pressure, makes its laminating.The base material 108 of having fitted and peel off promoting layer 109, DAF105 the direction to pull-out direction 114 is wound as cylinder shape supply part (sheet material) 113 again.
In addition, now, about the blank parts beyond the part of lift-launch wafer 100 and ring 107, the part that DAF105 is not necessary especially.Therefore can be that unwanted DAF105-2 removes in advance attaching wafer 100 previous crops as shown in figure 14.
About having applied the execution mode of manufacturing installation of the manufacture method of above-mentioned semiconductor device, describe.Figure 15 illustrates a part for the manufacturing installation of the manufacture method of having applied semiconductor device.In manufacturing installation, be provided with the supply unit 201 of feeding rollers tubular supply part 113.Supply unit 201 is pulled out supply part 113 supply with to the direction of pull-out direction 114.
In the position that is provided with DAF105 of the supply part 113 being drawn out, be provided with for attaching the attaching portion 202 of wafer 100 and ring 107.In attaching portion 202, be provided with for loading the mounting portion 115 of wafer 100 and ring 107.
In mounting portion 115, wafer 100 and ring 107 are attached at after supply part 113, are positioned at ring 107 unwanted supply part 113-2 around and are reclaimed by recoverer 203.
In order to attach wafer 103 and ring 107 on supply part 113, and be provided with the support portion 204 for supply part 113 is supported.For mounting portion 115 is attached and reduces distance, finally attaching towards supply part 113, supply parts 113 are supported in support portion 204 for this reason.
At this, wafer 100 is provided with direction identification part 116.Setting party is to identification part 116, and the direction that to make with respect to the either party of take in the Cutting Road of both direction be benchmark can be identified the direction of wafer 100.
Attaching portion 202 attaches, and makes the direction and pull-out direction 114 angulations that by direction identification part 116, identify become 15～75 degree.Attach and make the direction and pull-out direction 114 angulations that by direction identification part 116, identify become 15～75 degree, so for example as shown in figure 16, in mounting portion 115, loaded after wafer 100 and ring 107, can keep carrying state and make wafer 100 rotations make the direction and pull-out direction 114 angulations that by direction identification part 116, identify become 15～75 degree, be posted to afterwards on supply part 113.
Or, as shown in Figure 17, in mounting portion 115, loaded after ring 107, can the direction that identify by direction identification part 116 and pull-out direction 114 angulations be become under the states of 15～75 degree wafer 100 mountings on mounting portion 115 in involutory direction, be posted to afterwards on supply part 113.
As shown in Figure 18, different from the relation of elongation with hot strength in direction 117 at pull-out direction 114.If make this have anisotropic supply part 113, in expansion operation 4, extend, the amount of its elongation is different in pull-out direction 114 and direction 117.It is generally acknowledged, this is because in the manufacturing process of supply part 113, will be wound into the base material 108 of cylinder shape and peel off promoting layer 109 and/or DAF105 along pull-out direction pull out on one side exert pressure on one side.
Therefore, as shown in Figure 19, Yi Bian make to identify direction and pull-out direction 114 angulations change by direction identification part 116, Yi Bian implement expansion operation 4, evaluate the released state of DAF105 and the state of peeling off promoting layer 109.Apart from Ex, be 2.5mm place, making in any case the direction and pull-out direction 114 angulations that by direction identification part 116, identify change, the part in 100 of wafers all cannot be completely separated by DAF105.On the other hand, the direction no matter identifying by direction identification part 116 and pull-out direction 114 angulations are any angles, and in the situation that being 3.0mm apart from Ex, DAF105 can both be separated well.
In the situation that the direction identifying by direction identification part 116 and pull-out direction 114 angulations are 0 degree and 90 degree, are 3.5mm apart from Ex, DAF105 is can be well separated, but even to peel off promoting layer 109 also separated.
In addition, in the situation that the direction identifying by direction identification part 116 and pull-out direction 114 angulations are 15 degree and 75, spend, apart from Ex, be 3.0mm～4.0mm, DAF105 can be separated well.In the situation that being 5.0mm apart from Ex, DAF105 is can be well separated, but even to peel off promoting layer 109 also separated.That is,, about angle 15～75 degree, can apart from Ex, there is vast remainder (マ ー ジ Application) state under manufacture.
And in the situation that the direction identifying by direction identification part 116 and pull-out direction 114 angulations are 30 degree～60 degree, even if will be made as 9.0mm apart from Ex, DAF105 is also can be well separated and to peel off promoting layer 109 not separated.That is,, about angle 30～60 degree, can under the state apart from Ex with more vast remainder, manufacture.
According to above-mentioned manufacturing installation, with the manufacture method of above-mentioned semiconductor-fabricating device in the same manner, even carried out cutting action 1 prior to grinding back surface operation 2 in the situation that, also can be by DAF105 by arranging at chip material 111 back sides with the roughly the same shape of the profile of chip material 111.In addition, DAF105 is with respect to the position of chip material 111, because DAF105 is separated along Cutting Road ego integrity ground under the state that is attached at wafer 100, so precision is high.In addition, for the positional precision with high arranges DAF105, essential especially operation is only expansion operation 4.Wafer 100 is only carried out to one extension operation 4.
And, in the situation that the direction identifying by direction identification part 116 and pull-out direction 114 angulations are made as to 26～75 degree, can there is vast remainder and manufacture.
Several execution mode of the present invention has more than been described, but has been not limited to the formation shown in each execution mode, various condition, these execution modes propose as an example, have no intention to limit scope of invention.These new execution modes can be implemented with other various forms, can in the scope that does not depart from inventive concept, carry out various omissions, displacement, change.These execution modes and/or its distortion are contained in scope of invention and/or purport, and are included in the invention and equivalency range thereof that technical scheme records.
Claims (6)
1. a manufacture method for semiconductor device,
From be wound into the sheet material of cylinder shape, pull out described sheet material,
The part that is drawn out at described sheet material attaches the wafer that is provided with a plurality of semiconductor chips, in the described wafer of being positioned at of described sheet material blank parts around, attaches ring,
By described wafer is placed in to objective table, and along the face direction that is attached at described sheet material of described wafer, increase the distance of described objective table and described ring, the bond layer of described sheet material is separated into and the corresponding shape of described semiconductor chip thus;
In the lump semiconductor chip described in each is peeled off from described sheet material with described bond layer,
The feature of the manufacture method of this semiconductor device comprises:
Described sheet material possesses base material, is located at peeling off promoting layer and being located at the described bond layer of peeling off in promoting layer on described base material,
Described attaching portion attaches, and makes take the direction that the direction identification part that arranges on described wafer is benchmark to become 15～75 degree with the angle that pull-out direction was become of the described sheet material of cylinder shape.
2. a manufacturing installation for semiconductor device, is characterized in that,
Possess:
Supply unit, it is for supplying with the sheet material that is wound into cylinder shape; With
Attaching portion, it attaches wafer in the part of pulling out from the described sheet material that is wound into cylinder shape of described supply unit, and attaches the ring for the described sheet material that stretches in the described wafer of being positioned at of described sheet material blank parts around,
Described sheet material has base material and bond layer,
Described attaching portion attaches, and makes take direction that the direction identification part that arranges on described wafer is benchmark and the angle that pull-out direction was become of sheet material described in cylinder shape to become 15～75 degree.
3. the manufacturing installation of semiconductor device according to claim 2, is characterized in that,
Described attaching portion has:
Mounting portion, it is for loading described wafer and described ring; With
Support portion, it is in order to attach described sheet material and distance to be approached for being placed in described wafer in described mounting portion and described ring, by described sheet material in pull-out direction upper support.
4. the manufacturing installation of semiconductor device according to claim 3, is characterized in that,
Described attaching portion, along and to take described angle between the direction that described direction identification part is benchmark be that the directions of 15～75 degree are placed in described wafer after described mounting portion, attach described sheet material.
5. the manufacturing installation of semiconductor device according to claim 3, is characterized in that,
Described mounting portion is rotated under the state that has loaded described wafer, to become and to take described angle between the direction that described direction identification part is benchmark, is the directions of 15～75 degree.
6. a manufacture method for semiconductor device,
From be wound into the sheet material of cylinder shape, pull out described sheet material;
The part being drawn out at described sheet material attaches the wafer that is provided with a plurality of semiconductor chips, and attaches ring in the described wafer of being positioned at of described sheet material blank parts around;
By described wafer is placed on objective table, and along the face direction that is attached at described sheet material of described wafer, increase the distance of described objective table and described ring, the bond layer of described sheet material is separated into and the corresponding shape of described semiconductor chip thus;
In the lump semiconductor chip described in each is peeled off from described sheet material with described bond layer,
The manufacture method of this semiconductor device is characterised in that,
Described sheet material have base material, on described base material, arrange peel off promoting layer and peeling off the bond layer arranging in promoting layer.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP218800/2012 | 2012-09-28 | ||
| JP2012218800 | 2012-09-28 | ||
| JP2013094679A JP6055369B2 (en) | 2012-09-28 | 2013-04-26 | Semiconductor device manufacturing apparatus and semiconductor device manufacturing method |
| JP094679/2013 | 2013-04-26 |
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| Publication Number | Publication Date |
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| CN103715117A true CN103715117A (en) | 2014-04-09 |
| CN103715117B CN103715117B (en) | 2016-11-16 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201310375764.4A Active CN103715117B (en) | 2012-09-28 | 2013-08-26 | The manufacture device of semiconductor device and the manufacture method of semiconductor device |
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| CN106057792A (en) * | 2015-04-07 | 2016-10-26 | 株式会社东芝 | Method for manufacturing semiconductor device |
| CN107275284A (en) * | 2017-06-29 | 2017-10-20 | 华进半导体封装先导技术研发中心有限公司 | A kind of preparation method of DAF chips |
| CN110021546A (en) * | 2018-01-05 | 2019-07-16 | 东京毅力科创株式会社 | Substrate processing device, processing method for substrate and computer storage medium |
| US20210129260A1 (en) * | 2019-11-06 | 2021-05-06 | Disco Corporation | Wafer processing method |
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| CN110021546B (en) * | 2018-01-05 | 2024-04-12 | 东京毅力科创株式会社 | Substrate processing apparatus, substrate processing method, and computer storage medium |
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| US11712747B2 (en) * | 2019-11-06 | 2023-08-01 | Disco Corporation | Wafer processing method |
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| CN103715117B (en) | 2016-11-16 |
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