CN103715082B - The processing method of chip - Google Patents
The processing method of chip Download PDFInfo
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- CN103715082B CN103715082B CN201310445302.5A CN201310445302A CN103715082B CN 103715082 B CN103715082 B CN 103715082B CN 201310445302 A CN201310445302 A CN 201310445302A CN 103715082 B CN103715082 B CN 103715082B
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- 238000003672 processing method Methods 0.000 title claims abstract description 21
- 230000011218 segmentation Effects 0.000 claims abstract description 45
- 238000000034 method Methods 0.000 claims abstract description 42
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 20
- 230000003746 surface roughness Effects 0.000 claims abstract description 12
- 238000012545 processing Methods 0.000 description 18
- 230000003287 optical effect Effects 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 239000000126 substance Substances 0.000 description 5
- 238000009413 insulation Methods 0.000 description 4
- 238000003754 machining Methods 0.000 description 4
- 239000006061 abrasive grain Substances 0.000 description 3
- 238000005452 bending Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
Abstract
The present invention provides a kind of processing method of chip, for the overleaf chip formed with dielectric film, forms appropriate modified layer in position in a short time.The processing method of the chip of the present invention is overleaf（13）Formed with dielectric film（15）Chip（W）Processing method, have：Dielectric film removal step, passes through cutting tool（22）From the back side of chip along segmentation preset lines（14）Dielectric film is removed, forms cutting slot（25）；Modified layer formation process, along cutting slot（25）Irradiation has the laser beam of radioparent wavelength relative to chip, and modified layer has been internally formed in chip（35）；And segmentation process, acted by grinding to modified layer（35）Apply external force, device chip one by one, cutting slot are divided into by segmentation starting point of modified layer（25）Bottom land（26）It is such structure：Flat and surface roughness Ra has width more than laser spot size diameter below 0.1 μm.
Description
Technical field
The present invention relates to the processing method that semiconductor wafer or optical device wafer are divided into the chip of chip one by one.
Background technology
In the past, as the processing method for dividing the wafer into chip one by one, the skill of chip is split by laser machining
Art receives much concern.Such processing method is proposed as the Laser Processing：Irradiation has radioparent laser relative to chip
Light is so as to form the layer (modified layer) of fragility in inner wafer, and the modified layer using the intensity decreases is as splitting starting point
(for example, referring to patent document 1).In the processing method of patent document 1, irradiated along the spacing track of the clathrate of front wafer surface
Laser beam, linear modified layer is internally formed in chip.Also, by applying external force, and edge to the modified layer of fragility
Modified layer and divide the wafer into chip one by one.
In addition, when it is less than tens of μm that the thickness of chip is thinning, laser beam passes through chip, it is difficult in inner wafer
Appropriate location forms appropriate modified layer.Therefore, it is proposed to such processing method：Modified layer is formed to the chip before thinning
Inside, by grinding wafer to finished product thickness after modified layer is formed (for example, referring to patent document 2).In adding for patent document 2
In work method, modified layer is being formed as the ground surface side of the position higher than finished goods thickness.Therefore, it is possible in inner wafer
Appropriate location form appropriate modified layer, due to modified layer can also be removed, so being lifted in the processing of optical device wafer
Brightness, in the processing of semiconductor wafer improves bending strength.
Prior art literature
Patent document 1：No. 3408805 publications of Japanese Patent No.
Patent document 2：Japanese Unexamined Patent Publication 2012-49164 publications
In addition, chip rear side in order to prevent metallic pollution and formed with the feelings of the dielectric film such as nitride film or oxide-film
Condition is more, in the Laser Processing before grinding, due to the influence of dielectric film, can not be internally formed appropriate modification in chip
Layer.Now, it is also contemplated that such method：Insulation is removed from the back side of chip by grinding before the formation of modified layer
Film.When removing the dielectric film, cut to prevent the air-hole blockage of grinding tool from needing by corase grind, fine ginding, the order of grinding are carried out
Processing, due to being also required to same processing in chip thinning after modified layer is formed, increase this so process time be present and ask
Topic.
The content of the invention
The present invention be in view of such aspect and the invention completed, its object is to provide a kind of processing method of chip,
The overleaf chip formed with dielectric film can be directed to, forms appropriate modified layer in position in a short time.
The processing method of the chip of the present invention, is formed with device in front in the multiple regions marked off by segmentation preset lines
Part and the overleaf processing method of the chip formed with dielectric film, the processing method of above-mentioned chip are characterised by having：Insulation
Film removal step, cutting with flat bottom land is formed using cutting tool from the rear side of chip along above-mentioned segmentation preset lines
Groove is cut, dielectric film is removed along above-mentioned segmentation preset lines；Modified layer formation process, implementing above-mentioned dielectric film removal step
Afterwards, calibration is completed on the basis of above-mentioned cutting slot from the back side of chip, will there is the laser light of radioparent wavelength for chip
The focal point of line is irradiated from the inside that above-mentioned cutting slot is navigated near front wafer surface, and along above-mentioned cutting slot, in crystalline substance
Modified layer is internally formed near piece front；And segmentation process, after above-mentioned modified layer formation process is implemented, from chip
The back side carries out grinding so as to which thinning be finished product thickness using component is ground, and by grinding act using above-mentioned modified layer as
Point splits chip along above-mentioned segmentation preset lines, in above-mentioned cutting slot, the surface roughness of above-mentioned flat bottom land be 0.1 μm with
Under, the width of above-mentioned flat bottom land is more than the diameter of laser spots for being formed at above-mentioned bottom land.
According to the structure, dielectric film is removed from the back side of chip along segmentation preset lines by using cutting tool, in crystalline substance
The back side of piece is formed with the cutting slot with flat bottom land.In addition, irradiating laser beam in a manner of through cutting slot,
Modified layer is internally formed in chip with can not being influenceed by dielectric film.Now, because the surface roughness of cutting slot is 0.1
Below μm, the width of bottom land has width more than laser spot size diameter, so can suppress the scattering of the laser beam at bottom land.
Therefore, it is possible to form appropriate modified layer in the appropriate location of inner wafer, and along the segmentation good Ground Split chip of preset lines.
Further, since remove dielectric film from the back portion of chip by cutting tool, thus with by grinding from chip
The back side integrally removes the structure of dielectric film compared to can shorten process time.
According to the present invention, flat and small surface roughness cutting slot is formed at the back side of chip by cutting tool, passed through
Cutting slot, can be in short-term thus directed towards the overleaf chip formed with dielectric film by the inside of laser light irradiation to chip
It is interior to form appropriate modified layer in position.
Brief description of the drawings
Figure 1A and Figure 1B is the figure of an example of the dielectric film removal step for representing present embodiment.
Fig. 2 is the figure of an example of the modified layer formation process for representing present embodiment.
Fig. 3 A and Fig. 3 B are the figures of an example of the segmentation process for representing present embodiment.
Label declaration
11 devices
The front of 12 chips
The back side of 13 chips
14 segmentation preset lines
15 dielectric films
22 cutting tools
25 cutting slots
26 bottom lands
35 modified layers
42 grinding components
W chips
Embodiment
Hereinafter, the processing method of the chip of present embodiment is illustrated.Processing on the chip of present embodiment
Method, implement the dielectric film removal step based on topping machanism for the overleaf chip formed with dielectric film, added based on laser
The modified layer formation process that frock is put and the segmentation process based on grinding attachment.In dielectric film removal step, cutting is utilized
Cutter removes the dielectric film for being formed at chip back surface along segmentation preset lines.By based on the machining of the cutting tool in crystalline substance
The piece back side forms the cutting slot with flat and small surface roughness bottom land along segmentation preset lines.
In modified layer formation process, by laser machining the modification being internally formed along segmentation preset lines in chip
Layer.In the Laser Processing, the focal point for the laser beam for making to have radioparent wavelength relative to chip positions from cutting slot
Inside near to front wafer surface, irradiate laser beam along cutting slot.Thus, dielectric film will not be made to hinder the photograph of laser beam
Penetrate and being internally formed along the modified layer for splitting preset lines in chip.In segmentation process, make chip thin by being ground component
Finished product thickness is turned to, and is acted using modified layer as starting point by grinding along segmentation preset lines to split chip.
Hereinafter, the details of the processing method of the chip of present embodiment are illustrated.Reference picture 1A and Figure 1B, to insulation
Film removal step illustrates.Figure 1A and Figure 1B is the figure of an example of the dielectric film removal step for representing present embodiment.
In addition, in the present embodiment, the structure is not limited to form the structure of cutting slot as being processed by cutting at one time.For example,
Cutting slot can also be formed using particle diameter different cutter point multiple stages according to material of chip etc..In addition, Figure 1A is represented
The state of the back side of chip upward.
As shown in Figure 1A, wafer W is configured to be equipped with multiple devices 11 on the semiconductor substrates such as silicon, GaAs.Wafer W
It is shaped generally as discoideus, and the segmentation preset lines 14 of clathrate by being arranged in front 12 mark off multiple regions.Each
Formed with devices 11 such as IC (integrated circuit), LSI (large scale integrated circuit) in region.At the back side 13 of wafer W in order to prevent
Metallic pollution caused by the intrusion of copper etc. and formed with the dielectric film such as nitride film or oxide-film 15.In addition, in the outer rim shape of wafer W
Into the recess 16 for having expression crystal orientation.
In addition, wafer W is not limited to semiconductor wafer, dielectric film 15 is not limited to the nitride film or oxygen that metallic pollution prevents
Change film etc..Wafer W can also be ceramics, glass, sapphire system inorganic material substrate on the light formed with optical devices such as LED
Device wafer.In addition, if dielectric film 15 is formed at the film at the back side 13 of wafer W, such as can also be by resin film structure
Into.
As shown in Figure 1B, in dielectric film removal step, protection band 17 is pasted with the front 12 of wafer W, overleaf 13
Wafer W is moved to topping machanism (not shown) in the state of upward.The wafer W for moving into topping machanism is protected through protection band 17
Hold on chuck table 21.In addition, cutting tool 22 is positioned to the segmentation preset lines 14 of wafer W, pass through high speed rotation
Cutting tool 22 enters wafer W from the lateral incision of the back side 13.Also, cutting tool 22 is relatively moved relative to wafer W, thus along point
Cut preset lines 14 and remove dielectric film 15 from the back side 13 of wafer W.
Thus, the cutting slot 25 with flat bottom land 26 is formd at the back side 13 of wafer W, by cutting slot 25, made
Expose from dielectric film 15 to outside at the back side 13 of wafer W.Cutting slot 25 turns into the laser light in modified layer formation process below
The irradiation area of line.That is, laser beam is irradiated to the inside of wafer W through cutting slot 25, is not thus influenceed by dielectric film 15
And form the modified layer 35 (reference picture 2) along segmentation preset lines 14.At this moment, the bottom land 26 of cutting slot 25 is formed as flat and table
Surface roughness Ra is below 0.1 μm, to prevent the entanglement of laser beam.
Here, using having tabular surface in end, and the thickness more than diameter with the laser spots for being formed at bottom land 26
Cutter as cutting tool 22.In addition, cutting slot 25 is processed with machining condition of the surface roughness Ra below 0.1 μm.
For example, the use of thickness is 0.6mm, the diamond abrasive grain that abrasive grain diameter is 2.0 μm~4.0 μm, which is got together, by resin forms
Resin cutter as cutting tool 22, the speed of mainshaft is set as 30000rpm, and (chuck table 21 enters cutting feed speed
To speed) it is set as 1mm/s, approach is set as the 0.01mm from the back side.
In dielectric film removal step, split preset lines using cutting tool 22 to remove the irradiation area of laser beam
Dielectric film 15 on 14.Therefore, with being compared by grinding from the overall structure for removing dielectric film 15 in the back side 13 of wafer W
Compared with can efficiently remove dielectric film 15 in a short time.In addition, the bottom land 26 of cutting slot 25 may not be complete put down
It is smooth, bending or the concaveconvex shape that effect will not be brought to the formation of modified layer 35 can also be included.That is, cutting slot 25
Bottom land 26 is formed as substantially being considered as flat degree.
Reference picture 2, modified layer formation process is illustrated.Fig. 2 is the modified layer formation process for representing present embodiment
An example figure.
As shown in Fig. 2 implement modified layer formation process after dielectric film removal step.In modified layer formation process,
Wafer W is maintained at through protection band 17 on the chuck table 31 of laser processing device (not shown).In addition, pass through camera device
(not shown) is shot the back side 13 of wafer W, calibrated on the basis of the cutting slot 25 at the back side 13 of wafer W.Next,
The exit wound of bullet of processing head 32 is navigated to the cutting slot 25 of wafer W, laser is irradiated from the side of the back side 13 of wafer W by processing head 32
Light.Laser beam is that have radioparent wavelength relative to wafer W, and is adjusted to be condensed near the front 12 of wafer W
Inside.
The bottom land 26 of laser beam through cutting slot 25 is irradiated to the inside of wafer W, is hindered thus without by dielectric film 15.
Further, since the bottom land 26 of cutting slot 25 is formed as flat and surface roughness Ra below 0.1 μm, so can suppress bottom land
The entanglement of laser beam at 26, it is with making appropriate location-appropriate inside wafer W modified.Also, while adjustment laser beam
Focal point while along cutting slot 25 irradiate laser beam, thus wafer W being internally formed along segmentation preset lines 14
Good modified layer 35.
At this moment, first, focal point is adjusted near wafer W front, to form modified layer along all cutting slots 25
The mode of 35 bottom is laser machined.Then, just along the weight of cutting slot 25 whenever making the height of focal point float
Laser machined again, thus, in the modified layer 35 for being internally formed predetermined thickness of wafer W.Like this, in wafer W
Portion is formed with the segmentation starting point along segmentation preset lines 14.
It additionally, there are such situation：When it is less than tens of μm that wafer W is thinning, laser beam excessively transmits, Wu Fa
Wafer W is internally formed good modified layer 35.Therefore, in the present embodiment, the thin of wafer W is being carried out by segmentation process
Implement modified layer formation process before changing, thus, it is possible to be internally formed good modified layer 35 in wafer W.
In addition, modified layer 35 refers to：Due to laser beam irradiation and as the density inside wafer W, refractive index, machine
Tool intensity and other physical characteristics state different from surrounding, intensity are than region that surrounding reduces.Modified layer 35 is, for example,
Melt process region, fracture area, insulation breakdown region, variations in refractive index region or these regions to mix.
Reference picture 3A and Fig. 3 B illustrate to segmentation process.Fig. 3 A and Fig. 3 B are the segmentation process for representing present embodiment
An example figure.In addition, in the present embodiment, do not limited as the structure that cutting slot is formed by a grinding
In the structure.For example, edge can be come according to material of chip etc. by carrying out thick grinding, fine ginding processing, attrition process
Segmentation preset lines segmentation chip.
As shown in Figure 3 A and Figure 3 B, segmentation process is implemented after modified layer formation process.As shown in Figure 3A, in segmentation work
In sequence, wafer W is maintained at through protection band 17 on the chuck table 41 of grinding attachment (not shown).In addition, the grinding quilt of component 42
Navigate to the top for the wafer W being maintained on chuck table 41.Also, the Grinding wheel 43 of grinding component 42 is set to rotate about the z axis
Ground with parastate rotating contact, thus wafer W at the back side 13 of close chuck table 41 simultaneously, Grinding wheel 43 and wafer W
Cut.By the grinding of the wafer W, not only dielectric film 15 is removed from the back side 13 of wafer W, moreover it is possible to remove recessed caused by cutting slot 25
Convex form.
In grinding, the thickness of wafer W is measured by altimeter (not shown) in real time.Also, control grinding structure
The amount of feeding of part 42 is to cause the measurement result of altimeter close to finished product thickness L.In addition, in the inside of wafer W, more than finished product
Thickness L height and position is formed with modified layer 35.
As shown in Figure 3 B, acted by grinding, grinding load forcefully acts on each modified layer 35 from Grinding wheel 43.By
This, is that starting point produces the rupture along segmentation preset lines 14 in wafer W with modified layer 35, so as to which wafer W is divided into one by one
Device chip C.Also, when wafer W is thinned to finished product thickness L, stop grinding action.Like this, wafer W is thinned to institute
Desired finished product thickness L, meanwhile, it is divided into device chip C one by one along segmentation preset lines 14.
In addition, when present applicant make cutting slot 25 surface roughness be more than 0.1 μm in the case of, same
Modified layer 35 is formed under one laser processing condition and is ground, in the generation everywhere of segmentation preset lines 14 in segmentation process
There is undivided region.This is identified as being the rough surface because cutting slot 25, therefore, because swashing in modified layer formation process
The influence of the entanglement of light light etc., modified layer 35 is not properly formed it in the inside of wafer W.
As described above, according to the processing method of the chip of present embodiment, the back of the body by using cutting tool 22 from wafer W
Face 13 removes dielectric film 15 along segmentation preset lines 14, and forms cutting with flat bottom land 26 at the back side 13 of wafer W
Cut groove 25.In addition, irradiate laser beam in a manner of through cutting slot 25, thus, it is possible to not by dielectric film 15 influenceed in crystalline substance
Piece W's is internally formed modified layer 35.Now, because the surface roughness of cutting slot 25 is less than 0.1 μm, the width tool of bottom land 26
There is width more than laser spot size diameter, so the laser beam entanglement at bottom land 26 can be suppressed.Therefore, inside wafer W
Appropriate location, can be along the segmentation good Ground Split wafer W of preset lines 14 formed with appropriate modified layer 35.It is further, since logical
Cross cutting tool 22 and be partially removed in dielectric film 15 from the back side 13 through piece W, thus with by grinding from the back side of wafer W
The 13 overall structures for removing dielectric film 15 are compared, and can shorten process time.
In addition, the invention is not restricted to above-mentioned embodiment, implement while various changes can be subject to.In above-mentioned embodiment
In, for size and shape illustrated in accompanying drawing etc., this is not limited to, can be fitted in the range of the effect of the present invention is played
Work as change.In addition, it can implement with suitably being changed without departing from purpose of the present invention scope.
For example, in the present embodiment, it is configured in dielectric film removal step by single cutting tool 22 in crystalline substance
Piece W forms cutting slot 25, but is not limited to the structure.For example, it is also possible to using different a pair of the cutting tools 22 of abrasive grain diameter, lead to
Cross a cutting tool 22 and form cutting slot 25, the surface roughness of cutting slot 25 is adjusted by another cutting tool 22.
In addition, in the present embodiment, it is configured in modified layer formation process along segmentation 14 continuous landform of preset lines
Into modified layer 35, but it is not limited to the structure.As long as wafer W or edge can be split along segmentation preset lines 14
Segmentation preset lines 14 and be intermittently formed modified layer 35.
In addition, in the present embodiment, the focal point of laser beam is floated to form the modified layer 35 of predetermined thickness, but
It is not limited to the structure.Modified layer 35 also can pass through the photograph of laser beam once by adjusting the processing conditions laser machined
Penetrate and formed.In addition, not being simply formed with 1 layer of modified layer 35 in the inside of wafer W, multilayer can also be formed in thickness direction and be modified
Layer 35.
In addition, in the present embodiment, a part for modified layer 35 is formed as crossing over finished product thickness L, but is not limited to
The structure.As long as modified layer 35 wafer W front nearby or be formed at than finished product thickness L lean on wafer W the back side 13
The position of side (upside).Now, by the way that wafer W is ground into finished product thickness L to remove modified layer 35, bending strength can be realized
Lifting.In addition, the lifting of brightness is realized when wafer W is optical device wafer.
In addition, when by thick grinding, fine ginding processing, attrition process come chip thinning W, can also be cut in corase grind
Any one stage of processing, fine ginding processing and attrition process splits wafer W.
In addition, in the present embodiment, dielectric film removal step is implemented by topping machanism, passes through laser processing device
To implement modified layer formation process, grinding process is implemented by grinding attachment, but the process or all processes of a part
It can also be carried out by a device.
As described above, the present invention has the effect that：, can be in short-term for the overleaf chip formed with dielectric film
It is interior to form appropriate modified layer in position, particularly, for semiconductor wafer or optical device wafer are divided into one
The processing method of the chip of each and every one chip is useful.
Claims (1)
1. a kind of processing method of chip, be front the multiple regions marked off by segmentation preset lines formed with device and
The processing method of chip of the back side formed with dielectric film,
The processing method of above-mentioned chip is characterised by having：
Dielectric film removal step, formed from the rear side of chip along above-mentioned segmentation preset lines using cutting tool with flat
The cutting slot of bottom land, dielectric film is removed along above-mentioned segmentation preset lines；
Modified layer formation process, after above-mentioned dielectric film removal step is implemented, from the back side of chip using above-mentioned cutting slot as base
Standard completes calibration, and the focal point of the laser beam for chip with radioparent wavelength is navigated into chip from above-mentioned cutting slot
Inside near front, and be irradiated along above-mentioned cutting slot, it is internally formed modified layer near front wafer surface；And
Segmentation process, after above-mentioned modified layer formation process is implemented, it is ground from the back side of chip using component is ground,
Thinning is finished product thickness, and acted by grinding, splits chip along above-mentioned segmentation preset lines using above-mentioned modified layer as starting point,
In above-mentioned cutting slot, the surface roughness of above-mentioned flat bottom land is less than 0.1 μm, and the width of above-mentioned flat bottom land exists
It is formed at more than the diameter of the laser spots of above-mentioned bottom land.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012219097A JP6013858B2 (en) | 2012-10-01 | 2012-10-01 | Wafer processing method |
| JP2012-219097 | 2012-10-01 |
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| Publication Number | Publication Date |
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| CN103715082A CN103715082A (en) | 2014-04-09 |
| CN103715082B true CN103715082B (en) | 2018-01-23 |
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| JP (1) | JP6013858B2 (en) |
| KR (1) | KR102022732B1 (en) |
| CN (1) | CN103715082B (en) |
| TW (1) | TWI610357B (en) |
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| JP6407066B2 (en) * | 2015-03-06 | 2018-10-17 | 株式会社ディスコ | Manufacturing method of optical device chip |
| DE102016215473B4 (en) * | 2015-09-10 | 2023-10-26 | Disco Corporation | Method for processing a substrate |
| JP6602207B2 (en) * | 2016-01-07 | 2019-11-06 | 株式会社ディスコ | Method for generating SiC wafer |
| DE102017200631B4 (en) * | 2017-01-17 | 2022-12-29 | Disco Corporation | Method of processing a substrate |
| JP6817822B2 (en) * | 2017-01-18 | 2021-01-20 | 株式会社ディスコ | Processing method |
| JP6821261B2 (en) * | 2017-04-21 | 2021-01-27 | 株式会社ディスコ | Processing method of work piece |
| JP7033485B2 (en) * | 2018-04-17 | 2022-03-10 | 株式会社ディスコ | Cutting blade shaping method |
| JP7092553B2 (en) * | 2018-05-21 | 2022-06-28 | 株式会社ディスコ | Wafer processing method |
| KR20210135128A (en) | 2020-05-04 | 2021-11-12 | 삼성전자주식회사 | semiconductor package and method for manufacturing the same |
| CN114160958A (en) * | 2021-12-07 | 2022-03-11 | 华东光电集成器件研究所 | Method for combining laser invisible cutting and mechanical cutting of wafer |
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| TW201415547A (en) | 2014-04-16 |
| KR102022732B1 (en) | 2019-09-18 |
| JP6013858B2 (en) | 2016-10-25 |
| CN103715082A (en) | 2014-04-09 |
| KR20140043278A (en) | 2014-04-09 |
| JP2014072475A (en) | 2014-04-21 |
| TWI610357B (en) | 2018-01-01 |
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