CN103681600B - 集成电路器件、半导体器件及其制造方法 - Google Patents
集成电路器件、半导体器件及其制造方法 Download PDFInfo
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- CN103681600B CN103681600B CN201310399888.6A CN201310399888A CN103681600B CN 103681600 B CN103681600 B CN 103681600B CN 201310399888 A CN201310399888 A CN 201310399888A CN 103681600 B CN103681600 B CN 103681600B
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
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- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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- H01L21/76835—Combinations of two or more different dielectric layers having a low dielectric constant
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- H01L23/53266—Additional layers associated with refractory-metal layers, e.g. adhesion, barrier, cladding layers
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Geometry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2012-0098464 | 2012-09-05 | ||
| KR1020120098464A KR102002815B1 (ko) | 2012-09-05 | 2012-09-05 | 반도체 장치 및 이의 제조 방법 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103681600A CN103681600A (zh) | 2014-03-26 |
| CN103681600B true CN103681600B (zh) | 2017-12-12 |
Family
ID=50153452
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310399888.6A Active CN103681600B (zh) | 2012-09-05 | 2013-09-05 | 集成电路器件、半导体器件及其制造方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US9337150B2 (enExample) |
| JP (1) | JP6356396B2 (enExample) |
| KR (1) | KR102002815B1 (enExample) |
| CN (1) | CN103681600B (enExample) |
| DE (1) | DE102013109297A1 (enExample) |
| TW (1) | TWI588871B (enExample) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102119829B1 (ko) * | 2013-09-27 | 2020-06-05 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 제조 방법 |
| US9312168B2 (en) * | 2013-12-16 | 2016-04-12 | Applied Materials, Inc. | Air gap structure integration using a processing system |
| US9337085B2 (en) | 2014-02-12 | 2016-05-10 | Sandisk Technologies Inc. | Air gap formation between bit lines with side protection |
| FR3018951B1 (fr) * | 2014-03-18 | 2017-06-09 | Commissariat Energie Atomique | Procede de gravure d'un materiau dielectrique poreux |
| US9583380B2 (en) * | 2014-07-17 | 2017-02-28 | Globalfoundries Inc. | Anisotropic material damage process for etching low-K dielectric materials |
| KR102201092B1 (ko) * | 2014-09-16 | 2021-01-11 | 삼성전자주식회사 | 반도체 장치 제조 방법 |
| CN104327850B (zh) * | 2014-11-03 | 2016-04-06 | 天津理工大学 | 一种氮化物荧光粉的低温等离子体制备方法 |
| EP3353803A4 (en) * | 2015-09-23 | 2019-04-24 | Intel Corporation | ULTRADÜNNE DIELECTRIC HELMET LAYER FOR MASKLESS AIR SPLICE AND REPLACEMENT ILD PROCESSES |
| US9449871B1 (en) * | 2015-11-18 | 2016-09-20 | International Business Machines Corporation | Hybrid airgap structure with oxide liner |
| US9865616B2 (en) | 2016-02-09 | 2018-01-09 | Toshiba Memory Corporation | Semiconductor memory device and method for manufacturing same |
| US9887134B2 (en) * | 2016-02-10 | 2018-02-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor devices, methods of manufacture thereof, and methods of singulating semiconductor devices |
| US10504915B2 (en) | 2016-03-03 | 2019-12-10 | Toshiba Memory Corporation | Integrated circuit device having an air gap between interconnects and method for manufacturing the same |
| KR102658192B1 (ko) * | 2016-07-27 | 2024-04-18 | 삼성전자주식회사 | 반도체 장치 및 반도체 장치의 제조 방법 |
| CN107394007B (zh) * | 2017-07-31 | 2019-06-14 | 渤海大学 | 一种适用于superstrate结构薄膜太阳电池硫化或硒化的方法 |
| US10644013B2 (en) | 2018-08-15 | 2020-05-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Cell boundary structure for embedded memory |
| EP3654372B1 (en) * | 2018-11-13 | 2021-04-21 | IMEC vzw | Method of forming an integrated circuit with airgaps and corresponding integrated circuit |
| JP7545185B2 (ja) * | 2019-04-05 | 2024-09-04 | 東京エレクトロン株式会社 | 高度に選択的な酸化ケイ素/窒化ケイ素エッチングのためのエッチング成分及び不動態化ガス成分の独立した制御 |
| US11380758B2 (en) | 2020-07-23 | 2022-07-05 | Nanya Technology Corporation | Semiconductor device with air gap and boron nitride cap and method for forming the same |
| CN114695270B (zh) * | 2020-12-30 | 2024-11-01 | 长鑫存储技术有限公司 | 半导体器件的制备方法及半导体器件 |
| US12381113B2 (en) * | 2021-08-27 | 2025-08-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device structure having air gap and methods of forming the same |
| CN119923719A (zh) * | 2022-12-23 | 2025-05-02 | 株式会社国际电气 | 基板处理方法、半导体装置的制造方法、基板处理系统和程序 |
| DE102023133538A1 (de) | 2023-11-30 | 2025-06-05 | Infineon Technologies Ag | Halbleiterbauelement mit metallstrukturpassivierung |
Family Cites Families (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6093634A (en) * | 1999-07-26 | 2000-07-25 | United Microelectronics Corp. | Method of forming a dielectric layer on a semiconductor wafer |
| US6252290B1 (en) | 1999-10-25 | 2001-06-26 | Chartered Semiconductor Manufacturing Ltd. | Method to form, and structure of, a dual damascene interconnect device |
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2012
- 2012-09-05 KR KR1020120098464A patent/KR102002815B1/ko active Active
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- 2013-08-30 US US14/015,388 patent/US9337150B2/en active Active
- 2013-08-30 TW TW102131163A patent/TWI588871B/zh active
- 2013-09-05 CN CN201310399888.6A patent/CN103681600B/zh active Active
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|---|---|
| US9337150B2 (en) | 2016-05-10 |
| US20140061926A1 (en) | 2014-03-06 |
| KR20140033579A (ko) | 2014-03-19 |
| JP2014053612A (ja) | 2014-03-20 |
| KR102002815B1 (ko) | 2019-07-23 |
| CN103681600A (zh) | 2014-03-26 |
| US9741608B2 (en) | 2017-08-22 |
| TW201417144A (zh) | 2014-05-01 |
| JP6356396B2 (ja) | 2018-07-11 |
| US20160225658A1 (en) | 2016-08-04 |
| DE102013109297A1 (de) | 2014-03-13 |
| TWI588871B (zh) | 2017-06-21 |
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