CN103631255B - For the Fault Insertion Equipment of avionics system Gernral Check-up - Google Patents
For the Fault Insertion Equipment of avionics system Gernral Check-up Download PDFInfo
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Abstract
The invention discloses a kind of Fault Insertion Equipment for avionics system Gernral Check-up, comprise industry control unit, wave generating unit and signal condition unit, industry control unit is responsible for the parsing of each agreement and the encapsulation of data according to fault model, wave generating unit completes Data Analysis, buffer memory Wave data, digital-to-analog conversion is passed through to Wave data, the analog waveform produced outputs to signal condition unit, and signal condition unit is nursed one's health analog waveform again and finally exported the signal of electric aspect as requested to interface connector.Utilize in this equipment simulating actual working environment may random/catastrophic failure phenomenon, thus ensure to verify within the shortest time by the reliability of diagnostic system and correctness, the research and development of shortening system, test and commercialization time, reduce ground maintenance and logistics support cost under non-state of flight.
Description
Technical field
The invention belongs to aviation electronics technical field of measurement and test.
Background technology
Along with the raising of avionics system complexity, more and more higher requirement be it is also proposed to comprehensive coverage and the fault diagnosis ability of maintenance.Method for diagnosing faults is evolved as current prognostics and health management (PHM) system by external testing, built-in test (BIT), change from condition monitoring to health control, this transformation introduces the predictive ability to the following reliability of system, by the generation of this capability identification and management avionics system fault, Maintenance Planning and supply guarantee, its fundamental purpose reduces to use and support cost, improve avionics system security, integrity and mlssion success, thus drop into less maintenance, realize the maintenance based on state.At present, PHM has become the inexorable trend of aviation electronics Reliability & Maintainability of new generation development.
PHM comprises the content of two aspects, i.e. prediction and health control, and health refers to hydraulic performance decline compared with the normal performance state expected or extent of deviation in allowed limits; Failure prediction with referring to or historical performance status predication present according to system deagnostic package or system completes the state (following health status) of its function, comprises the residual life of determining means or system or the time span of normal work; Health control makes the ability of suitable decision-making according to diagnosis/information of forecasting, available Maintenance Resource and request for utilization to maintenance.PHM system generally should possess following function: fault detect, fault isolation, fault diagnosis, failure prediction, health control and life-span follow the trail of.For complicated Aerial Electronic Equipment and system, PHM should be able to realize different levels, the comprehensive diagnos of different stage, prediction and health control.
The implementation method of Gernral Check-up mainly comprises analysis of failure pattern, mechanism and impact analysis, it includes design data, fault mode, failure mechanism, fault model, life cycle section and maintenance record, and sensing data, bus monitoring data and BIT test result are also for determining abnormality and parameter.By fault analysis, carry out direct fault location targetedly, determine the contingent pattern of fault and probability.
Direct fault location refers to according to fault model selected in advance, adopts specific strategy to be incorporated in system by fault artificially, with acceleration disturbance and wrong generation.The duty under failure condition is being injected into, the reliability of evaluating system by observation and analysis system.
Because direct fault location is generally direct for goal systems, the inexactness brought because model hypothesis is inaccurate producing similar analytic method therefore can be avoided.The design phase of this external goal systems, simulated failure is injected can as a kind of means of Study system fault behavior, because adopt the object of direct fault location to be exactly lost efficacy to accelerate, obtain abundant fail data within a short period of time, so that statistical study.As the effective technology of one, direct fault location has caused the attention of increasing project planner and researcher.
According to the technical method that direct fault location realizes, be divided three classes direct fault location: hardware fault is injected, software fault injects, radiation induced direct fault location.
Current direct fault location, as a kind of reliability testing means, is widely used in computing system, chip reliability analytical test, and about in the reliability testing of avionics system, research and the practice of domestic and international direct fault location relevant device are in the starting stage.Therefore, research and develop a kind of resultant fault injection device special for avionics system, realize being of great significance avionics system Gernral Check-up tool.
Summary of the invention
Goal of the invention of the present invention is to provide a kind of Fault Insertion Equipment for avionics system Gernral Check-up, can introduce that waveform is editable, the resultant fault of multiple types fault-signal injects platform in electrical layer.Utilize in this platform simulation actual working environment may random/catastrophic failure phenomenon, thus ensure to verify within the shortest time by the reliability of diagnostic system and correctness, the research and development of shortening system, test and commercialization time, reduce ground maintenance and logistics support cost under non-state of flight.
Goal of the invention of the present invention is achieved through the following technical solutions:
A kind of Fault Insertion Equipment for avionics system Gernral Check-up, comprise industry control unit, wave generating unit, signal condition unit, described industry control unit is selected various direct fault location type according to man-machine interface, call different faults data-interface model to carry out protocol encapsulation and generate Wave data and deliver to wave generating unit by pci bus, and by RS232 bus to signal condition unit distribution control command and the parameter configuration of signal and the parameter configuration of interference;
Described wave generating unit receives Wave data by pci bus and resolves, buffer memory Wave data, and carry out digital-to-analog conversion to Wave data, all kinds of analog signal waveform of generation and the data model of interference waveform output to signal condition unit;
Signal condition cell processing receives the control command of industry control unit distribution and the parameter configuration of signal and the parameter configuration of interference, also receive the various types of signal waveform of wave generating unit and the data model of interference waveform simultaneously, produce the data meeting bus protocol and electric requirement, and being injected into tested equipment by corresponding connector, these data comprise bus data and interfering data etc.
Preferably, described wave generating unit comprises DSP module, FPGA module, DAC module, power module, clock module;
Described DSP module is for completing the interface conversion resolution data between industry control unit and wave generating unit, and data buffer storage;
Described FPGA module comprises buffer memory RAM, asynchronous FIFO and fifo control logic chip, for completing DSP module to interface conversion, the data buffer storage of DAC module and give DAC by data according to refresh rate undetermined and do digital-to-analog conversion;
Described DAC module for completing the conversion of digital signal, and by analog signal output to signal condition unit;
Described power module major function realizes providing direct power supply to each unit, and it is by AC-DC power conversion chip, then converts the direct supply needed for each module to by voltage stabilizing, filtering, DC-DC circuit;
Described clock module major function is for each module provides clock to input, and ensures the signal integrity of transmitting procedure.
Preferably, described signal condition unit comprises signal coupling and distribution module, conditioning plate control module, power module, each Signal-regulated kinase;
Described power module provides power supply guarantee for each module;
Described signal coupling and distribution module, signal to this unit, and is distributed to each Signal-regulated kinase by signal coupling wave generating unit exported under the control of conditioning plate control module;
Described Signal-regulated kinase, carries out conditioning conversion to input signal, produces the data meeting bus protocol and electric requirement, and carries out signal gain according to the gain control instruction that industry control unit exports;
Described conditioning plate control module, the signal for wave generating unit being exported carries out distribution according to the control command of industry control unit and controls.
Further, described signal condition unit comprises over-current detection module, and over-current detection module detects the data that will output to equipment under test, if exceed setting amplitude, notice industry control unit stops direct fault location, realizes the protection to equipment under test.
Preferably, described Signal-regulated kinase comprises AFDX interface signal conditioning module, RS232 Signal-regulated kinase, ARINC429 interface signal conditioning module, power fail conditioning module and 1553 Signal-regulated kinase, realizes the communication protocol requirements of different bus signal and the electrical specification requirement of electric requirement and non-bus signal.
Another object of the present invention is to provide a kind of fault filling method for avionics system Gernral Check-up, comprise the following steps:
A, industry control unit are selected various direct fault location type according to man-machine interface, call different faults data-interface model to carry out protocol encapsulation and generate Wave data and deliver to wave generating unit by pci bus, and by RS232 bus to signal condition unit distribution control command and the parameter configuration of signal and the parameter configuration of interference;
B, wave generating unit receive Wave data by pci bus and resolve, buffer memory Wave data, and carry out digital-to-analog conversion to Wave data, all kinds of analog signal waveform of generation and the data model of interference waveform output to signal condition unit;
C, signal condition cell processing receive the control command of industry control unit distribution and the parameter configuration of signal and the parameter configuration of interference, also receive the various types of signal waveform of wave generating unit and the data model of interference waveform simultaneously, produce the data of the electrical specification requirement meeting bus protocol and electric requirement and non-bus signal, and be injected into tested equipment by corresponding connector.Further, if also comprise in described step C export data exceed setting amplitude, signal monitoring module by examinations to and notify industry control unit stopping direct fault location, realize the protection to equipment.
The present invention is by the use of Fault Insertion Equipment, according to fault model selected in advance, adopt certain strategy to think fault is introduced in system under test (SUT), be injected into the behavior under failure condition by observation and analysis system, the evaluation result of required quantitative and qualitative analysis can be being provided for experimenter.By the test of direct fault location, product design design defect can be found in the product development stage, the reliability of system is provided.
Accompanying drawing explanation
Fig. 1 is Fault Insertion Equipment hardware structure block diagram;
Fig. 2 is the block architecture diagram of signal condition unit;
Fig. 3 is the Organization Chart of power fail injection module;
Fig. 4 is the software architecture block diagram of ARINC429 direct fault location;
Fig. 5 is the hardware structure figure of RS232 direct fault location
Specific implementation
Embodiments of the present invention are provided, to describe technical scheme of the present invention in detail below in conjunction with accompanying drawing.
Fig. 1 is the general frame figure of Fault Insertion Equipment of the present invention.The present invention mainly realizes inputting the simulated failure of equipment under test, mainly the electric signal of simulated failure carries out direct fault location, mainly comprise following direct fault location signal: the direct fault location of power supply, the direct fault location of 1553 signals, ARINC429 fault-signal injects, AFDX fault-signal injects, and RS232 fault-signal injects and the superposition of undesired signal is injected.This equipment adopts the form of man-machine interface, can select various direct fault location type, when selecting a certain fault mode, by parameter configuration and the order distribution at main interface, the type data-interface is called, by resolving the data protocol bag from bottom, and package, after protocol encapsulation completes according to different interface protocols, just waveform drawing can be carried out, be presented on the editing interface of this direct fault location, after having edited, outputted on network interface by output interface.Therefore, realize the selection of different faults being injected to type, be in fact exactly call different faults data-interface model, through protocol encapsulation, waveform drawing and editor, finally output on tested equipment.
Industry control unit in Fig. 1 sends instruction by man-machine interface, according to man-machine interface, various direct fault location type is selected, call different faults data-interface model carry out protocol encapsulation generate Wave data deliver to wave generating unit by pci bus, wave generating unit generates the time sequence information of signal according to the selection of each agreement, does the pre-service of some signals simultaneously; Data can be sent to signal adjustment unit afterwards, the data that signal adjustment unit reprocessing receives, and finally export the signal of electric aspect as requested to interface connector.If export exceed setting amplitude, overcurrent detecting device by examinations to and notify industry control unit stopping direct fault location, realize the protection to equipment.
Wherein wave generating unit is made up of DSP module, FPGA module, DAC module, power module and clock module, this unit major function is the interface with industry control unit, complete pci bus Data Analysis, buffer memory Wave data, to Wave data by digital-to-analog conversion, the analog waveform of generation outputs to signal condition unit.DSP module has been mainly used in the interface between industry control unit and wave generating unit, and data buffer storage function, it is mainly using pci bus as interface, and dsp processor selects TMS320C6416, and FLASH, SDRAM etc. are as peripheral chip, realize the processing capacity of DSP module.FPGA module major function has been DSP module to interface conversion, the data buffer storage of DAC module and has given DAC by data according to refresh rate undetermined and do digital-to-analog conversion, and it mainly realizes the controlling functions of FPGA module by buffer memory RAM, asynchronous FIFO and fifo control logic chip.DAC module major function has been the conversion of digital signal, and simulating signal is carried out AC coupling be transferred to signal condition unit, the main process chip of DAC module selects the AD9777 programming device of AD company, data after conversion carry out AC coupling by centre-tapped transformer, realize the output function of DAC.Power module major function realizes providing direct power supply to each unit, and it is by AC-DC power conversion chip, then converts the direct supply needed for each module to by voltage stabilizing, filtering, DC-DC circuit.Clock module major function is for each module provides clock to input, and ensures the signal integrity of transmitting procedure.
Fig. 2 is core cell signal condition unit of the present invention, and signal condition unit is by signal coupling and distribution module, conditioning plate control module, power module, over-current detection module, AFDX interface signal conditioning module, RS232 Signal-regulated kinase, ARINC429 interface signal conditioning module and discrete signal conditioning module.
Signal coupling and distribution module, be coupled to this unit by DAC output signal, and signal be distributed to the Signal-regulated kinase of each interface signal under the control of conditioning plate control module;
Signal-regulated kinase, conditioning conversion is carried out to input signal, make it to meet each interface requirement, the gain of signal by the waveform district of the main interface software of industry control unit by the zoom operations (Scalable etc. of amplitude) of waveform, to Signal-regulated kinase output gain steering order, Signal-regulated kinase resolves the amplitude of industry control unit, selects different gains to control, and the gain realizing signal controls.
Conditioning plate control module, is responsible for the communication of conditioning plate and industry control unit, the functions such as DAC signal distribution control and overcurrent protection.
Fig. 3 is the Organization Chart of power fail injection module, adopt Waveform Synthesis Technology, industry control unit exports synthesis waveform required power supply, if not interference, is exactly a constant level signal, if there is undesired signal, synthesize with the level signal exported after undesired signal digitizing, then output to wave generating unit and carry out digital-to-analog conversion, then carry out high-power amplifier by the power fail conditioning module of signal condition unit, driver output, the supply voltage required for generation;
Fig. 4 is the block architecture diagram of ARINC429 direct fault location, by the user interface that the UI of industry control unit designs, the parameter generating waveform is set, add and need the raw data exported to start to generate waveform, digital simulation ARINC429 frame structure is started in industry control unit group bag, then Manchester's cde and filtering is carried out, reach the data of the network physical transmission of standard, then result is stored in a buffer memory opened in advance, UI interface generate waveform time according to the data genaration waveform in buffer memory, when needs configuration exports fault excited data, interference wave can be superposed as required or increase burr, these signals output in the ARINC429 network of equipment under test by signal condition unit the most at last, except carrying out except direct fault location to electrical layer, protocol layer mistake also can carry out reliability testing to each field, reliability testing type comprises mistake: position negate, random number, constant value are replaced, can at random, temporally interval, by byte interval, Frame kind particular data position is replaced, maximum 4 continuous WORD are supported to the location of Frame, can bit mask be carried out, frame alignment fault data supports 4 groups, often organize 1 WORD, can bit mask be carried out, the fault type adjustable of each group.
The software architecture of AFDX direct fault location and hardware structure are substantially identical with ARINC429's, what AFDX direct fault location adopted is that UDP/IP agreement packages process, UDP group bag is carried out successively in industry control unit, IP group is wrapped, MAC group is wrapped, and after protocol encapsulation completes, starts drawing waveforms, then carry out Manchester's cde and filtering, reach the data of the network physical transmission of standard; Result be stored in a buffer zone opened in advance, when output waveform time, data are outputted to the FPGA module in wave generating unit, then FPGA is outputted to DAC module and is converted to analog signal output.AFDX electrical layer can injected frequency drift error, and MAC layer can inject frame gap (IFG) mistake, short lead code (short preamble) mistake, CRC (CRC) mistake, ethernet type mistake; AFDX protocol layer can inject frame length mistake, redundant sequence number (RSN) mistake, BAG mistake, VL/Port mistake, message format mistake etc.
Software architecture and hardware structure that MIL-STD-1553 bus failure injects are substantially identical with above-mentioned two kinds of buses, by generating MIL-STD-1553 interface data in industry control unit, the noisy signal that filtering generates band burr is carried out in the FPGA module of wave generating unit, these signals are input in the DAC module of wave generating unit, in signal regulating panel, be adjusted to the level of requirement through changing 1553 signals exported, 1553 buses being finally coupled to test product get on.1553 bus failures export electrical layer can carry out signal dutyfactor adjustment, output voltage gradient regulate and bus signals noise and burr simulation, protocol layer can postpone bus acknowledge, the simulation of the faults such as bus signals bit-errors and message replacement.
Fig. 5 is the hardware structure figure of RS232 direct fault location, RS232 direct fault location is controlled by application interface, the generation of fault-signal, the generation of RS232 original data block, and add after parity check bit, start bit, position of rest, filtering interpolation etc. process in industry control unit and export to wave generating unit, DSP receives data by PCIe bus, exported and conditioning plate control module gain control treatment by FPGA control DAC, eventually through the signal coupling of signal condition unit and distribution module and Signal-regulated kinase output RS232 signal.The fault mode of RS232 can be divided into error of transmission and data bit mistake, and error of transmission comprises provides start bit, position of rest error pattern, and data bit mistake can be carried out negate, random number and constant value and replaced and can carry out bit mask.
Claims (4)
1. the Fault Insertion Equipment for avionics system Gernral Check-up, comprise industry control unit, wave generating unit, signal condition unit, it is characterized in that described industry control unit is selected various direct fault location type according to man-machine interface, call different faults data-interface model to carry out protocol encapsulation and generate Wave data and deliver to wave generating unit by pci bus, and by RS232 bus to signal condition unit distribution control command and the parameter configuration of signal and the parameter configuration of interference;
Described wave generating unit receives Wave data by pci bus and resolves, buffer memory Wave data, and carry out digital-to-analog conversion to Wave data, all kinds of analog signal waveform of generation and the data model of interference waveform output to signal condition unit;
Described wave generating unit comprises DSP module, FPGA module, DAC module, power module, clock module;
Described DSP module is for completing the interface conversion resolution data between industry control unit and wave generating unit, and data buffer storage;
Described FPGA module comprises buffer memory RAM, asynchronous FIFO and fifo control logic chip, for completing DSP module to interface conversion, the data buffer storage of DAC module and give DAC by data according to refresh rate undetermined and do digital-to-analog conversion;
Described DAC module for completing the conversion of digital signal, and by analog signal output to signal condition unit;
Described power module is used for realizing providing direct power supply to each unit, and it is by AC-DC power conversion chip, then converts the direct supply needed for each module to by voltage stabilizing, filtering, DC-DC circuit;
Described clock module is used for providing clock to input for each module, ensures the signal integrity of transmitting procedure;
Signal condition cell processing receives the control command of industry control unit distribution and the parameter configuration of signal and the parameter configuration of interference, in conjunction with the various types of signal waveform of wave generating unit and the data model of interference waveform, produce the data meeting bus protocol and electric requirement, and being injected into tested equipment by corresponding connector, these data comprise bus data and interfering data;
Described signal condition unit comprises signal coupling and distribution module, conditioning plate control module, power module, each Signal-regulated kinase;
Described power module provides power supply guarantee for each module;
Described signal coupling and distribution module, signal to this unit, and is distributed to each Signal-regulated kinase by signal coupling wave generating unit exported under the control of conditioning plate control module;
Described Signal-regulated kinase, carries out conditioning conversion to input signal, produces the data meeting bus protocol and electric requirement, and carries out signal gain according to the gain control instruction that industry control unit exports;
Described conditioning plate control module, the signal for wave generating unit being exported carries out distribution according to the control command of industry control unit and controls.
2. Fault Insertion Equipment according to claim 1, it is characterized in that in described wave generating unit, having 2 pieces of duplicate DAC module of function, control by the buffer memory RAM of FPGA module passage Wave data being delivered to corresponding DAC module, finally complete the digital-to-analog conversion of this Wave data.
3. Fault Insertion Equipment according to claim 1; it is characterized in that described signal condition unit comprises over-current detection module; over-current detection module detects the data that will output to equipment under test; if exceed setting amplitude; notice industry control unit stops direct fault location, realizes the protection to equipment under test.
4. Fault Insertion Equipment according to claim 1, it is characterized in that described Signal-regulated kinase comprises AFDX interface signal conditioning module, RS232 Signal-regulated kinase, ARINC429 interface signal conditioning module, power fail conditioning module and 1553 Signal-regulated kinase, realize the communication protocol requirements of different bus signal and the electrical specification requirement of electric requirement and non-bus signal.
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| CN104270211A (en) * | 2014-10-21 | 2015-01-07 | 中国航空无线电电子研究所 | Serial bus fault injection method |
| CN106990771B (en) * | 2017-01-04 | 2019-06-28 | 中南大学 | Fault filling method and system |
| CN107219843B (en) * | 2017-06-19 | 2019-02-22 | 哈尔滨工业大学 | MIL-STD-1553B bus node fault-signal simulator |
| CN107947959A (en) * | 2017-10-13 | 2018-04-20 | 北京航空航天大学 | A kind of IMA system total failure management systems based on ASAAC systems |
| CN109696899B (en) * | 2017-10-20 | 2022-02-18 | 中国商用飞机有限责任公司 | Special quality comprehensive evaluation system for aircraft ARINC429 bus |
| CN108983141A (en) * | 2018-05-07 | 2018-12-11 | 浙江涵普电力科技有限公司 | The DC voltage and ripple voltage synthesizer of direct current energy meter |
| CN110873831B (en) * | 2019-12-03 | 2021-10-08 | 中国航空综合技术研究所 | Frequency fault injector for medium-low frequency sinusoidal signals |
| CN112034296B (en) * | 2020-09-27 | 2024-04-30 | 中国商用飞机有限责任公司北京民用飞机技术研究中心 | Avionics fault injection system and method |
| CN112380084B (en) * | 2020-12-05 | 2024-03-26 | 中国人民解放军32181部队 | Fault injection and simulation verification method |
| CN113009262B (en) * | 2021-03-08 | 2023-11-17 | 中国大唐集团科学技术研究院有限公司华中电力试验研究院 | Profibus-DP bus interference type discriminating method |
| CN115079671A (en) * | 2022-06-30 | 2022-09-20 | 哈尔滨工业大学（威海） | Fault injection system of serial multi-bus |
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