CN104270211A - Serial bus fault injection method - Google Patents
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Abstract
The invention discloses a serial bus fault injection method. The serial bus fault injection method comprises the following steps that firstly, the fault injection testing data information sent by a user is converted into high-low electrical level type logic waveform data which are represented through character strings; secondly, sampling point data for being sent by an arbitrary waveform generator are generated according to the baud rate, the amplitude and the duty ratio, all of which are required by a testing system and the logic waveform data; thirdly, sampling points corresponding to bits of the logic waveform data are combined into a continuous waveform data sampling point array according to the sequence; fourthly, the waveform data sampling point array is sent to the arbitrary waveform generator through a parallel bus, and the arbitrary waveform generator is started; fifthly, the arbitrary waveform generator generates and sends waveforms to a bus. The serial bus fault injection method is adopted flexibly, the adjustable range of the amplitude and the baud rate is large, the waveform duty ratio can be adjusted, and serial signals of zero codes and non-zero codes can be produced.
Description
Technical field
The present invention relates to electronic equipment serial communication measuring technology, the particularly technical field of serial communication direct fault location.
Background technology
Current existing serial communication measuring technology, all can only carry out function and the performance test of product, cannot carry out direct fault location test.The elementary item of direct fault location test comprises: the direct fault location test of the direct fault location test of electric property and the form of information.
Existing serial signal measuring technology, adopt communication protocol chip to export serial signal, amplitude is minimum can be adjusted to 200mv.And Failure Injection Technique requires that direct fault location signal can be adjusted to 0mv, and the minimum fine setting for 1mv of stepping can be carried out.
Existing serial signal measuring technology, only provides able to programme in baud rate-3% ~+3% marginal range, and Failure Injection Technique requires that fault-signal is able to programme within the scope of times baud rate of 0Hz ~ 2.
Existing serial signal measuring technology, because serial data is produced by communication chip, only provide the serial signal of standard, duty ratio can not adjust, and Failure Injection Technique requires the serial data producing variable duty ratio.
Existing serial signal measuring technology, because serial data is produced by communication chip, only provides fixing coded system.And Failure Injection Technique is based on AWG (Arbitrary Waveform Generator), the signal of NRZ and nonreturn to zero code can be produced.
Summary of the invention
For the deficiencies in the prior art, goal of the invention of the present invention is to provide a kind of universal serial bus fault filling method, can provide program-controlled direct fault location signal for the direct fault location test of serial communication.
Goal of the invention of the present invention is achieved through the following technical solutions:
A kind of universal serial bus fault filling method, comprises following steps:
Step one, the direct fault location test data information that user sends is converted to the logical waveform data of low and high level type, these logical waveform data are with string representation;
Step 2, the baud rate required according to test macro and amplitude and duty ratio, according to the sampling number certificate that logical waveform data genaration sends for AWG (Arbitrary Waveform Generator);
Step 3, sampled point corresponding for logical waveform data every is merged into continuous print Wave data sampled point array according to position order;
Step 4, Wave data sampled point array delivered to AWG (Arbitrary Waveform Generator) by parallel bus and starts AWG (Arbitrary Waveform Generator);
Step 5, AWG (Arbitrary Waveform Generator) produce waveform and deliver in bus.
According to above-mentioned feature, described direct fault location test data information comprises:
A) data bit length;
B) data content;
C) data start bit;
D) data position of rest;
E) data check position, type is odd/even parity check/no parity check;
F) baud rate;
G) high level amplitude;
H) low level amplitude;
I) duty ratio;
J) type of coding, comprises NRZ and nonreturn to zero code;
K) differential-type, comprises single-ended coding and differential coding.
According to above-mentioned feature, direct fault location test data information is converted to logical waveform data and is divided into following three kinds of situations:
If a) data are nonreturn to zero code, then 1 character in binary data 1 counterlogic Wave data, its value is " 1 "; 1 character in binary data 0 counterlogic Wave data, its value is " 0 ";
If b) data are single-ended NRZ, then 2 characters in binary data 1 counterlogic Wave data, its value is " 10 "; 2 characters in binary data 0 counterlogic Wave data, its value is " 01 ".
If c) data are difference NRZ, the value of current character is then determined according to the last position character in logical waveform data, 2 characters in binary data 1 counterlogic Wave data, if last position character is " 1 ", its value is " 10 ", if last position character is " 0 ", its value is " 01 "; 2 characters in binary data 0 counterlogic Wave data, if last position character is " 1 ", its value is " and 01 ", if last position character is " 0 ", its value is " 10 ".
According to above-mentioned feature, it is as follows that direct fault location test data information is converted to logical waveform data step:
1.1), checked whether start bit, as without then jumping directly to next step, having had, filling in start bit;
1.2), data bit is filled in;
1.3), checked whether check bit, as without then jumping directly to next step, having had, filling in check bit;
1.4), checked whether position of rest, as without then jumping directly to next step, having had, filling in position of rest;
1.5), completion logic Wave data conversion.
According to above-mentioned feature, step 1.2) in fill in data bit to fill in step as follows:
2.1), check whether source data coded system is nonreturn to zero code, jumps to 2.2 in this way), jump to 2.3 as no);
2.2) if source data is 1, then target data is filled in ' 1 ', if source data is 0, then target data is filled in ' 0 ', goes to 2.6);
2.3), check whether source data coded system is unipolarity NRZ, jumps to 2.4 in this way), jump to 2.5 as no);
2.4) if source data is 1, then target data is filled in " 10 ", if source data is 0, then target data is filled in " 01 ";
2.5) if source data is 1, and the front a data in target data is " 1 ", then target data is filled in " and 10 ", if front a data is " and 0 ", then target data is filled in " 01 ";
If source data is 0, and the front a data in target data is " 1 ", then target data is filled in " and 01 ", if front a data is " and 0 ", then target data is filled in " 10 ";
2.6), check this position of source data whether be last position, end task in this way, as no repeated execution of steps 2.1), 2.2), 2.3), 2.4), 2.5).
According to above-mentioned feature, it is as follows that logical waveform data are converted to sampled point data method:
Calculate the sampled point number of the every bit stealing of logical waveform data according to baud rate and sample frequency, formula is as follows:
If data coding mode is NRZ, then:
Sampled point number=AWG (Arbitrary Waveform Generator) sample frequency/baud rate.
If data coding mode is nonreturn to zero code, then:
Sampled point number=AWG (Arbitrary Waveform Generator) sample frequency/baud rate/2.
According to above-mentioned feature, it is as follows that logical waveform data are converted to sampled point data method:
According to the sampled point number after duty ratio data computational logic Wave data every adjustment, formula is as follows:
Sampled point number after adjustment=sampled point number x duty ratio.
According to above-mentioned feature, it is as follows that logical waveform data are converted to sampled point data method:
If signal is single-ended signal, then counterlogic Wave data is the sampled point of 0, and its value is low level, and counterlogic Wave data is the sampled point of 1, and its value is high level;
If signal is differential signal, then the value calculating method of TX+ end is: counterlogic Wave data is the sampled point of 0, and its value is 0, counterlogic Wave data is the sampled point of 1, its value is high level, and counterlogic Wave data is the sampled point of-1, and its value is low level; The value calculating method of TX-end is: counterlogic Wave data is the sampled point of-1, and its value is high level, and counterlogic Wave data is the sampled point of 1, and its value is low level, and counterlogic Wave data is the sampled point of 0, and its value is high level.
According to above-mentioned feature, AWG (Arbitrary Waveform Generator) synchronously can send difference waveform for differential signal.
Compared with prior art, beneficial effect of the present invention is:
A) based on AWG (Arbitrary Waveform Generator) technology, by controller, AWG (Arbitrary Waveform Generator) etc. part composition, can realize baud rate able to programme and fine setting, signal amplitude is able to programme, and word format is able to programme, and signal dutyfactor is able to programme, and signal type is able to programme.
B) use this module to carry out direct fault location test, be conducive to the quality controlling test product.
C) do not have this type of communication test module in the market, this module can meet the excitation requirement of serial communication direct fault location test.
D) compared with use SOC processor one class technical scheme, this technology uses flexibly, and amplitude and baud rate adjustable extent are comparatively large, and adjustable waveform duty cycle, can produce the serial signal of NRZ and nonreturn to zero code.
Accompanying drawing explanation
Fig. 1 is hardware structure diagram of the present invention;
Fig. 2 is schematic flow sheet of the present invention;
Fig. 3 is that direct fault location test data information of the present invention is converted to logical waveform data flowchart;
Fig. 4 is bit data fill flow path figure of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described in further detail.
A kind of universal serial bus fault filling method of the present invention, its hardware configuration as shown in Figure 1, mainly comprises controller and AWG (Arbitrary Waveform Generator), and the generation of its direct fault location signal (TX+, TX-) mainly contains following several:
A) baud rate controls.
Baud rate is controlled by the number arranging sampled point.
The pass of baud rate and sampled point number is.
Baud rate=AWG (Arbitrary Waveform Generator) sample frequency/sampled point number.
B) amplitude controls.
The amplitude of output waveform is controlled by arranging sampled value.
C) word format controls and duty ratio setting.
By arranging word format and the duty ratio of sampled point number and sampled value control output signal.
Its technical indicator has:
Baud rate programmable range: 0 ~ 1Mbps.
Wave-shape amplitude programmable range :-6V ~ 6V.
Word format programmable range: word length, check digit, start bit, position of rest.
Duty ratio programmable range: 0 ~ 100%.
Serial signal programmable type: NRZ, nonreturn to zero code.
Its execution mode as shown in Figure 2, comprises following steps:
(1), after system power-up, user sends direct fault location test data information to controller.
Direct fault location test data comprises:
A) data bit length.
B) data content.
C) data start bit, optional type is 0 or 1.
D) data position of rest, optional type is 0 or 1.
E) data check position, optional type is odd/even parity check/no parity check.
F) baud rate.
G) high level amplitude.
H) low level amplitude.
I) duty ratio.
J) type of coding, comprises NRZ and nonreturn to zero code.
K) differential-type, comprises single-ended coding and differential coding.
(2) convert data to the logical waveform data of low and high level type, these logical waveform data are with string representation.Wherein character ' 0 ' represents low level, and character ' 1 ' represents high level, and such as " 010101 " represents one section of digital waveform be made up of low and high level, and its content be " low height is just high ", the conversion method of logical waveform data is divided into following three kinds of situations:
If a) data are nonreturn to zero code, then 1 character in binary data 1 counterlogic Wave data, its value is " 1 "; 1 character in binary data 0 counterlogic Wave data, its value is " 0 ".
If b) data are single-ended NRZ, then 2 characters in binary data 1 counterlogic Wave data, its value is " 10 "; 2 characters in binary data 0 counterlogic Wave data, its value is " 01 ".
If c) data are difference NRZ, the value of current character is then determined according to the last position character in logical waveform data, 2 characters in binary data 1 counterlogic Wave data, if last position character is " 1 ", its value is " 10 ", if last position character is " 0 ", its value is " 01 "; 2 characters in binary data 0 counterlogic Wave data, if last position character is " 1 ", its value is " and 01 ", if last position character is " 0 ", its value is " 10 ".
Logical waveform data conversion algorithm as shown in Figure 3, comprises following steps:
1.1), checked whether start bit, as without then jumping directly to next step, having had, filling in start bit;
1.2), data bit is filled in;
1.3), checked whether check bit, as without then jumping directly to next step, having had, filling in check bit;
1.4), checked whether position of rest, as without then jumping directly to next step, having had, filling in position of rest;
1.5), completion logic Wave data conversion.
The i-th bit data filling method in Fig. 3 as shown in Figure 4, comprises following steps:
2.1), check whether source data coded system is nonreturn to zero code, jumps to 2.2 in this way), jump to 2.3 as no);
2.2) if source data is 1, then target data is filled in ' 1 ', if source data is 0, then target data is filled in ' 0 ', goes to 2.6);
2.3), check whether source data coded system is unipolarity NRZ, jumps to 2.4 in this way), jump to 2.5 as no);
2.4) if source data is 1, then target data is filled in " 10 ", if source data is 0, then target data is filled in " 01 ", goes to 2.6);
2.5) if source data is 1, and the front a data in target data is " 1 ", then target data is filled in " and 10 ", if front a data is " and 0 ", then target data is filled in " 01 ";
If source data is 0, and the front a data in target data is " 1 ", then target data is filled in " and 01 ", if front a data is " and 0 ", then target data is filled in " 10 ";
2.6), check this position of source data whether be last position, end task in this way, as no repeated execution of steps 2.1), 2.2), 2.3), 2.4), 2.5)
(3) waveform logic data are converted to the sampling number certificate sent for AWG (Arbitrary Waveform Generator) by the baud rate that requires according to test macro of controller and amplitude and duty ratio.
Computational methods are as follows:
A) the sampled point number of the every bit stealing of logical waveform data is calculated according to baud rate and sample frequency,
Formula is as follows:
Sampled point number=AWG (Arbitrary Waveform Generator) sample frequency/baud rate
B) according to the sampled point number after duty ratio data computational logic Wave data every adjustment, formula is as follows:
Sampled point number after adjustment=sampled point number x duty ratio.
C) calculate the value of each point, in logical waveform data, the sampled point of every equal corresponding some, these points have identical value, according to high level and the low level of controller input, can calculate the value of these points.
If signal is single-ended signal, then counterlogic Wave data is the sampled point of 0, and its value is low level, and counterlogic Wave data is the sampled point of 1, and its value is high level.
If signal is differential signal, then the value calculating method of TX+ end is: counterlogic Wave data is the sampled point of 0, and its value is 0, counterlogic Wave data is the sampled point of 1, its value is high level, and counterlogic Wave data is the sampled point of-1, and its value is low level.The value calculating method of TX-end is: counterlogic Wave data is the sampled point of-1, and its value is high level, and counterlogic Wave data is the sampled point of 1, and its value is low level, and counterlogic Wave data is the sampled point of 0, and its value is high level.
(4) sampled point corresponding for logical waveform data every is merged into continuous print Wave data sampled point array according to position order by controller.
(5) Wave data sends, and Wave data sampled point array is delivered to AWG (Arbitrary Waveform Generator) by parallel bus by controller.If differential signal, then need two passages two groups of Wave datas being sent to successively the AWG (Arbitrary Waveform Generator) with synchronizing function.
(6) controller starts AWG (Arbitrary Waveform Generator), produces waveform and delivers in bus.For differential signal, AWG (Arbitrary Waveform Generator) synchronously can send difference waveform.
This technology has completed tests demonstration and verification with the serial communication direct fault location of equipment under test.
Claims (9)
1. a universal serial bus fault filling method, comprises following steps:
Step one, the direct fault location test data information that user sends is converted to the logical waveform data of low and high level type, these logical waveform data are with string representation;
Step 2, the baud rate required according to test macro and amplitude and duty ratio, according to the sampling number certificate that logical waveform data genaration sends for AWG (Arbitrary Waveform Generator);
Step 3, sampled point corresponding for logical waveform data every is merged into continuous print Wave data sampled point array according to position order;
Step 4, Wave data sampled point array delivered to AWG (Arbitrary Waveform Generator) by parallel bus and starts AWG (Arbitrary Waveform Generator);
Step 5, AWG (Arbitrary Waveform Generator) produce waveform and deliver in bus.
2. a kind of universal serial bus fault filling method according to claim 1, is characterized in that described direct fault location test data information comprises:
A) data bit length;
B) data content;
C) data start bit;
D) data position of rest;
E) data check position, type is odd/even parity check/no parity check;
F) baud rate;
G) high level amplitude;
H) low level amplitude;
I) duty ratio;
J) type of coding, comprises NRZ and nonreturn to zero code;
K) differential-type, comprises single-ended coding and differential coding.
3. a kind of universal serial bus fault filling method according to claim 1, is characterized in that direct fault location test data information is converted to logical waveform data and is divided into following three kinds of situations:
If a) data are nonreturn to zero code, then 1 character in binary data 1 counterlogic Wave data, its value is " 1 "; 1 character in binary data 0 counterlogic Wave data, its value is " 0 ";
If b) data are single-ended NRZ, then 2 characters in binary data 1 counterlogic Wave data, its value is " 10 "; 2 characters in binary data 0 counterlogic Wave data, its value is " 01 ";
If c) data are difference NRZ, the value of current character is then determined according to the last position character in logical waveform data, 2 characters in binary data 1 counterlogic Wave data, if last position character is " 1 ", its value is " 10 ", if last position character is " 0 ", its value is " 01 "; 2 characters in binary data 0 counterlogic Wave data, if last position character is " 1 ", its value is " and 01 ", if last position character is " 0 ", its value is " 10 ".
4. a kind of universal serial bus fault filling method according to claim 1, is characterized in that direct fault location test data information is converted to logical waveform data step as follows:
1.1), checked whether start bit, as without then jumping directly to next step, having had, filling in start bit;
1.2), data bit is filled in;
1.3), checked whether check bit, as without then jumping directly to next step, having had, filling in check bit;
1.4), checked whether position of rest, as without then jumping directly to next step, having had, filling in position of rest;
1.5), completion logic Wave data conversion.
5. a kind of universal serial bus fault injection device according to claim 4, is characterized in that step 1.2) in fill in data bit to fill in step as follows:
2.1), check whether source data coded system is nonreturn to zero code, jumps to 2.2 in this way), jump to 2.3 as no);
2.2) if source data is 1, then target data is filled in ' 1 ', if source data is 0, then target data is filled in ' 0 ', goes to 2.6);
2.3), check whether source data coded system is unipolarity NRZ, jumps to 2.4 in this way), jump to 2.5 as no);
2.4) if source data is 1, then target data is filled in " 10 ", if source data is 0, then target data is filled in " 01 ", forwards 2.6 to);
2.5) if source data is 1, and the front a data in target data is " 1 ", then target data is filled in " and 10 ", if front a data is " and 0 ", then target data is filled in " 01 ";
If source data is 0, and the front a data in target data is " 1 ", then target data is filled in " and 01 ", if front a data is " and 0 ", then target data is filled in " 10 ";
2.6), check this position of source data whether be last position, end task in this way, as no repeated execution of steps 2.1), 2.2), 2.3), 2.4), 2.5).
6. a kind of universal serial bus fault filling method according to claim 1, is characterized in that logical waveform data are converted to sampled point data method as follows:
Calculate the sampled point number of the every bit stealing of logical waveform data according to baud rate and sample frequency, formula is as follows:
If data coding mode is NRZ, then:
Sampled point number=AWG (Arbitrary Waveform Generator) sample frequency/baud rate;
If data coding mode is nonreturn to zero code, then:
Sampled point number=AWG (Arbitrary Waveform Generator) sample frequency/baud rate/2.
7. a kind of universal serial bus fault filling method according to claim 1, is characterized in that logical waveform data are converted to sampled point data method as follows:
According to the sampled point number after duty ratio data computational logic Wave data every adjustment, formula is as follows:
Sampled point number after adjustment=sampled point number x duty ratio.
8. a kind of universal serial bus fault filling method according to claim 1, is characterized in that logical waveform data are converted to sampled point data method as follows:
If signal is single-ended signal, then counterlogic Wave data is the sampled point of 0, and its value is low level, and counterlogic Wave data is the sampled point of 1, and its value is high level;
If signal is differential signal, then the value calculating method of TX+ end is: counterlogic Wave data is the sampled point of 0, and its value is 0, counterlogic Wave data is the sampled point of 1, its value is high level, and counterlogic Wave data is the sampled point of-1, and its value is low level; The value calculating method of TX-end is: counterlogic Wave data is the sampled point of-1, and its value is high level, and counterlogic Wave data is the sampled point of 1, and its value is low level, and counterlogic Wave data is the sampled point of 0, and its value is high level.
9. a kind of universal serial bus fault filling method according to claim 1, is characterized in that AWG (Arbitrary Waveform Generator) synchronously can send difference waveform for differential signal.
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