CN103605243B - 一种薄膜晶体管阵列基板及修补方法 - Google Patents
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Abstract
本发明涉及一种薄膜晶体管阵列基板及修补方法,该阵列基板包括基板;多条共用电极配线配置于基板上;多条扫描线和数据线交错配置在基板上以形成多个像素区域;多个像素单元配置于像素区域内,每个像素单元包括主像素电极和次像素电极,以及电性连接主像素电极和次像素电极的电荷分享单元;其中,电荷分享单元包括用于使主像素电极与次像素电极产生电压差的电荷电容。当电荷电容为瑕疵电容时,将其上电极或下电极与其周围连接的线路断开。本发明提出的修补方法不同于以往传统的修补手段,修补过程简单快捷,且修补之后像素单元仍然可以正常工作,只是不能有效解决大视角色偏问题,但是对整个像素单元的显示功能影响不大。
Description
技术领域
本发明涉及液晶显示技术,特别是关于一种大尺寸液晶显示面板的薄膜晶体管阵列基板及修补方法。
背景技术
薄膜晶体管液晶显示面板(TFTLCD)以其卓越的性能已经成为当前市场的主流产品。薄膜晶体管液晶显示面板通常由薄膜晶体管阵列基板、彩色滤光片基板和液晶层组成。其中,薄膜晶体管阵列基板上以阵列的形式排布有多个像素单元(Pixel),每一个像素单元至少包括一个薄膜晶体管,以及与薄膜晶体管对应配置的像素电极(PixelElectrode)。薄膜晶体管作为启动像素单元工作的开关元件,与扫描线(ScanLine)和数据线(DataLine)连接,在扫描信号的驱动下,将数据信号的电压加载在对应的像素电极上,从而实现图像信息的显示。此外,像素电极的部分区域会覆盖在扫描线或基板的共用电极配线(CommonLine)上,重叠的部分即作为存储电容Cst,用于稳定加载在像素电极的数据信号的电压,从而保持画面显示品质。在目前主流的薄膜晶体管阵列基板制程中,在每一个像素电极与其对应的共用电极配线之间还会配置一上电极。该上电极与对应的共用电极配线之间配置有一第一介电层,以保持性隔绝,同时,该上电极与对应的像素电极之间也配置一第二介电层,而此第二介电层会在对应的位置开设接触窗,藉由该接触窗使上电极与对应的像素电极实现电性连接。当有粒子(Particle)因为制程中的缺陷或者其他因素落入存储电容的介电层时,会导致存储电容漏电甚至失效,进而导致像素单元显示异常,影响画面显示品质。由此,就引出了对出现上述问题的薄膜晶体管阵列基板进行局部修补的问题。目前常用的修补方法是切断瑕疵电容周围的电性连接,使瑕疵电容所在的像素单元失效,成为一个暗点。这种修补方法对于目前逐渐成为市场主流的大尺寸薄膜晶体管液晶显示面板而言,颇为繁琐。这是因为,大尺寸液晶显示面板为解决大视角色偏问题多采用一种电荷分享技术,即,每一个像素单元配置有至少三个薄膜晶体管,用于调节主像素电极I区(MainPixel)和次像素电极II区(SubPixel)之间的电压差异,来改善视角色偏。当有粒子落入存储电容的介电层时,需要将存储电容与像素电极之间的电性连接全部切断,以及将存储电容的两极熔接,使瑕疵电容所在的像素单元失效,成为暗点。这种传统的修补方法在操作时步骤繁琐,需要至少四次熔接和五次切断(如图1所示),耗时耗能,而且由于像素单元完全失效,成为暗点,因此会影响画面成像品质。为此,亟需一种更加简便合理的方法,以取代上述传统的修补方法。本发明的发明人正是基于从事液晶显示面板设计制造的实务经验和相关的专业知识,经过多次反复的实验研究,得出一种更加简单合理的修补方法,根据该方法修补的像素单元能够继续工作,对显示效果影响较小。
发明内容
针对上述问题,本发明提供了一种薄膜晶体管阵列基板及修补方法,根据该方法修补的像素单元能够继续工作,对画面成像品质影响较小。
本发明提供一种薄膜晶体管阵列基板的修补方法,所述阵列基板包括:
基板;
多条共用电极配线,配置于所述基板上;
多条扫描线和数据线,交错配置在所述基板上以形成多个像素区域;
多个像素单元,配置于所述像素区域内,每个所述像素单元包括:
主像素电极和次像素电极,以及
电荷分享单元,其电性连接所述主像素电极和次像素电极,并包括用于使所述主像素电极与次像素电极产生电压差的电荷电容;
当所述电荷电容为瑕疵电容时,所述修补方法包括以下步骤:
将瑕疵电容的上电极或下电极与其周围连接的线路断开,以形成电性绝缘。
根据本发明的实施例,上述阵列基板的每一个像素单元电性连接两条扫描线和一条数据线,其中:
所述主像素电极和次像素电极,配置以在第一条扫描线扫描信号的驱动下分别接收数据线上的数据信号而具有相同的电压;
所述电荷分享单元,配置以在第二条扫描线扫描信号的驱动下改变所述次像素电极的电压,使其与所述主像素电极的电压产生差异。
根据本发明的实施例,可以利用激光将瑕疵电容的上电极或下电极与其周围连接的线路熔断。
根据本发明的实施例,上电极为透明导电层。
进一步地,上电极和所述共用电极配线连接。
此外,下电极和所述的数据线通过同一道光罩形成。
本发明还提供一种薄膜晶体管阵列基板,其特征在于,包括:
基板;
多条共用电极配线,配置于所述基板上;
多条扫描线和数据线,交错配置在所述基板上以形成多个像素区域;
多个像素单元,配置于所述像素区域内,每个所述像素单元包括:
主像素电极和次像素电极,以及
电荷分享单元,其电性连接所述主像素电极和次像素电极,并包括用于使所述主像素电极与次像素电极产生电压差的电荷电容,当所述电荷电容为瑕疵电容时,其上电极或下电极与其周围连接的线路断开而电性绝缘。
根据本发明的实施例,上述阵列基板的每一个像素单元电性连接两条扫描线和一条数据线,其中:
所述主像素电极和次像素电极,配置以在所述第一条扫描线扫描信号的驱动下分别接收所述数据线上的数据信号而具有相同的电压;
所述电荷分享单元,配置以在所述第二条扫描线扫描信号的驱动下改变所述次像素电极的电压,使其与所述主像素电极的电压产生差异。
具体地,上述电荷分享单元包括:
薄膜晶体管,其栅极电性连接所述第二条扫描线,漏极电性连接所述次像素电极,源极与所述共用电极配线耦合形成所述电荷电容。
此外,所述电荷分享单元的薄膜晶体管的源极还可以与所述主像素电极耦合形成另一个电荷电容。
本发明与现有技术相比具有以下明显的优点和有益效果:
1、本发明提供的修补方法可以避免存储电容因为粒子或者介电层破洞而发生泄漏的情形,实用性高。
2、本发明提供的修补方法操作简单快捷,对显示效果影响较小。
3、本发明提供的薄膜电晶体阵列基板,在其制作过程中电荷电容的下电极可以与薄膜晶体管的漏极和源极,以及数据线同一工序制成,同属于第二金属层(M2),电荷电容的上电极可以与共用电极配线同一工序一并形成,同属于第一金属层(M1),因此制造成本较低。
附图说明
图1是现有技术中常用的薄膜晶体管阵列基板修补方法的示意图;
图2是现有技术中液晶显示面板阵列基板上一种2G1D像素单元结构的等效电路图;
图3是本发明提供的薄膜晶体管阵列基板修补方法的一个实施例的示意图。
具体实施方式
为了进一步说明本发明的目的、技术方案和技术效果,下面参照现有技术中大尺寸液晶显示面板薄膜晶体管阵列基板及其上排布的2G1D像素单元结构(像素单元与两条扫描线和一条数据线电性连接)的等效电路图,详细地介绍本发明提供的修补方法的工作原理及实施方式,以及与现有技术相比更好的技术效果。需要说明的是,虽然本发明是针对2G1D像素单元结构进行说明,但是不应局限于此。不同厂商设计的像素单元其结构不尽相同,会有多种变形,例如还存在一种1G2D像素单元结构(像素单元与一条扫描线和两条数据线电性连接),因此任何本发明所属技术领域内的技术人员,在不脱离本发明所揭露的精神的前提下,在技术方案实施的形式上和细节上做出任何的修改与变化均在本发明要求保护的范围内。
如图2所示,是布置在大尺寸液晶显示面板阵列基板上的像素单元的等效电路图。由于采用电荷分享技术,该像素单元的像素电极分为主像素电极I区和次像素电极II区,以及电荷分享单元Sharing。其中:
主像素电极I区包括薄膜晶体管T1,该薄膜晶体管T1的栅极电性连接扫描线Scan1,源极电性连接数据线Data,漏极电性连接主像素电极I区;与主像素电极I区电性连接的上电极(图2中未示出)与对应的共用电极配线Com之间形成存储电容Cst1以及液晶电容Clc1。
次像素电极II区包括薄膜晶体管T2,该薄膜晶体管T2的栅极电性连接扫描线Scan1,源极电性连接数据线Data,漏极电性连接次像素电极II区;与次像素电极II区电性连接的上电极(图2中未示出)与对应的共用电极配线Com之间形成存储电容Cst2以及液晶电容Clc2。
电荷分享单元Sharing包括薄膜晶体管T3,该薄膜晶体管T3的栅极电性连接扫描线Scan2,漏极电性连接像素电极II区,源极与主像素电极I区电性连接的上电极之间形成第一电荷电容Ccs1,同时源极还与对应的共用电极配线Com之间形成第二电荷电容Ccs2。
电荷分享技术的基本原理是:首先当扫描线Scan1传来扫描信号时,薄膜晶体管T1和薄膜晶体管T2的漏极和源极导通,使主像素电极I区和次像素电极II区的电压在数据线Data传来的数据信号的作用下达到相同的电位;然后当扫描线Scan2传来扫描信号时,薄膜晶体管T1和薄膜晶体管T2的漏极和源极截止,同时薄膜晶体管T3的漏极和源极导通,致使次像素电极II区上的电荷通过第二电荷电容Ccs2向共用电极配线Com转移,使次像素电极II区的电压与主像素电极I区的电压产生电压差,进而使次像素电极II区的液晶与主像素电极I区的液晶以不同的偏转角度进行偏转,达到多畴显示补偿大视角色偏的技术效果。
如背景技术所介绍,当有粒子落入存储电容的介电层,又或者存储电容的介电层出现破洞时,存储电容会发生泄漏(1eakage)现象。如此一来,将会导致像素单元显示异常,进而使得画面显示品质不佳。此时,需要对出现异常的像素单元进行修补。就目前的修补手段而言,需要利用激光将该像素单元中薄膜晶体管T1与数据线Data的电性连接,薄膜晶体管T1与主像素电极I区的电性连接,薄膜晶体管T2与数据线Data的电性连接,薄膜晶体管T2与次像素电极II区的电性连接,薄膜晶体管T3与次像素电极II区的电性连接切断,以及利用激光将与主像素电极I区电性连接的上电极、与次像素电极II区电性连接的上电极分别与对应的共用电极配线熔接。整个过程步骤繁琐,耗时耗能,而且原本可以正常工作的次像素电极II区也会受到影响,变成了暗点。
针对于此,本发明的技术人员基于从事液晶面板设计制造多年积累的丰富经验和专业知识,对上述传统的修补方法做了一定的改进,使其更具有实用性。
如针对上述像素单元中的第二电荷电容Ccs2因为粒子或者破洞而出现漏电或者失效的情况,本发明提出了一种新的修补方法,即只需去除第二电荷电容Ccs2的修补方法。根据上文描述的电荷分享技术的工作原理,在去除第二电荷电容Ccs2后,当扫描线Scan2传来扫描信号时,薄膜晶体管T3的漏极和源极导通,只有第一电荷电容Ccs1参与工作,整个像素单元仍然能够正常工作,只是不能有效解决大视角色偏问题,但是对整个像素单元的显示功能影响不大,人眼很难分辨前后显示效果的变化。这种修补方法不同于以往传统的修补手段,修补过程更加快捷简便,而且修补之后像素单元仍然能够显示图像,无论在实施方法上还是在技术效果上皆有较大的改进,具有广泛的应用价值。
仍然以背景技术中图1所示的实施例为例,在采用了电荷分享技术的大尺寸液晶显示面板阵列基板的制作过程中,第二电荷电容Ccs2的下电极是与各薄膜晶体管的源极、漏极,以及数据线一并形成,同属于第二金属层(M2),第二电荷电容Ccs2的上电极是与共用电极配线一并形成,同属于第一金属层(M1)。因此第二电荷电容Ccs2可以是由薄膜晶体管T3的源极延伸出来的金属线与由共用电极配线Com延伸出来的金属线形成的金属-绝缘-金属结构,所以本实施例可以采用以下两种方法去除失效的第二电荷电容Ccs2:
利用激光将连接于第二电荷电容Ccs2下电极与薄膜晶体管T3源极之间的金属线断开;或者
利用激光将连接于第二电荷电容Ccs2上电极与共用电极配线Com之间的金属线断开(如图2和图3中所示)。
以上所述,仅是本发明的较佳实施例而已。例如,采用电荷分享技术的像素单元结构可以有很多种变化形式,不仅限于由三个薄膜晶体管组成的结构形式。虽然本发明所披露的实施方式如上,但所述的内容只是为了便于理解本发明而采用的实施方式,并非用以限定本发明。任何本发明所属技术领域内的技术人员,在不脱离本发明所揭露的精神和范围的前提下,可以在实施的形式上及细节上作任何的修改与变化,但本发明的专利保护范围,仍须以所附的权利要求书所界定的范围为准。
Claims (10)
1.一种薄膜晶体管阵列基板的修补方法,所述阵列基板包括:
基板;
多条共用电极配线,配置于所述基板上;
多条扫描线和数据线,交错配置在所述基板上以形成多个像素区域;
多个像素单元,配置于所述像素区域内,每个所述像素单元包括:
主像素电极和次像素电极,以及
电荷分享单元,其电性连接所述主像素电极和次像素电极,并包括用于使所述主像素电极与次像素电极产生电压差的电荷电容;
当所述电荷电容为瑕疵电容时,所述修补方法包括以下步骤:
将瑕疵电容的上电极或下电极与其周围连接的线路断开,以形成电性绝缘。
2.如权利要求1所述的修补方法,其特征在于,所述阵列基板的每一个像素单元电性连接两条扫描线和一条数据线,其中:
所述主像素电极和次像素电极,配置以在第一条扫描线扫描信号的驱动下分别接收数据线上的数据信号而具有相同的电压;
所述电荷分享单元,配置以在第二条扫描线扫描信号的驱动下改变所述次像素电极的电压,使其与所述主像素电极的电压产生差异。
3.如权利要求1或2所述的修补方法,其特征在于:利用激光将瑕疵电容的上电极或下电极与其周围连接的线路熔断。
4.如权利要求1或2所述的修补方法,其特征在于:所述上电极为透明导电层。
5.如权利要求4所述的修补方法,其特征在于:所述上电极和所述共用电极配线连接。
6.如权利要求1或2所述的修补方法,其特征在于:所述下电极和所述的数据线通过同一道光罩形成。
7.一种薄膜晶体管阵列基板,其特征在于,包括:
基板;
多条共用电极配线,配置于所述基板上;
多条扫描线和数据线,交错配置在所述基板上以形成多个像素区域;
多个像素单元,配置于所述像素区域内,每个所述像素单元包括:
主像素电极和次像素电极,以及
电荷分享单元,其电性连接所述主像素电极和次像素电极,并包括用于使所述主像素电极与次像素电极产生电压差的电荷电容,当所述电荷电容为瑕疵电容时,其上电极或下电极与其周围连接的线路断开而电性绝缘。
8.如权利要求7所述的阵列基板,其特征在于,所述阵列基板的每一个像素单元电性连接两条扫描线和一条数据线,其中:
所述像素单元的主像素电极和次像素电极,配置以在其所连接的两条扫描线中的第一条扫描线的扫描信号的驱动下分别接收其所连接的数据线上的数据信号而具有相同的电压;
所述电荷分享单元,配置以在所述两条扫描线中的第二条扫描线的扫描信号的驱动下改变所述次像素电极的电压,使其与所述主像素电极的电压产生差异。
9.如权利要求8所述的阵列基板,其特征在于,所述电荷分享单元包括:
薄膜晶体管,其栅极电性连接所述第二条扫描线,漏极电性连接所述次像素电极,源极与所述共用电极配线耦合形成所述电荷电容。
10.如权利要求9所述的阵列基板,其特征在于,所述电荷分享单元的薄膜晶体管的源极还与所述主像素电极耦合形成另一个电荷电容。
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