CN103517066A - High-definition embedded video encoding and decoding system based on SoC - Google Patents
High-definition embedded video encoding and decoding system based on SoC Download PDFInfo
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- CN103517066A CN103517066A CN201310438513.6A CN201310438513A CN103517066A CN 103517066 A CN103517066 A CN 103517066A CN 201310438513 A CN201310438513 A CN 201310438513A CN 103517066 A CN103517066 A CN 103517066A
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Abstract
The invention belongs to the technical field of photoelectricity product applications and particularly relates to a high-definition embedded video encoding and decoding system based on an SoC. In the system, an Ethernet module receives digital video information output by a high-definition network camera, after peeling of a protocol stack, a naked code stream which accords with an H.264 protocol is written into an external memory module through an inner bus; an SATA hard disc module reads images from the external memory module for storage; an encoding and decoding SoC core reads the images from the external memory module, then decoding is carried out, finally initial images after decoding are written into the external memory module; the encoding and decoding SoC core reads the initial images from the external memory module, and then displaying is carried out through a high-definition display module, or the initial images are subjected to processing displaying through an FPGA processing display module. According to the system, real-time video H.264 encoding and decoding, video stream network transmission, non-encoded video inputting and outputting, high-definition video stable real-time network transmission, encoding and decoding processing and display outputting are achieved.
Description
Technical field
The invention belongs to photovoltaic applied technical field, be specifically related to a kind of high definition embedded video coding/decoding system based on SoC.
Background technology
Video flowing coding techniques has effectively solved the problem of magnanimity video data transmitting under finite bandwidth.How to design a good codec, the encoding and decoding of video data being carried out to real-time high-efficiency become a very important problem that restricts whole system performance.
Coding and decoding video mainly contains following several scheme at present: the storage, decoding, the Internet Transmission that 1) based on DSP:DSP, complete image.Because DSP does not have powerful operating system conventionally, so its control mode is dumb and function singleness, is not suitable for system and controls; 2) based on PC: soft decompress(ion), is difficult to the full application in real time of more way; 3) based on FPGA: encoding and decoding performance is strong, compatible good, but development difficulty is larger.
At present, in correlated digital photoelectric monitoring, search tracking field, the use of digital high-definition camera is more and more general.In this respect, be mainly to utilize PC to carry out encoding and decoding and Video processing to video flowing now.Using PC as processing platform, for single channel video and the system not high to video requirement of real-time, it is low that it possesses technical difficulty, is convenient to the feature that exploitation realizes; But for confidentiality, require the requirement of real-time of high system, magnanimity Video processing and system high, the disposal ability of PC is difficult to meet the requirement of application conventionally.
Summary of the invention
The technical issues that need to address of the present invention are: video coding and decoding system of the prior art is difficult to take into account real-time, control mode is flexible and development difficulty is little specification requirement.
Technical scheme of the present invention is as described below:
A kind of high definition embedded video coding/decoding system based on SoC, comprise ethernet module, outer storing module, SATA hard disc module, encoding and decoding SoC core, FPGA processes and displays module and high definition display module: ethernet module receives the digital video information of being exported by high-definition network camera, carry out, after the peeling off of protocol stack, by internal bus, meeting the H.264 naked code stream of agreement, being written in outer storing module; SATA hard disc module reading images from outer storing module is stored; Encoding and decoding SoC core reading images from outer storing module, carries out decode operation then, finally decoded original image is written in outer storing module; Encoding and decoding SoC core reads original image from outer storing module, shows afterwards, or by FPGA processes and displays module, original image is carried out to processes and displays by high definition display module.
As preferred version,
Described encoding and decoding SoC core adopts Hi3531 chip, it supports high definition encoding and decoding engine, express network interface and high definition video interface, express network interface, high definition video interface are connected with ethernet module, high definition display module respectively, can meet processing and the network demand of 1080p real time codec plate.
Beneficial effect of the present invention is:
High definition embedded video coding/decoding system based on SoC of the present invention, by the built-in engine that possesses 1080p real time codec ability of encoding and decoding SoC and relevant code decode algorithm, the H.264 encoding and decoding of real-time video have been realized, by Ethernet interface and multi-path high-definition video interface, realize the Internet Transmission of video flowing and not input, the output of encoded video, under built-in Linux software administration, realize HD video and stablize real-time Internet Transmission, encoding and decoding processing and show output.
High definition embedded video coding/decoding system based on SoC of the present invention, the management that adopts ARM core to carry out system and each Peripheral Interface is controlled, and control mode is flexible, and development difficulty is little.
Accompanying drawing explanation
Fig. 1 is the composition schematic diagram that the present invention is based on the high definition embedded video coding/decoding system of SoC.
Embodiment
Below in conjunction with drawings and Examples, the high definition embedded video coding/decoding system based on SoC of the present invention is elaborated.
High definition embedded video coding/decoding system based on SoC of the present invention, comprise ethernet module, outer storing module, SATA hard disc module, encoding and decoding SoC core, FPGA processes and displays module and high definition display module: ethernet module receives the digital video information of being exported by high-definition network camera, carry out, after the peeling off of protocol stack, by internal bus, meeting the H.264 naked code stream of agreement, being written in outer storing module; SATA hard disc module reading images from outer storing module is stored; Encoding and decoding SoC core reading images from outer storing module, carries out decode operation then, finally decoded original image is written in outer storing module; Encoding and decoding SoC core reads original image from outer storing module, can show by high definition display module afterwards, also can to original image, carry out processes and displays by FPGA processes and displays module.
Described encoding and decoding SoC core can adopt Hi3531 chip, it supports high definition encoding and decoding engine, express network interface and high definition video interface, express network interface, high definition video interface are connected with ethernet module, high definition display module respectively, can meet processing and the network demand of 1080p real time codec plate.
The built-in Linux of increasing income is the manager of embedded system resource, is managing the central various software and hardware resources of system, has guaranteed system high-speed cruising reliably.Built-in Linux widely hardware supports is beneficial to the efficiency improving peripheral hardware driving exploitation, and outstanding multithreading and memory management ability guarantee that HD video is stablized real-time input, encoding and decoding are processed and show output.Built-in Linux is supported all standard the Internet, and the network communication protocol based on its network subsystem Development of Framework and video camera compatibility obtains H.264 inputting without packet loss of code stream.
Claims (2)
1. the high definition embedded video coding/decoding system based on SoC, comprise ethernet module, outer storing module, SATA hard disc module, encoding and decoding SoC core, FPGA processes and displays module and high definition display module, it is characterized in that: ethernet module receives the digital video information of being exported by high-definition network camera, carry out, after the peeling off of protocol stack, by internal bus, meeting the H.264 naked code stream of agreement, being written in outer storing module; SATA hard disc module reading images from outer storing module is stored; Encoding and decoding SoC core reading images from outer storing module, carries out decode operation then, finally decoded original image is written in outer storing module; Encoding and decoding SoC core reads original image from outer storing module, shows afterwards, or by FPGA processes and displays module, original image is carried out to processes and displays by high definition display module.
2. the high definition embedded video coding/decoding system based on SoC according to claim 1, it is characterized in that: described encoding and decoding SoC core adopts Hi3531 chip, it supports high definition encoding and decoding engine, express network interface and high definition video interface, express network interface, high definition video interface are connected with ethernet module, high definition display module respectively, can meet processing and the network demand of 1080p real time codec plate.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104835162A (en) * | 2015-05-12 | 2015-08-12 | 李鹏飞 | SoC_FPGA-based flexible intelligent machine vision detection system |
| CN105721780A (en) * | 2016-04-05 | 2016-06-29 | 华南理工大学 | Embedded image processing system and method based on SoC FPGA |
| CN110855996A (en) * | 2019-09-30 | 2020-02-28 | 中国船舶重工集团公司第七0九研究所 | Image coding and decoding and network transmission method and device based on FPGA |
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| CN101577816A (en) * | 2009-06-09 | 2009-11-11 | 深圳中兴力维技术有限公司 | Device and method supporting multichannel high definition video decoding |
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| JP2000316121A (en) * | 1999-03-26 | 2000-11-14 | Texas Instr Inc <Ti> | Multiple access mode picture buffer |
| CN101137049A (en) * | 2006-08-29 | 2008-03-05 | 北京汉辰科技有限公司 | Method and apparatus for extending video decoding function on digital television and IPTV SOC platform |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104835162A (en) * | 2015-05-12 | 2015-08-12 | 李鹏飞 | SoC_FPGA-based flexible intelligent machine vision detection system |
| CN105721780A (en) * | 2016-04-05 | 2016-06-29 | 华南理工大学 | Embedded image processing system and method based on SoC FPGA |
| CN110855996A (en) * | 2019-09-30 | 2020-02-28 | 中国船舶重工集团公司第七0九研究所 | Image coding and decoding and network transmission method and device based on FPGA |
| CN110855996B (en) * | 2019-09-30 | 2021-10-22 | 中国船舶重工集团公司第七0九研究所 | Image coding and decoding and network transmission method and device based on FPGA |
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