CN103515483A - Method for preparing crystalline silicon solar cell emitter junction - Google Patents
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- CN103515483A CN103515483A CN201310409063.8A CN201310409063A CN103515483A CN 103515483 A CN103515483 A CN 103515483A CN 201310409063 A CN201310409063 A CN 201310409063A CN 103515483 A CN103515483 A CN 103515483A
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- 238000000034 method Methods 0.000 title claims abstract description 33
- 229910021419 crystalline silicon Inorganic materials 0.000 title abstract description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 59
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 57
- 239000010703 silicon Substances 0.000 claims abstract description 57
- 239000013078 crystal Substances 0.000 claims abstract description 23
- 238000000137 annealing Methods 0.000 claims abstract description 20
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 16
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 15
- 238000000151 deposition Methods 0.000 claims abstract description 13
- 230000003647 oxidation Effects 0.000 claims abstract description 12
- 229910004205 SiNX Inorganic materials 0.000 claims abstract description 11
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000001301 oxygen Substances 0.000 claims abstract description 10
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 10
- 230000006378 damage Effects 0.000 claims abstract description 9
- 239000012299 nitrogen atmosphere Substances 0.000 claims abstract description 9
- 229910052681 coesite Inorganic materials 0.000 claims abstract description 8
- 229910052906 cristobalite Inorganic materials 0.000 claims abstract description 8
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 8
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 8
- 229910052682 stishovite Inorganic materials 0.000 claims abstract description 8
- 229910052905 tridymite Inorganic materials 0.000 claims abstract description 8
- 238000005516 engineering process Methods 0.000 claims abstract description 7
- 229910020286 SiOxNy Inorganic materials 0.000 claims abstract description 6
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 5
- 238000004544 sputter deposition Methods 0.000 claims abstract description 3
- 239000011248 coating agent Substances 0.000 claims description 24
- 238000000576 coating method Methods 0.000 claims description 24
- 238000002513 implantation Methods 0.000 claims description 20
- 238000002360 preparation method Methods 0.000 claims description 13
- 230000008021 deposition Effects 0.000 claims description 12
- 239000010408 film Substances 0.000 claims description 11
- 238000002161 passivation Methods 0.000 claims description 11
- 239000002019 doping agent Substances 0.000 claims description 9
- 238000009792 diffusion process Methods 0.000 claims description 7
- 239000007789 gas Substances 0.000 claims description 7
- 229910004286 SiNxOy Inorganic materials 0.000 claims description 5
- 229910052796 boron Inorganic materials 0.000 claims description 4
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 239000007943 implant Substances 0.000 claims description 4
- 238000002347 injection Methods 0.000 claims description 4
- 239000007924 injection Substances 0.000 claims description 4
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 4
- 238000005204 segregation Methods 0.000 claims description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 2
- 208000027418 Wounds and injury Diseases 0.000 claims description 2
- 229910052785 arsenic Inorganic materials 0.000 claims description 2
- 208000014674 injury Diseases 0.000 claims description 2
- 229910052698 phosphorus Inorganic materials 0.000 claims description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 2
- 238000005477 sputtering target Methods 0.000 claims description 2
- 238000000427 thin-film deposition Methods 0.000 claims description 2
- 150000002500 ions Chemical class 0.000 abstract description 14
- 238000005468 ion implantation Methods 0.000 abstract description 6
- 230000003139 buffering effect Effects 0.000 abstract 4
- 230000000694 effects Effects 0.000 abstract 1
- 239000012535 impurity Substances 0.000 description 5
- 238000010884 ion-beam technique Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- 125000004429 atom Chemical group 0.000 description 2
- 230000005465 channeling Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000000746 purification Methods 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- XYFCBTPGUUZFHI-UHFFFAOYSA-O phosphonium Chemical compound [PH4+] XYFCBTPGUUZFHI-UHFFFAOYSA-O 0.000 description 1
- 125000004437 phosphorous atom Chemical group 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
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Abstract
The invention discloses a method for preparing a crystalline silicon solar cell emitter junction. A buffering layer of a certain thickness is pre-deposited or pre-grown on the suede surface of a silicon wafer; doping ions are implanted into the silicon wafer; the silicon wafer where the doping ions are implanted is annealed in nitrogen atmosphere; the temperature of a furnace is kept constant, oxygen is filled into the furnace, a thermal oxidation layer is grown on the surface of the silicon wafer, and the emitter junction is passivated; the buffering layer is made of SiNx or SiOxNy or SiO2, and the thickness of the buffering layer is kept between 5nm and 20nm. The deposited buffering layer is formed according to low-temperature and low-damage film depositing growing methods like chemical vapor deposition methods, sputtering and thermal oxidation methods. Compared with a traditional ion implantation and annealing technology for preparing a crystalline silicon solar cell emitter junction, the method effectively remotes crystal lattice damages caused by ion implantation, reduces the channel effect, improves the quality of the thermally-oxidized and passivated emitter junction in the annealing process, effectively restrains junction leakage currents, obviously improves the open-circuit voltage Voc and the reverse current Irev2 of a battery and improves the performance of the battery.
Description
Technical field:
The present invention relates to crystal silicon solar energy battery manufacture technology field, particularly a kind of preparation method of crystal silicon solar energy battery emitter junction.
Background technology:
P-n junction is the core of silicon solar cell, and the making quality of p-n junction will directly have influence on the conversion efficiency of solar cell.Traditional diffusion technique is coated in substrate surface by doped source, through High temperature diffusion or by carrying the gas of doped source, through chemical vapour deposition (CVD), forms p-n junction.This technique is complicated to equipment requirement, and the difficult accurately control of p-n junction and its uniformity of making are often undesirable, and diffused sheet resistance is inhomogeneous etc.; Diffusion technology stability and repeatability are not high, and production efficiency is lower.
Ion implantation technique has solved the problems referred to above: the atom after ionization is under the acceleration of highfield, and injection enters silicon chip top layer, forms doping.Doping depth determines by energy and the quality of implanting impurity ion, and doping content is determined by the number (dosage) of implanting impurity ion.The feature of Implantation is impurity dopant profiles good uniformity on same plane, can accurately control Impurity Distribution; The shallow junction that is easy to do, large area implanted dopant still can guarantee that evenly dopant species is extensive, and is easy to automation.
But ion implantation process is a nonequilibrium process, there are a series of collisions with target atom after injecting silicon chip in energetic ion, causes lattice damage, even likely makes crystal structure destroy completely and become unordered amorphous area.Although repair lattice damage by method for annealing, recover or part is recovered carrier mobility and minority carrier life time, be to avoid in annealing process significantly distributing again of impurity, harsher to annealing temperature and time requirement.
Summary of the invention:
The technical problem to be solved in the present invention is: in order to overcome above-mentioned defect, a kind of battery emitter junction and preparation method of crystal silicon solar are provided, remove the lattice damage that Implantation causes, reduce channeling effect, improve the quality of thermal oxidation passivation emitter junction in annealing process, effectively suppress leakage current in junction region, improve the performance of solar cell.
Technical scheme of the present invention is: the battery emitter junction of crystal silicon solar, P-N ties and is provided with one deck resilient coating, it between resilient coating and emitter junction, is one deck passivation layer, described resilient coating is SiNx, SiOxNy or SiO2 etc., buffer layer thickness is controlled in 5-20 nanometer range, and thermal oxidation passivation layer thickness is in 5-30 nanometer range.
The battery emitter junction of described crystal silicon solar is prepared based on following method.Crystalline silicon is monocrystalline or polysilicon.
The preparation method of battery emitter junction, first at silicon wafer suede pre-deposition or the certain thickness resilient coating of pregrown; Dopant implant ion; The silicon chip of dopant implant ion is annealed in nitrogen atmosphere; Keep temperature-resistant in stove, pass into oxygen, at silicon chip surface growth thermal oxide layer, passivation emitter junction.
Described resilient coating is SiNx, SiOxNy or SiO2 etc., and buffer layer thickness is controlled in 5-20 nanometer range.
The concrete grammar of the resilient coating of described deposition can be used chemical vapour deposition technique, sputter and thermal oxidation etc. to have the thin film deposition growing method of low temperature, low injury characteristic.
Described doping Implantation refers to the doping Implantation that contains the trivalents such as P, B or As or pentad is formed to P type or N-type silicon emitter junction or height knot.
The vertical direction angle that described doping ion beam injection direction departs from target sheet is 0 °～10 °, and energy, dosage and the dopant species of doping Implantation are determined according to actual conditions.
The described silicon chip by injection is annealed at nitrogen atmosphere, and because the doping ion injecting is at the diffusion coefficient of silicon and different at the segregation coefficient of resilient coating and silicon interface, desired annealing temperature and time determine according to actual conditions.
The described specific practice at silicon chip surface growth thermal oxide layer is: keep furnace annealing temperature-resistant, pass into oxygen, adjusting gas flow and thermal oxidation time, growth thickness is the thermal oxide layer of 5-30 nanometer.
The invention has the beneficial effects as follows: inject in conjunction with annealing process making crystal silicon solar energy battery emitter junction and compare with conventional ion, the present invention effectively removes the lattice damage that Implantation causes, reduce channeling effect, improve the quality of thermal oxidation passivation emitter junction in annealing process, effectively suppress leakage current in junction region, the open circuit voltage Voc of battery has larger gain, and reverse current Irev2 improves obviously, has significantly improved the electricity conversion (improving 1%) of battery.
Accompanying drawing explanation:
Fig. 1 is preparation technology's schematic flow sheet of a kind of crystal silicon solar energy battery emitter junction disclosed by the invention;
Embodiment:
Below in conjunction with the drawings and specific embodiments, the present invention will be further described.
Embodiment 1
Step 1: adopt DC pulse reactive magnetron sputtering method at the amorphous SiNxOy of silicon wafer suede pre-deposition 5-20nm film as Implantation resilient coating; The concrete steps of DC pulse reactive magnetron sputtering method deposition SiNxOy film are: select Si as sputtering target, sputter gas is Ar, and reacting gas is that N2 and O2.N2 and Ar flow-rate ratio are 10sccm:20sccm, and sputtering power is 200w, reaction pressure 0.6Pa, N2 and O2 flow-rate ratio are 2～5.
Step 2: adopt phosphine as ion source ionization material, focused ion beam is departed to 0 °～10 ° of target sheet vertical direction after magnetic analyzer purification, accelerated scan and inject on p-type silicon chips, phosphonium ion Implantation Energy is 5-30KeV, and implantation dosage is 5 * 10
14cm
-2～10
16cm
-2;
Step 3: adopt high annealing, the silicon chip after injecting is placed in to the nitrogen atmosphere 20-60min that anneals under 800 ℃ of-900 ℃ of furnace temperature, activate doping ion, advance phosphorus atoms to silicon chip diffusion inside, repair a small amount of remaining lattice damage simultaneously.
Step 4: keep temperature-resistant in stove, pass into oxygen, oxidization time 10-30min, in the oxide layer of silicon chip surface heat growth 5-30 nanometer, passivation emitter junction, completes p-n junction and makes.In described step 4, the growth of thermal oxide layer completes after step 3 high-temperature annealing process in same boiler tube.Step 2-4 adopts existing technique.
Embodiment 2
Step 1: adopt PECVD technology at the amorphous SiNx of silicon wafer suede pre-deposition 5-20nm film as Implantation resilient coating; The SiH4 flow of pecvd process deposition SiNx film is 600-700sccm, and NH3 flow is 1400-1500sccm, and operating pressure is 0.1-0.3mbar, technological temperature 300-500 ℃, discharge frequency 2450MHz, discharge power 2000-3500w, discharge time 15-30s.:
Step 2: adopt BF3/B2H6 as ion source ionization material, focused ion beam is departed to 0 °～10 ° of target sheet vertical direction after magnetic analyzer purification, accelerated scan and inject on N-type silicon chips, boron ion implantation energy is 10-30KeV, and implantation dosage is 5 * 10
14cm
-2～10
16cm
-2;
Step 3: adopt high annealing, the silicon chip after injecting is placed in to the nitrogen atmosphere 80-160min that anneals under 950 ℃ of-1100 ℃ of furnace temperature, activate doping ion, advance boron atom to silicon chip diffusion inside, repair a small amount of remaining lattice damage simultaneously.
Step 4: keep temperature-resistant in stove, pass into oxygen, oxidization time 5-30min, in silicon chip surface heat growth 5-30nm oxide layer, passivation emitter junction, completes p-n junction and makes.In described step 4, the growth of thermal oxide layer completes after step 3 high-temperature annealing process in same boiler tube.
Embodiment 3
Step 1: at the amorphous SiO2films of silicon wafer suede preheating oxidation growth 5-20 nanometer as Implantation resilient coating.
Step 2, the process conditions of step 3 and step 4(or employing prior art, conventional ion injects in conjunction with annealing process makes crystal silicon solar energy battery emitter junction) the same.
Embodiment 4
Step 1, step 2 and step 3 are the same.
Step 4: the technological parameter of surface of crystalline silicon passivation, can adopt the oxidization time of nitrogen flow, 6Lmin-1 oxygen flow and 25min of oxidizing temperature, the 10Lmin-1 of 780 ℃.After surface of crystalline silicon growth SiO2 passivating film (also can comprise dry oxygen, wet oxygen etc.), more than effective minority carrier life time of crystalline silicon improves 10 μ s, greatly reduced the recombination rate of crystal silicon cell, thereby improved battery performance.
Above-described embodiment does not limit the present invention in any form, and all employings are equal to replaces or technical scheme that the mode of equivalent transformation obtains, does not all exceed protection scope of the present invention.
Claims (10)
1. a preparation method for the battery emitter junction of crystal silicon solar, is characterized in that first at silicon wafer suede pre-deposition or the certain thickness resilient coating of pregrown; Dopant implant ion; The silicon chip of dopant implant ion is annealed in nitrogen atmosphere; Keep temperature-resistant in stove, pass into oxygen, at silicon chip surface growth thermal oxide layer, passivation emitter junction; Described resilient coating is SiNx, SiOxNy or SiO2, and buffer layer thickness is controlled in 5-20 nanometer range.
2. the preparation method of the battery emitter junction of crystal silicon solar according to claim 1, is characterized in that the resilient coating of described deposition is used chemical vapour deposition technique, sputter and thermal oxidation method etc. to have the thin film deposition growth of low temperature, low injury characteristic.
3. the preparation method of the battery emitter junction of crystal silicon solar according to claim 1, is characterized in that described doping Implantation refers to that the doping Implantation that contains P, B or As etc. three or pentad is formed to N-type or P type emitter junction or height to be tied; It is 0 °～10 ° that described doping Implantation departs from feature crystal orientation angle, and energy, dosage and the dopant species of doping Implantation are determined according to actual conditions.
4. the preparation method of the battery emitter junction of crystal silicon solar according to claim 1, the silicon chip by injection described in it is characterized in that is annealed at nitrogen atmosphere, because the doping ion injecting is at the diffusion coefficient of silicon and different at the segregation coefficient of resilient coating and silicon interface, desired annealing temperature and time determine according to actual conditions.
5. the preparation method of the battery emitter junction of crystal silicon solar according to claim 4, the segregation coefficient that it is characterized in that resilient coating and silicon interface is different, and desired annealing temperature and time determine according to actual conditions: the amorphous SiNxOy film of 5-20nm is as Implantation resilient coating; Adopt high annealing, the silicon chip after injecting is placed in to the nitrogen atmosphere 20-60min that anneals under 800 ℃ of-900 ℃ of furnace temperature;
The amorphous SiNx film of 5-20nm is as Implantation resilient coating; Adopt high annealing, the silicon chip after injecting is placed in to the nitrogen atmosphere 80-160min that anneals under 950 ℃ of-1100 ℃ of furnace temperature, activate doping ion.
6. the preparation method of the battery emitter junction of crystal silicon solar according to claim 1, it is characterized in that the described specific practice at silicon chip surface growth thermal oxide layer is: keep furnace annealing temperature-resistant, pass into oxygen, adjusting gas flow and thermal oxidation time, the thermal oxide layer that growth thickness is 5-30nm.
7. the preparation method of the battery emitter junction of crystal silicon solar according to claim 1, is characterized in that with DC pulse reactive magnetron sputtering method at the amorphous SiNxOy of silicon wafer suede pre-deposition 5-20nm film as Implantation resilient coating; The concrete steps of DC pulse reactive magnetron sputtering method deposition SiNxOy film are: select Si as sputtering target, sputter gas is Ar, and reacting gas is that N2 and O2.N2 and Ar flow-rate ratio are 10sccm:20sccm, and sputtering power is 200w, reaction pressure 0.6Pa, N2 and O2 flow-rate ratio are 2～5.
8. the preparation method of the battery emitter junction of crystal silicon solar according to claim 1, it is characterized in that adopting PECVD technology at the amorphous SiNx of silicon wafer suede pre-deposition 5-20nm film as Implantation resilient coating; The SiH4 flow of pecvd process deposition SiNx film is 600-700sccm, and NH3 flow is 1400-1500sccm, and operating pressure is 0.1-0.3mbar, technological temperature 300-500 ℃, discharge frequency 2450MHz, discharge power 2000-3500w, discharge time 15-30s;
Or at the amorphous SiO2films of silicon wafer suede preheating oxidation growth 5-20nm as Implantation resilient coating.Resilient coating is not limited to above SiNx, SiOxNy or SiO2.
9. according to the battery emitter junction of the crystal silicon solar described in claim 1-8, it is characterized in that P-N emitter junction is provided with one deck resilient coating, between resilient coating and emitter junction, be one deck passivation layer, described resilient coating is SiNx, SiOxNy or SiO2 etc., and buffer layer thickness is controlled within the scope of 5-20nm.
10. the battery emitter junction of crystal silicon solar according to claim 9, is characterized in that passivation layer is thermal oxidation SiO2, and its THICKNESS CONTROL is within the scope of 5-30nm.
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|---|---|---|---|---|
| CN105244412A (en) * | 2015-09-07 | 2016-01-13 | 中国东方电气集团有限公司 | Passivation method for N-type crystalline silicon cell boron emitter |
| CN106299019A (en) * | 2016-08-05 | 2017-01-04 | 山西潞安太阳能科技有限责任公司 | A kind of polysilicon chip back side purifying process |
| CN107768456A (en) * | 2017-09-30 | 2018-03-06 | 无锡厚发自动化设备有限公司 | A kind of etching method for reducing silicon chip reflectivity |
| CN108550656A (en) * | 2018-05-17 | 2018-09-18 | 苏州晶洲装备科技有限公司 | A kind of electrical pumping equilibrium annealing device |
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Cited By (6)
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| CN107768456A (en) * | 2017-09-30 | 2018-03-06 | 无锡厚发自动化设备有限公司 | A kind of etching method for reducing silicon chip reflectivity |
| CN108550656A (en) * | 2018-05-17 | 2018-09-18 | 苏州晶洲装备科技有限公司 | A kind of electrical pumping equilibrium annealing device |
| CN108550656B (en) * | 2018-05-17 | 2023-11-21 | 苏州晶洲装备科技有限公司 | Electric injection equilibrium annealing device |
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