CN103439844B - The method of array substrate, display unit and making array substrate - Google Patents
The method of array substrate, display unit and making array substrate Download PDFInfo
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- CN103439844B CN103439844B CN201310389372.3A CN201310389372A CN103439844B CN 103439844 B CN103439844 B CN 103439844B CN 201310389372 A CN201310389372 A CN 201310389372A CN 103439844 B CN103439844 B CN 103439844B
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- 239000000758 substrate Substances 0.000 title claims abstract description 104
- 238000000034 method Methods 0.000 title claims abstract description 25
- 239000002184 metal Substances 0.000 claims abstract description 230
- 238000009413 insulation Methods 0.000 claims abstract description 43
- 239000010408 film Substances 0.000 claims description 41
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 239000010409 thin film Substances 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 3
- 230000007423 decrease Effects 0.000 abstract description 7
- 238000004904 shortening Methods 0.000 abstract description 3
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- Engineering & Computer Science (AREA)
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
Abstract
The present invention relates to array substrate, display unit and make the method for array substrate, wherein a kind of array substrate, comprise: the first metal connection section and the 2nd metal connection section being positioned at different layers, also comprise for connecting the first metal connection section and the transparent conductive film layer of the 2nd metal connection section; First metal section and the 2nd metal connection section are separated by the first insulation layer; First metal connection section and the 2nd metal connection section are overlapping at least partly on the direction being perpendicular to array substrate plane. The invention has the beneficial effects as follows: the first metal connection section is overlapping at least partly in the direction perpendicular to the base plate plane with the 2nd metal connection section, for being connected the first metal connection section, the transparent conductive film layer of the 2nd metal connection section shortening greatly with the distance in underlay substrate parallel direction, reduce the size of the contact resistance that transparent conductive film layer contacts with the first metal connection section, the 2nd metal connection section, decrease the generation that transparent conductive film layer is domatic.
Description
Technical field
The present invention relates to technical field of liquid crystal display, particularly relate to a kind of array substrate, display unit and make the method for array substrate.
Background technology
Array substrate comprises underlay substrate 1, and the grid metal connection section 2 being formed in successively on underlay substrate 1, first insulation layer 3, source/drain metal connection section 4, 2nd insulation layer 5, need connect Gate(grid metal connection section) and SD(source/drain metal connection section) metal time, can arrange respectively on Gate and SD metal first cross hole 7 and the 2nd cross hole 8 remove the first insulation layer 3 above grid metal connection section and the 2nd insulation layer 5, and remove the 2nd insulation layer 5 above source/drain metal connection section 4, then with ITO(transparent conductive film layer) 6 connect, as shown in Figure 1, gradient angle and the insulation layer section of existence difference is there is owing to crossing hole, and distance between grid metal connection section 2 and source/drain metal connection section 4 is long, there is multiple slope structure in ITO6 between grid metal connection section 2 and source/drain metal connection section 4, and the resistance between grid metal connection section 2 and source/drain metal connection section 4 is increased, and easily there is phenomenon of rupture in ITO6.
Summary of the invention
In order to solve the problems of the technologies described above, the present invention provides a kind of array substrate, display unit and makes the method for array substrate, reduces the slope structure of the transparent conductive film layer between grid metal connection section, source/drain metal connection section, reduces resistance.
In order to achieve the above object, the technical solution used in the present invention is: a kind of array substrate, comprise: the first metal connection section and the 2nd metal connection section being positioned at different layers, also comprise the transparent conductive film layer for connecting described first metal connection section and the 2nd metal connection section;
Described first metal section and described 2nd metal connection section are separated by the first insulation layer; Described first metal connection section and described 2nd metal connection section are overlapping at least partly on the direction being perpendicular to array substrate plane.
Further, also comprise:
With described 2nd metal connection section with the 2nd insulation layer of layer or formation on described 2nd metal connection section;
Run through the first opening of described 2nd insulation layer and the first insulation layer, described first opening expose described first metal connection section at least partially and described 2nd metal connection section at least partially; Described transparent conductive film layer covers described first opening to connect described first metal connection section and described 2nd metal connection section.
Further, at least part of edge of at least part of edge of described first metal connection section and described 2nd metal connection section is concordant on the direction being perpendicular to array substrate plane, and described first opening exposes the edge of this concordant described first metal connection section and the edge of described 2nd metal connection section.
Further, described 2nd metal connecting portion is in the surface of described first metal connection section.
Further, described first opening also runs through described 2nd metal connection section, and exposes a part for described first metal connection section upper surface.
Further, described array substrate is thin-film transistor array base-plate, and described first metal connection section and the 2nd metal connecting portion are in the neighboring area of described array substrate; Described first metal connection section is grid metal connection sections, and described 2nd metal connection section is source/drain metal connection section.
Further, the described grid metal connection section on described array substrate, the first insulation layer, described source/drain metal connection section, the 2nd insulation layer are successively set on the underlay substrate of described array substrate; Or,
The described source/drain metal connection section of described array substrate, the first insulation layer, described grid metal connection section, the 2nd insulation layer are successively set on the underlay substrate of described array substrate.
Further,
Described grid metal connection section is one end connection section of the grid line of described array substrate, described source/drain metal connection section is one end connection section of grid line outlet line, and described transparent conductive film layer is used for described grid line and described grid line outlet line being electrically connected by described first opening; Or,
Described source/drain metal connection section is one end connection section of the data line of described array substrate, described grid metal connection section is one end connection section of the data line outlet line of described array substrate, and described transparent conductive film layer is used for described data line and described data line outlet line being electrically connected by described first opening; Or,
It it is one end connection section of the signal wire of described array substrate one of in described grid metal connection section and described source/drain metal connection section, another is the repair line of this signal wire, described transparent conductive film layer is used for described signal wire and described repair line being electrically connected by described first opening, and wherein said signal wire is grid line or data line; Or,
The connection section that described grid metal connection section and described source/drain metal connection section are respectively between the different line segments of the public contact conductor of described array substrate, described transparent conductive film layer is for being electrically connected this difference line segment by described first opening.
The present invention also provides a kind of display unit, comprises above-mentioned array substrate.
The present invention also provides the manufacture method of a kind of array substrate, comprising:
On array substrate, the first metal connection section being positioned at different layers and the 2nd metal connection section is formed by composition technique;
On array substrate, the transparent conductive film layer for connecting described first metal connection section and the 2nd metal connection section is formed by composition technique;
Described method also comprises; The first insulation layer is formed between described first metal section and described 2nd metal connection section;
And, described first metal connection section is overlapping at least partly in the direction perpendicular to the base plate plane with described 2nd metal connection section.
Further, also comprise
The described first metal connection section or described 2nd metal connection section of array substrate top layer are formed the 2nd insulation layer;
By composition technique, run through described 2nd insulation layer and the first insulation layer forms the first opening, described first opening expose described first metal connection section at least partially and described 2nd metal connection section at least partially;
By composition technique, described first opening forms described transparent conductive film layer to connect described first metal connection section and described 2nd metal connection section.
The invention has the beneficial effects as follows: described first metal connection section is overlapping at least partly in the direction perpendicular to the base plate plane with described 2nd metal connection section, for being connected described first metal connection section, the transparent conductive film layer of described 2nd metal connection section shortening greatly with the distance in described underlay substrate parallel direction, reduce the size of the contact resistance that transparent conductive film layer contacts with described first metal connection section, the 2nd metal connection section, decrease the generation that transparent conductive film layer is domatic.
Accompanying drawing explanation
Fig. 1 represents array substrate schematic cross-section in prior art;
Fig. 2 represents array substrate schematic cross-section in one embodiment of the invention;
Fig. 3 represents array substrate schematic cross-section in one embodiment of the invention;
Fig. 4 represents array substrate schematic cross-section in one embodiment of the invention.
Embodiment
The structure of the present invention and principle being described in detail below in conjunction with accompanying drawing, illustrated embodiment, only for explaining the present invention, not limits protection scope of the present invention with this.
As shown in Figure 2, the present embodiment provides a kind of array substrate, comprising: the first metal connection section 2 and the 2nd metal connection section 4 being positioned at different layers, also comprises the transparent conductive film layer 6 for connecting described first metal connection section 2 and the 2nd metal connection section 4;
Described first metal section 2 is separated by the first insulation layer 3 with described 2nd metal connection section 4; Described first metal connection section 2 and described 2nd metal connection section 4 are overlapping at least partly on the direction being perpendicular to array substrate plane.
In the present embodiment, described first metal connection section is overlapping at least partly in the direction perpendicular to the base plate plane with described 2nd metal connection section, for being connected described first metal connection section, the transparent conductive film layer of described 2nd metal connection section shortening greatly with the distance in described underlay substrate parallel direction, reduce the size of the contact resistance that transparent conductive film layer contacts with described first metal connection section, the 2nd metal connection section, decrease the generation that transparent conductive film layer is domatic. Improve picture quality, decrease the generation that transparent conductive film layer is domatic simultaneously, then greatly reduce the possibility of transparent conductive film layer fracture.
With described 2nd metal connection section with the 2nd insulation layer of layer or formation on described 2nd metal connection section;
Run through the first opening of described 2nd insulation layer 5 and the first insulation layer 3, described first opening expose described first metal connection section 2 at least partially and described 2nd metal connection section 4 at least partially; Described transparent conductive film layer 6 covers described first opening to connect described first metal connection section 2 and described 2nd metal connection section 4.
What only adopt a first opening opening in the present embodiment arranges the structure formation replacing two openings of the prior art, decreases the generation that transparent conductive film layer is domatic, then greatly reduce the possibility of transparent conductive film layer fracture.
In the present embodiment, it is zero in order to realize described first metal connection section 2 with described 2nd metal connection section 4 in the gap with the parallel plane direction of array substrate, reducing to realize the slope structure of the transparent conductive film layer 6 for being connected described first metal connection section 2, described 2nd metal connection section 4, the setting of described first metal connection section 2, described 2nd metal connection section 4 is preferably following structure formation:
As shown in Figure 3, in one embodiment, at least part of edge of at least part of edge of described first metal connection section 2 and described 2nd metal connection section 4 is concordant on the direction being perpendicular to array substrate plane, and described first opening exposes the edge of this concordant described first metal connection section 2 and the edge of described 2nd metal connection section 4.
It should be noted that, at least part of edge of at least part of edge of described first metal connection section 2 and described 2nd metal connection section 4 is concordant on the direction being perpendicular to array substrate plane, namely at least part of edge of described first metal connection section 2 is overlapping with at least part of edge of described 2nd metal connection section 4 on the direction being perpendicular to array substrate plane, be the first metal connection section 2 described in above-mentioned described embodiment with described 2nd metal connection section 4 on the direction being perpendicular to array substrate plane at least part of overlapping in a kind of enforcement mode.
As shown in Figure 4, in an embodiment, described 2nd metal connection section 4 is positioned at the surface of described first metal connection section 2.
Described first opening also runs through described 2nd metal connection section 4, and exposes a part for described first metal connection section 2 upper surface.
In the present embodiment, described array substrate is thin-film transistor array base-plate, described first metal connection section 2 and the 2nd metal connection section 4 are positioned at the neighboring area of described array substrate, and (array substrate can be display base plate, it can also be the substrate of other purposes, such as solar panel etc., here neighboring area, refer to array substrate periphery for signal wire draw, comprise wiring walk line, liner etc. region, the such as non-display area of display base plate periphery); Described first metal connection section 2 is grid metal connection sections, and described 2nd metal connection section 4 is source/drain metal connection section.
Described grid metal connection section, described source/drain metal connection section are overlapping at least partly, only be arranged on described grid metal connection section, described source/drain metal connection section transparent conductive film layer 6 can directly by described grid metal connection section, described former/leakage metal connection section is connected, decrease contact resistance, the part contacted with described grid metal connection section, described source/drain metal connection section on transparent conductive film layer 6 increases relative to ratio shared by transparent conductive film layer entirety on array substrate, decreases the possibility that transparent conductive film layer 6 ruptures simultaneously.
Described grid metal connection section on described array substrate, the first insulation layer 3, described source/drain metal connection section, the 2nd insulation layer 5 are successively set on the underlay substrate 1 of described array substrate; Or,
The described source/drain metal connection section of described array substrate, the first insulation layer 3, described grid metal connection section, the 2nd insulation layer 5 are successively set on the underlay substrate 1 of described array substrate.
In the present embodiment, described grid metal connection section is one end connection section of the grid line of described array substrate, described source/drain metal connection section is one end connection section of grid line outlet line, and described transparent conductive film layer is used for described grid line and described grid line outlet line being electrically connected by described first opening; Or,
Described source/drain metal connection section is one end connection section of the data line of described array substrate, described grid metal connection section is one end connection section of the data line outlet line of described array substrate, and described transparent conductive film layer is used for described data line and described data line outlet line being electrically connected by described first opening; Or,
It it is one end connection section of the signal wire of described array substrate one of in described grid metal connection section and described source/drain metal connection section, another is the repair line of this signal wire, described transparent conductive film layer is used for described signal wire and described repair line being electrically connected by described first opening, and wherein said signal wire is grid line or data line; Or,
The connection section that described grid metal connection section and described source/drain metal connection section are respectively between the different line segments of the public contact conductor of described array substrate, described transparent conductive film layer is for being electrically connected this difference line segment by described first opening.
The embodiment of the present invention also provides a kind of display unit, comprises above-mentioned array substrate.
Also providing the manufacture method of a kind of array substrate in the embodiment of the present invention, this array substrate can be the array substrate of any one above-mentioned type, and described method comprises:
On array substrate, the first metal connection section being positioned at different layers and the 2nd metal connection section is formed by composition technique;
On array substrate, the transparent conductive film layer for connecting described first metal connection section and the 2nd metal connection section is formed by composition technique;
Described method also comprises; The first insulation layer is formed between described first metal section and described 2nd metal connection section;
And, described first metal connection section is overlapping at least partly in the direction perpendicular to the base plate plane with described 2nd metal connection section.
Also comprise: on the described first metal connection section or described 2nd metal connection section of array substrate top layer, form the 2nd insulation layer;
By composition technique, run through described 2nd insulation layer and the first insulation layer forms the first opening, described first opening expose described first metal connection section at least partially and described 2nd metal connection section at least partially;
By composition technique, described first opening forms described transparent conductive film layer to connect described first metal connection section and described 2nd metal connection section. The above is the better embodiment of the present invention, it should be noted that to those skilled in the art, under the prerequisite not departing from principle of the present invention, it is also possible to make some improvements and modifications, and these improvements and modifications also should be considered as protection domain of the present invention.
Claims (9)
1. an array substrate, comprising: the first metal connection section and the 2nd metal connection section being positioned at different layers, also comprises the transparent conductive film layer for connecting described first metal connection section and the 2nd metal connection section;
It is characterized in that, described first metal connection section and described 2nd metal connection section are separated by the first insulation layer; Described first metal connection section and described 2nd metal connection section are overlapping at least partly on the direction being perpendicular to array substrate plane, described array substrate is thin-film transistor array base-plate, and described first metal connection section and the 2nd metal connecting portion are in the neighboring area of described array substrate; Described first metal connection section is grid metal connection sections, and described 2nd metal connection section is source/drain metal connection section;
Described array substrate also comprises:
With described 2nd metal connection section with the 2nd insulation layer of layer or formation on described 2nd metal connection section;
Run through the first opening of described 2nd insulation layer and the first insulation layer, described first opening expose described first metal connection section at least partially and described 2nd metal connection section at least partially; Described transparent conductive film layer covers described first opening to connect described first metal connection section and described 2nd metal connection section.
2. array substrate according to claim 1, it is characterized in that, at least part of edge of at least part of edge of described first metal connection section and described 2nd metal connection section is concordant on the direction being perpendicular to array substrate plane, and described first opening exposes the edge of this concordant described first metal connection section and the edge of described 2nd metal connection section.
3. array substrate according to claim 1, it is characterised in that, described 2nd metal connecting portion is in the surface of described first metal connection section.
4. array substrate according to claim 3, it is characterised in that, described first opening also runs through described 2nd metal connection section, and exposes a part for described first metal connection section upper surface.
5. array substrate according to claim 1, it is characterised in that, the described grid metal connection section on described array substrate, the first insulation layer, described source/drain metal connection section, the 2nd insulation layer are successively set on the underlay substrate of described array substrate; Or,
The described source/drain metal connection section of described array substrate, the first insulation layer, described grid metal connection section, the 2nd insulation layer are successively set on the underlay substrate of described array substrate.
6. array substrate according to claim 1, it is characterised in that,
Described grid metal connection section is one end connection section of the grid line of described array substrate, described source/drain metal connection section is one end connection section of grid line outlet line, and described transparent conductive film layer is used for described grid line and described grid line outlet line being electrically connected by described first opening; Or,
Described source/drain metal connection section is one end connection section of the data line of described array substrate, described grid metal connection section is one end connection section of the data line outlet line of described array substrate, and described transparent conductive film layer is used for described data line and described data line outlet line being electrically connected by described first opening; Or,
It it is one end connection section of the signal wire of described array substrate one of in described grid metal connection section and described source/drain metal connection section, another is the repair line of this signal wire, described transparent conductive film layer is used for described signal wire and described repair line being electrically connected by described first opening, and wherein said signal wire is grid line or data line; Or,
The connection section that described grid metal connection section and described source/drain metal connection section are respectively between the different line segments of the public contact conductor of described array substrate, described transparent conductive film layer is for being electrically connected this difference line segment by described first opening.
7. a display unit, it is characterised in that, comprise the array substrate described in the arbitrary item of claim 1-6.
8. a making method for array substrate, comprising:
On array substrate, the first metal connection section being positioned at different layers and the 2nd metal connection section is formed by composition technique;
On array substrate, the transparent conductive film layer for connecting described first metal connection section and the 2nd metal connection section is formed by composition technique;
It is characterized in that, described array substrate is thin-film transistor array base-plate, and described first metal connection section and the 2nd metal connecting portion are in the neighboring area of described array substrate; Described first metal connection section is grid metal connection sections, and described 2nd metal connection section is source/drain metal connection section;
Described method also comprises:
The first insulation layer is formed between described first metal connection section and described 2nd metal connection section;
And, described first metal connection section is overlapping at least partly in the direction perpendicular to the base plate plane with described 2nd metal connection section.
9. the making method of array substrate according to claim 8, it is characterised in that, also it is included on the described first metal connection section of array substrate top layer or described 2nd metal connection section and forms the 2nd insulation layer;
By composition technique, run through described 2nd insulation layer and the first insulation layer forms the first opening, described first opening expose described first metal connection section at least partially and described 2nd metal connection section at least partially;
By composition technique, described first opening forms described transparent conductive film layer to connect described first metal connection section and described 2nd metal connection section.
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| CN201310389372.3A CN103439844B (en) | 2013-08-30 | 2013-08-30 | The method of array substrate, display unit and making array substrate |
| PCT/CN2013/089379 WO2015027619A1 (en) | 2013-08-30 | 2013-12-13 | Array substrate, display apparatus, and method for manufacturing array substrate |
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| CN201310389372.3A CN103439844B (en) | 2013-08-30 | 2013-08-30 | The method of array substrate, display unit and making array substrate |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103439844B (en) * | 2013-08-30 | 2016-06-01 | 京东方科技集团股份有限公司 | The method of array substrate, display unit and making array substrate |
| CN104362153B (en) * | 2014-09-17 | 2017-07-04 | 京东方科技集团股份有限公司 | Array base palte and preparation method thereof, display device |
| CN105140179B (en) * | 2015-08-13 | 2018-12-14 | 京东方科技集团股份有限公司 | Array substrate and its manufacturing method, display panel and display device |
| CN106094371A (en) * | 2016-08-24 | 2016-11-09 | 京东方科技集团股份有限公司 | Array base palte and preparation method thereof, display floater and display device |
| CN110262139B (en) * | 2019-06-11 | 2021-07-06 | 惠科股份有限公司 | Contact hole structure, array substrate and display panel |
| CN116779616A (en) * | 2022-03-07 | 2023-09-19 | 京东方科技集团股份有限公司 | Display substrate, manufacturing method thereof and display device |
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| Publication number | Publication date |
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| CN103439844A (en) | 2013-12-11 |
| WO2015027619A1 (en) | 2015-03-05 |
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