CN103427795B - A kind of rectangular pulse signal generating circuit and production method - Google Patents
A kind of rectangular pulse signal generating circuit and production method Download PDFInfo
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- CN103427795B CN103427795B CN201310349521.3A CN201310349521A CN103427795B CN 103427795 B CN103427795 B CN 103427795B CN 201310349521 A CN201310349521 A CN 201310349521A CN 103427795 B CN103427795 B CN 103427795B
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Abstract
A kind of rectangular pulse signal generating circuit of the present invention, comprises frequency-adjustable ring oscillator and pulse-generating circuit; The input of frequency-adjustable ring oscillator is connected with enable signal, and is connected with frequency adjusted signal c1 ~ cj respectively; Output exports periodic output frequency signal, and is connected with the input of pulse-generating circuit; The input of pulse-generating circuit is also connected with pulses generation control signal, and output exports rectangular pulse signal; A kind of rectangular pulse signal generating method, comprises the steps: that A. setpoint frequency adjusts signal c1 ~ cj and outputs to the input of frequency-adjustable ring oscillator; B. given pulses generation control signal paired pulses generation circuit carries out set and reset operation, after completing, pulses generation control signal is set to high level; C. to the given enable signal allowed of frequency-adjustable ring oscillator, starting of oscillation produces output frequency signal, and produces rectangular pulse signal after outputting to pulse-generating circuit.
Description
Technical field
The present invention relates to semiconductor integrated circuit field, be specifically related to a kind of rectangular pulse signal generating circuit and production method.
Background technology
Pulse signal refers to that duration shorter, width and amplitude have voltage or the current signal of specific change rule, and common pulse signal has rectangle, zigzag, bell and digital coding sequence etc.Pulse signal generating circuit is widely used in the field such as switch control rule, digital circuit dynamic characteristic test.
Pulse signal generator of a great variety, different properties, but most of pulse signal generator is all adopt Analog Circuit Design or adopt existing circuit components to build, this pulse signal generating circuit structure cannot be mutually compatible with the digital CMOS integrated circuit fabrication process of current main flow, namely can not be integrated in the middle of Design of Digital Integrated Circuit.Certainly, can pulse-generating circuit be realized by High Frequency Digital PLL circuit, but this mode is not only complicated, and cost is higher, needs accurate low frequency input clock; Meanwhile, to realize nanosecond pulse width signal also more difficult for the method.Some pulse-generating circuits are also had to be utilize input signal and the signal after postponing thereof to do a logical operation to produce, but it does not consider the detection how realizing pulse-width, especially when pulse duration needs pulse-width to monitor in real time with when technique, voltage, variations in temperature.
Summary of the invention
The object of the present invention is to provide a kind of rectangular pulse signal generating circuit and production method, solving existing generation circuit cannot be mutually compatible with digital CMOS process, and pulse-width regulated scope is little, realizes nanosecond pulsewidth difficulty, needs the problem that external frequency inputs.
The present invention is achieved through the following technical solutions:
A kind of rectangular pulse signal generating circuit, is characterized in that, comprise frequency-adjustable ring oscillator and pulse-generating circuit; The input of frequency-adjustable ring oscillator is connected with enable signal, and is connected with frequency adjusted signal c1 ~ cj respectively; Frequency-adjustable ring oscillator output exports periodic output frequency signal, and is connected with the input of pulse-generating circuit; The input of pulse-generating circuit is also connected with pulses generation control signal, and the output of pulse-generating circuit exports rectangular pulse signal;
Described frequency-adjustable ring oscillator comprises k inverter, two input nand gates and j alternative circuit, and wherein, k is even number; The output of the first inverter connects the selecting side s corresponding rate of connections adjustment signal c1 ~ cj of the input of the second inverter and the input a of alternative circuit M1 ~ Mj, alternative circuit M1 ~ Mj respectively; The output of the second inverter connects the input of the 3rd inverter, the output of the 3rd inverter connects the input b of alternative circuit M1, the output y of alternative circuit M1 ~ Mj-1 is connected with the input b of the alternative circuit M2 ~ Mj of next stage by the inverter of two cascades successively, the output y of alternative circuit Mj connects the input of q inverter, the output cascade k-q level inverter of q inverter; The output of kth inverter is connected with the first input end of two input nand gates, second input of two input nand gates is connected with enable signal, the output of two input nand gates is connected with the input of the first inverter, simultaneously as the output of frequency-adjustable ring oscillator, and export periodic output frequency signal.
Preferably, described pulse-generating circuit comprises the trigger of a band set end and the trigger of m-1 band reset terminal; Pulses generation control signal respectively with the set end of trigger DFF1 in pulse-generating circuit, and in pulse-generating circuit, the reset terminal of trigger DFF2 ~ DFFm is connected; The output frequency signal of frequency-adjustable ring oscillator is connected with the input end of clock of trigger DFF1 ~ DFFm in pulse-generating circuit respectively;
The data output end of trigger DFF1 ~ DFFm-1 is connected with the data input pin of the trigger DFF2 ~ DFFm of next stage successively; The data output end of trigger DFFm is connected with the data input pin of DFF1, simultaneously as the output of pulse-generating circuit, and exports rectangular pulse signal.
Preferably, also comprise for original frequency is adjusted signal a
1~ a
nchange and export the frequency regulating circuit into frequency adjusted signal c1 ~ cj.
Further, described frequency regulating circuit adopts the n-2 of standard
ndecoding circuit; The input of frequency regulating circuit and original frequency adjust signal a
1~ a
nbe connected, output output frequency adjustment signal c1 ~ cj, wherein, j=2
n.
Preferably, the output of described frequency-adjustable ring oscillator is also connected with the rate-adaptive pacemaker supervisory circuit for monitoring output frequency signal.
Further, described rate-adaptive pacemaker supervisory circuit adopts X frequency dividing circuit, and its input is connected with enable signal with the output frequency signal of frequency-adjustable ring oscillator respectively, output output frequency pilot signal.
A kind of rectangular pulse signal generating method, is characterized in that, comprise the steps:
A. setpoint frequency adjusts signal c1 ~ cj and outputs to the input of frequency-adjustable ring oscillator;
B. given pulses generation control signal paired pulses generation circuit carries out set and reset operation, after completing, pulses generation control signal is set to high level;
C. to the given enable signal allowed of frequency-adjustable ring oscillator, the starting of oscillation of frequency-adjustable ring oscillator produces the periodic output frequency signal of frequency of oscillation, and outputs to pulse-generating circuit from output; By the frequency adjusted signal c1 ~ cj set in step A, control the frequency of output frequency signal; Rectangular pulse signal is produced after pulse-generating circuit being run by the pulses generation control signal in step B.
Preferably, by the number with reset terminal trigger in adjustment pulse-generating circuit, the duty ratio of rectangular pulse signal can be adjusted.
Preferably, described frequency adjusted signal c1 ~ cj adjusts signal a by original frequency
1~ a
nexport after frequency regulating circuit conversion.
Preferably, described enable signal and output frequency signal frequency division are connected to the input of rate-adaptive pacemaker supervisory circuit, and the pilot signal exported by the frequency reducing of rate-adaptive pacemaker supervisory circuit realizes the monitoring to output frequency signal.
Compared with prior art, the present invention has following useful technique effect:
A kind of rectangular pulse signal generating circuit of the present invention, utilization comprises k inverter, the frequency-adjustable ring oscillator of two input nand gates and j alternative circuit produces periodic oscillation frequency signal as output frequency signal by the vibration of self, without the need to external incoming frequency source, circuit structure is simple, and together form pure digi-tal with pulse-generating circuit, can be completely compatible with digital CMOS process.
Further, the shift register chain structure in pulse-generating circuit is utilized to produce rectangular pulse, and the rectangular pulse signal of different duty can be obtained by the number arranging trigger in shift register chain structure, add the adaptability of the rectangular pulse signal of output.
Further, frequency regulating circuit is utilized n the original frequency as initial control signal can be adjusted signal a
1~ a
ndecoding converts j frequency adjusted signal c1 ~ cj to as direct control signal, wherein n < j, because this reducing the extraction number of initial control signal, realize obtaining more pulse duration state by the least possible control signal, and then can by the original frequency adjustment signal a less to number
1~ a
nadjustment realize most narrow pulse width precision and reach nanosecond; When frequency regulating circuit adopts the n-2 of standard
nduring decoding circuit, j=2
n.
Further, utilize rate-adaptive pacemaker supervisory circuit can carry out frequency division to the output frequency signal of frequency-adjustable ring oscillator, indirectly output frequency signal is exported by the mode of frequency reducing, the monitoring to output frequency signal is realized with the frequency monitoring signal exported, thus the concrete width of pulsewidth can be obtained, realize feedback or subsequent operation.
A kind of rectangular pulse signal generating method of the present invention, by realizing the FREQUENCY CONTROL to the output frequency signal of frequency-adjustable ring oscillator to the change of frequency adjusted signal, thus realizes the adjustment to rectangular pulse width, simple to operate.
Further, by changing the number of the band reset terminal trigger in adjustment pulse-generating circuit, the duty ratio of rectangular pulse signal is changed; By adjusting signal a to original frequency
1~ a
ndecoding conversion, add direct control signal number, the extraction number of control signal can be reduced, also achieve the control of nanosecond width simultaneously; By the frequency division to output frequency signal, the mode of frequency reducing is utilized indirectly to realize exporting to output frequency signal, the monitoring to output frequency signal is realized with the pilot signal exported, can be real-time monitor the change that pulsewidth produces with factors such as technique, temperature, voltages, thus can adjust in time and change, applying flexible is convenient, applied widely.
Accompanying drawing explanation
The waveform schematic diagram of various signals of Fig. 1 for producing under condition described in example of the present invention.
Fig. 2 is for producing the structural principle block diagram of circuit described in example of the present invention.
Fig. 3 is for producing the structure chart of circuit described in example of the present invention.
In figure: 811 is frequency regulating circuit; 812 is rate-adaptive pacemaker supervisory circuit; 813 is frequency-adjustable ring oscillator; 814 is pulse-generating circuit; En is enable signal; b
1for pulses generation control signal; f
outfor output frequency signal; P
outfor rectangular pulse signal; f
monfor frequency monitoring signal; Inv1, inv2 ..., invq ... invk is the first inverter, the second inverter ..., q inverter ..., kth inverter; S is set end; R is reset terminal; CK is input end of clock; Q is data output end; D is data input pin.
Embodiment
Below in conjunction with specific embodiment, the present invention is described in further detail, and the explanation of the invention is not limited.
See Fig. 2, a kind of rectangular pulse signal generating circuit of the present invention, it comprises frequency-adjustable ring oscillator 813 and pulse-generating circuit 814; The input of frequency-adjustable ring oscillator 813 is connected with enable signal en, and is connected with frequency adjusted signal c1 ~ cj respectively; Frequency-adjustable ring oscillator 813 output exports periodic output frequency signal f
out, and be connected with the input of pulse-generating circuit 814; The input of pulse-generating circuit 814 also with pulses generation control signal b
1be connected, the output of pulse-generating circuit 814 exports rectangular pulse signal P
out; Wherein, in this preferred embodiment, as shown in Figure 2, also comprise for original frequency is adjusted signal a
1~ a
nchange and export the frequency regulating circuit 811 into frequency adjusted signal c1 ~ cj.Frequency regulating circuit 811 adopts the n-2 of standard as shown in Figure 3
ndecoding circuit, realizes original frequency adjustment signal a
1~ a
ndecoding; The input of frequency regulating circuit 811 and original frequency adjust signal a
1~ a
nbe connected, output output frequency adjustment signal c1 ~ cj, wherein, j=2
n.The effect of frequency regulating circuit 811 is by n the adjustment of the original frequency as control signal signal a
1~ a
nconvert 2 to
nindividual frequency adjusted signal c1 ~ cj, as control signal, reduces control signal and draws number, realize obtaining more pulse duration state by the least possible control signal.
Enable signal en is used for control frequency tunable ring oscillator 813 whether starting of oscillation; Frequency adjusted signal c1 ~ cj, for changing the output frequency of frequency-adjustable ring oscillator 813, realizes the width of regulating impulse signal; Original frequency adjustment signal a
1~ a
nfor providing initial control signal, the order of magnitude of control frequency adjustment signal c1 ~ cj; Pulses generation control signal b
1realize the reset function that paired pulses produces circuit 814; The output signal P of pulse-generating circuit 814
outfor the pulse output signals of nanosecond rectangular pulse width-adjustable signal generating circuit.
As shown in Figure 3, frequency-adjustable ring oscillator 813 comprises k inverter, two input nand gates and j alternative circuit, and wherein, k is even number; Correspondence preferred embodiment, wherein, j=2
n; The output of the first inverter inv1 connects the selecting side s corresponding rate of connections adjustment signal c1 ~ cj of the input of the second inverter inv2 and the input a of alternative circuit M1 ~ Mj, alternative circuit M1 ~ Mj respectively; The output of the second inverter inv2 connects the input of the 3rd inverter inv3, the output of the 3rd inverter inv3 connects the input b of alternative circuit M1, the output y of alternative circuit M1 ~ Mj-1 is connected with the input b of the alternative circuit M2 ~ Mj of next stage by the inverter of two cascades successively, wherein, the inverter of two cascades can slow down hunting speed while not changing sense, improves the controllability of circuit; The output y of alternative circuit Mj connects the input of q inverter invq, the output cascade k-q level inverter of q inverter invq; The output of kth inverter invk is connected with the first input end of two input nand gates, second input of two input nand gates is connected with enable signal en, the output of two input nand gates is connected with the input of the first inverter inv1, simultaneously as the output of frequency-adjustable ring oscillator 813, and export periodic output frequency signal f
out.
Preferably, as shown in Figure 3, pulse-generating circuit 814 comprises the trigger of a band set end S and the trigger of m-1 band reset terminal R; Pulses generation control signal b
1respectively with the set end S of trigger DFF1 in pulse-generating circuit 814, and in pulse-generating circuit 814, the reset terminal R of trigger DFF2 ~ DFFm is connected; The output frequency signal f of frequency-adjustable ring oscillator 813
outbe connected with the input end of clock CK of trigger DFF1 ~ DFFm in pulse-generating circuit 814 respectively; The data output end Q of trigger DFF1 ~ DFFm-1 is connected with the data input pin D of the trigger DFF2 ~ DFFm of next stage successively; The data input pin D of data output end Q and the DFF1 of trigger DFFm is connected, and simultaneously as the output of pulse-generating circuit 814, and exports rectangular pulse signal P
out.
Preferably, the output of frequency-adjustable ring oscillator 813 is also connected with for output frequency signal f
outcarry out the rate-adaptive pacemaker supervisory circuit 812 monitored.Rate-adaptive pacemaker supervisory circuit 812 adopts X frequency dividing circuit, realizes frequency-adjustable ring oscillator 813 output frequency signal f
outfrequency reducing; Its input respectively with the output frequency signal f of frequency-adjustable ring oscillator 813
outbe connected with enable signal en, output output frequency pilot signal f
mon.Enable signal en is also for level during control frequency output monitoring circuit 812 non operating state; Frequency monitoring signal f
monthe width be connected with pulse-generating circuit 814 for monitoring pulse signal.
A kind of rectangular pulse signal generating method of the present invention, comprises the steps:
A. setpoint frequency adjusts signal c1 ~ cj and outputs to the input of frequency-adjustable ring oscillator 813;
B. given pulses generation control signal b
1paired pulses produces circuit 814 and carries out set and reset operation, by pulses generation control signal b after completing
1be set to high level;
C. to the given enable signal en allowed of frequency-adjustable ring oscillator 813, frequency-adjustable ring oscillator 813 starting of oscillation produces the periodic output frequency signal f of frequency of oscillation
out, and output to pulse-generating circuit 814 from output; By the frequency adjusted signal c1 ~ cj set in step A, control output frequency signal f
outfrequency; By the pulses generation control signal b in step B
1pulse-generating circuit 814 is made to run rear generation rectangular pulse signal P
out.
Wherein, by the number with reset terminal trigger in adjustment pulse-generating circuit 814, rectangular pulse signal P can be adjusted
outduty ratio.Frequency adjusted signal c1 ~ cj adjusts signal a by original frequency
1~ a
nexport after frequency regulating circuit 811 is changed.Enable signal en and output frequency signal f
outfrequency division is connected to the input of rate-adaptive pacemaker supervisory circuit 812, the pilot signal f exported by rate-adaptive pacemaker supervisory circuit 812 frequency reducing
monrealize output frequency signal f
outmonitoring.
Below in conjunction with as shown in Figure 1, Figure 2 with the structure of the preferred embodiment described in Fig. 3, the present invention is further done and explains and illustrate, when carrying out circuit structure and selecting, according to rectangular pulse P
outwidth demand, determine the progression of alternative circuit, then determine the quantity of frequency adjusted signal c1 ~ cj, finally determine original frequency adjustment signal a
1~ a
nnumber and the type of frequency regulating circuit 812, when carrying out rectangular pulse and producing, carry out original frequency adjustment signal a by demand
1~ a
ninput, in this preferred embodiment, wherein select j=2
n, therefore convenient in order to describe, and corresponding with accompanying drawing, directly use 2
nj is replaced to carry out describing.
Original frequency adjustment signal a
1~ a
nbe connected with frequency regulating circuit 811, enable signal en is connected with rate-adaptive pacemaker supervisory circuit 812, frequency-adjustable ring oscillator 813 respectively; 2 of frequency regulating circuit 811 output
nindividual frequency adjusted signal c1 ~ cj is connected with the input of frequency-adjustable ring oscillator 813; Pulses generation control signal b
1be connected with the input of pulse-generating circuit 814; The output of frequency-adjustable ring oscillator 813 is connected with the input of rate-adaptive pacemaker supervisory circuit 812 with pulse-generating circuit 814 respectively; Rate-adaptive pacemaker supervisory circuit 812 output frequency pilot signal f
mon, pulse-generating circuit 814 rectangular pulse signal P
out;
Frequency regulating circuit 811 adopts the n-2 of a standard
ndecoding circuit, the input of frequency regulating circuit 811 and original frequency adjust signal a
1~ a
nbe connected, the output end signal of frequency regulating circuit 811 is c1 ~ c2
n, output signal c1 ~ c2
nbe connected with the input of frequency-adjustable ring oscillator 814.The effect of frequency regulating circuit 811 converts n control signal to 2
nindividual control signal, reduces control signal and draws number, realize obtaining more pulse duration state by the least possible control signal.
Rate-adaptive pacemaker supervisory circuit 812 adopts an X frequency dividing circuit, the input of rate-adaptive pacemaker supervisory circuit 812 respectively with the output frequency signal f of frequency-adjustable ring oscillator 813
outbe connected with enable signal en, rate-adaptive pacemaker supervisory circuit 812 output rate of connections pilot signal f
mon.The effect of rate-adaptive pacemaker supervisory circuit 812 is the output frequency signal f to frequency-adjustable ring oscillator 813
outcarry out frequency division, by the mode of frequency reducing indirectly to output frequency signal f
outrealize exporting, with frequency monitoring signal f
monrealize output frequency signal f
outmonitoring.
Frequency-adjustable ring oscillator 813 comprises k inverter, two input nand gates, 2
nindividual transmission gate, wherein, k is even number, the input of frequency-adjustable ring oscillator 813 respectively with the output frequency adjusted signal c1 ~ c2 of frequency regulating circuit 811
nbe connected with enable signal en, the output frequency signal f of frequency-adjustable ring oscillator 813
outbe connected with the input of rate-adaptive pacemaker supervisory circuit 812 with the input of pulse-generating circuit 814 respectively, output frequency signal f in frequency-adjustable ring oscillator 813
outconnect the input of the first inverter inv1, the output of the first inverter inv1 connects input and the alternative circuit M1 ~ M2 of the second inverter inv2 respectively
ninput a, the output of the second inverter inv2 connects the input of the 3rd inverter inv3, the output of the 3rd inverter inv3 connects the input b of alternative circuit M1, the selecting side s rate of connections adjustment signal c1 of alternative circuit M1, the output y of alternative circuit M1 connects the input of the 4th inverter inv4, the output of the 4th inverter inv4 connects the input of the 5th inverter 5, the output of the 5th inverter inv5 connects the input b of alternative circuit M2, the selecting side s rate of connections adjustment signal c2 of alternative circuit M2, the output y of alternative circuit M2 connects the input of hex inverter inv6, by that analogy, the output of q-3 inverter invq-3 connects alternative circuit M2
nthe input b of-1, alternative circuit M2
nthe selecting side s rate of connections adjustment signal c2 of-1
n-1, alternative circuit M2
nthe output y of-1 connects the input of q-2 inverter invq-2, and the output of q-2 inverter invq-2 connects the input of q-1 inverter invq-1, and the output of q-1 inverter invq-1 connects alternative circuit M2
ninput b, alternative circuit M2
nselecting side s rate of connections adjustment signal c2
n, alternative circuit M2
noutput y connect the input of q inverter invq, again through several grades of inverter cascades, the output of kth-1 inverter invk-1 connects the input of kth inverter invk, the output of kth inverter invk connects the first input end of two input nand gates, and the second input of two input nand gates is connected with X frequency dividing circuit input a with enable signal en respectively, the output signal of two input nand gates, namely output frequency signal f
outbe connected with the input b of X frequency dividing circuit with the input of the first inverter inv1 respectively.Frequency-adjustable ring oscillator 813 is cores of whole nanosecond rectangular pulse width-adjustable signal generating circuit, and its function produces periodic output frequency signal f
out, and realized frequency f by the progression changing ring oscillator alternative circuit
outadjustment, and then realize rectangular pulse P
outthe adjustment of width.
The pulse raw circuit 814 produced as required comprises the trigger of a band set end and the trigger of m-1 band reset terminal; Pulses generation control signal b
1hold with the set end S of trigger DFF1 in pulse-generating circuit 814, and in pulse-generating circuit 814, the reset terminal R end of trigger DFF2 ~ DFFm is connected; The output frequency signal f of frequency-adjustable ring oscillator 813
outbe connected with the input end of clock CK of trigger DFF1 ~ DFFm in pulse-generating circuit 814; The data output end Q of data input pin D and the DFFm of trigger DFF1 is connected, the data input pin D of data output end Q and the DFF2 of DFF1 is connected, the data input pin D of data output end Q and the DFF3 of DFF2 is connected, by that analogy, the data input pin D of data output end Q and the DFFm of DFFm-1 is connected, and the data input pin D of data output end Q and the DFF1 of DFFm is connected, simultaneously as the output rectangular pulse signal P of pulse-generating circuit
out.The function of pulse-generating circuit 814 utilizes shift register chain structure to produce a pulse signal, simultaneously, by arranging band set end trigger and the number being with reset terminal trigger, the duty ratio of pulse signal can be adjusted, to obtain suitable pulse signal, add the adaptability of rectangular pulse signal.Whole circuit is totally digital circuit, completely compatible with digital CMOS process, and pulse duration is adjustable, can monitor, and circuit structure is simple, applying flexible is convenient, suitable application area is extensive.
When this pulse duration adjustable signal produces circuit working, first setpoint frequency adjustment signal a
1~ a
nvalue, obtain suitable oscillator frequency and output frequency signal f
out; Then pulses generation control signal b is utilized
1paired pulses produces the trigger DFF1 ~ DFFm of circuit 814 and carries out set, reset operation, completes signal b after set, reset operation
1be set to high level; Finally, enable signal en is effective, and frequency-adjustable ring oscillator 813 starts starting of oscillation and produces rectangular pulse signal P by pulse-generating circuit 814
out, simultaneously by frequency monitoring signal f
monthe frequency of oscillation of monitoring frequency-adjustable ring oscillator 813, namely frequency output signal f
out.When four frequency divisions selected by X frequency dividing circuit, when the progression m of trigger selects 6 grades, the enable signal en produced, pulses generation control signal b
1, and output signal work wave schematic diagram as shown in Figure 1.
Above content is in conjunction with concrete preferred implementation further description made for the present invention; can not assert that the specific embodiment of the present invention is only limitted to this; for the technical staff of digital integrated circuit nanosecond pulse signal generating circuit belonging to the present invention; under the prerequisite not departing from thinking of the present invention; some pulse signal generating circuits can also be designed, all should be considered as belonging to the scope of patent protection that claims that the present invention submits to are determined.
Claims (10)
1. a rectangular pulse signal generating circuit, is characterized in that, comprises frequency-adjustable ring oscillator (813) and pulse-generating circuit (814); The input of frequency-adjustable ring oscillator (813) is connected with enable signal (en), and is connected with frequency adjusted signal c1 ~ cj respectively, wherein, and j=2
n, n represents the number of original frequency adjustment signal; Frequency-adjustable ring oscillator (813) output exports periodic output frequency signal (f
out), and be connected with the input of pulse-generating circuit (814); The input of pulse-generating circuit (814) also with pulses generation control signal (b
1) be connected, the output of pulse-generating circuit (814) exports rectangular pulse signal (P
out);
Described frequency-adjustable ring oscillator (813) comprises k inverter, two input nand gates and j alternative circuit, and wherein, k is even number, j=2
n, n represents the number of original frequency adjustment signal; The output of the first inverter (inv1) connects the selecting side s corresponding rate of connections adjustment signal c1 ~ cj of the input of the second inverter (inv2) and the input a of alternative circuit M1 ~ Mj, alternative circuit M1 ~ Mj respectively; The output of the second inverter (inv2) connects the input of the 3rd inverter (inv3), the output of the 3rd inverter (inv3) connects the input b of alternative circuit M1, the output y of alternative circuit M1 ~ Mj-1 is connected with the input b of the alternative circuit M2 ~ Mj of next stage by the inverter of two cascades successively, the output y of alternative circuit Mj connects the input of q inverter (invq), the output cascade k-q level inverter of q inverter (invq); The output of kth inverter (invk) is connected with the first input end of two input nand gates, second input of two input nand gates is connected with enable signal (en), the output of two input nand gates is connected with the input of the first inverter (inv1), simultaneously as the output of frequency-adjustable ring oscillator (813), and export periodic output frequency signal (f
out).
2. a kind of rectangular pulse signal generating circuit according to claim 1, it is characterized in that, described pulse-generating circuit (814) comprises the trigger of band set end (S) and the trigger of m-1 band reset terminal (R), wherein, m be greater than 1 random natural number; Pulses generation control signal (b
1) respectively with the set end (S) of trigger DFF1 in pulse-generating circuit (814), and in pulse-generating circuit (814), the reset terminal (R) of trigger DFF2 ~ DFFm is connected; Output frequency signal (the f of frequency-adjustable ring oscillator (813)
out) be connected with the input end of clock (CK) of trigger DFF1 ~ DFFm in pulse-generating circuit (814) respectively;
The data output end (Q) of trigger DFF1 ~ DFFm-1 is connected with the data input pin (D) of the trigger DFF2 ~ DFFm of next stage successively; The data output end (Q) of trigger DFFm is connected with the data input pin (D) of DFF1, simultaneously as the output of pulse-generating circuit (814), and exports rectangular pulse signal (P
out).
3. a kind of rectangular pulse signal generating circuit according to claim 1 and 2, is characterized in that, also comprises for original frequency is adjusted signal a
1~ a
nchange and export the frequency regulating circuit (811) into frequency adjusted signal c1 ~ cj, wherein, j=2
n, n represents the number of original frequency adjustment signal.
4. a kind of rectangular pulse signal generating circuit according to claim 3, is characterized in that, described frequency regulating circuit (811) adopts the n-2 of standard
ndecoding circuit; Input and the original frequency of frequency regulating circuit (811) adjust signal a
1~ a
nbe connected, output output frequency adjustment signal c1 ~ cj, wherein, j=2
n, n represents the number of original frequency adjustment signal.
5. a kind of rectangular pulse signal generating circuit according to claim 1 and 2, is characterized in that, the output of described frequency-adjustable ring oscillator (813) is also connected with for output frequency signal (f
out) carry out the rate-adaptive pacemaker supervisory circuit (812) monitored.
6. a kind of rectangular pulse signal generating circuit according to claim 5, it is characterized in that, described rate-adaptive pacemaker supervisory circuit (812) adopts X frequency dividing circuit, its input respectively with the output frequency signal (f of frequency-adjustable ring oscillator (813)
out) be connected with enable signal (en), output output frequency pilot signal (f
mon).
7. a rectangular pulse signal generating method, is characterized in that, it based on the rectangular pulse signal generating circuit in claim 1-6 described in any one, and comprises the steps:
A. setpoint frequency adjusts signal c1 ~ cj and outputs to the input of frequency-adjustable ring oscillator (813), wherein, and j=2
n, n represents the number of original frequency adjustment signal;
B. given pulses generation control signal (b
1) paired pulses produce circuit (814) carry out set and reset operation, by pulses generation control signal (b after completing
1) be set to high level;
C. to the given enable signal (en) allowed of frequency-adjustable ring oscillator (813), frequency-adjustable ring oscillator (813) starting of oscillation produces the periodic output frequency signal (f of frequency of oscillation
out), and output to pulse-generating circuit (814) from output; By the frequency adjusted signal c1 ~ cj set in step A, control output frequency signal (f
out) frequency; By the pulses generation control signal (b in step B
1) make pulse-generating circuit (814) run after produce rectangular pulse signal (P
out).
8. a kind of rectangular pulse signal generating method according to claim 7, is characterized in that, by the number of band reset terminal trigger in adjustment pulse-generating circuit (814), can adjust rectangular pulse signal (P
out) duty ratio.
9. a kind of rectangular pulse signal generating method according to claim 7, is characterized in that, described frequency adjusted signal c1 ~ cj adjusts signal a by original frequency
1~ a
nexport after frequency regulating circuit (811) conversion, wherein, j=2
n, n represents the number of original frequency adjustment signal.
10. a kind of rectangular pulse signal generating method according to claim 7, is characterized in that, described enable signal (en) and output frequency signal (f
out) frequency division is connected to the input of rate-adaptive pacemaker supervisory circuit (812), the pilot signal (f exported by rate-adaptive pacemaker supervisory circuit (812) frequency reducing
mon) realize output frequency signal (f
out) monitoring.
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|---|---|---|---|
| CN201310349521.3A CN103427795B (en) | 2013-08-12 | 2013-08-12 | A kind of rectangular pulse signal generating circuit and production method |
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| CN201310349521.3A CN103427795B (en) | 2013-08-12 | 2013-08-12 | A kind of rectangular pulse signal generating circuit and production method |
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| CN103427795B true CN103427795B (en) | 2016-01-20 |
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| CN103902930B (en) * | 2014-03-10 | 2016-09-07 | 杭州晟元数据安全技术股份有限公司 | The unclonable functional circuit structure of physics based on ring oscillator |
| KR102021516B1 (en) * | 2015-05-20 | 2019-09-16 | 시러스 로직 인터내셔널 세미컨덕터 리미티드 | Ring frequency divider |
| CN104901655A (en) * | 2015-06-16 | 2015-09-09 | 成都宜川电子科技有限公司 | Signal generator |
| CN109167571A (en) * | 2018-08-13 | 2019-01-08 | 中科芯集成电路股份有限公司 | A kind of low-power consumption ring oscillator and its implementation |
| CN110851331B (en) * | 2019-11-13 | 2021-11-16 | 中国电子科技集团公司第五十八研究所 | On-chip monitoring circuit of antifuse Field Programmable Gate Array (FPGA) |
| CN114679158B (en) * | 2022-05-30 | 2022-08-05 | 石家庄市鹿泉区精诚通信科技有限公司 | Periodic signal generating device, signal processing system and periodic signal generating method thereof |
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