CN103403986B - 具有增加的效率的vcsel阵列 - Google Patents
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Abstract
本发明涉及一种VCSEL阵列,其包括在公共衬底(1)上并排布置的若干VCSEL。每个VCSEL至少由顶部镜(5,14)、有源区(4)、电流注入层(3)和未掺杂的底部半导体镜(2)形成。所述电流注入层(3)设置在所述有源区(4)与所述底部半导体镜(2)之间。所述衬底(1)的至少上层是导电的。沟槽(8)和/或孔在所述VCSEL的所述底部半导体镜(2)之间形成到所述衬底(1)的所述上层。金属化部(9)通过所述沟槽(8)和/或孔将所述衬底(1)的所述上层与所述电流注入层(3)电连接。所提出的VCSEL阵列允许均匀的电流注入并且具有高的效率和功率密度。
Description
技术领域
本发明涉及一种包括在公共衬底上并排布置的若干垂直腔表面发射激光器(VCSEL)的阵列,每个VCSEL至少由顶部镜、有源区、电流注入层和未掺杂的底部半导体镜形成,所述电流注入层设置在所述有源区和所述底部半导体镜之间。这种VCSEL阵列可以在需要具有大功率密度的半导体光源的应用中使用,例如在照明应用中使用。
背景技术
高效率VCSEL需要典型地实现为分布式布拉格反射器(DBR)的高反射的半导体镜。与未掺杂的DBR相比,掺杂的DBR显示出对所产生的激光的更高的吸收。因此,对于高效率VCSEL设计,未掺杂的DBR的使用是优选的。
R.C.Strijbos等人的“Currentcrowdinginoxide-confinedintracavity-contactedVCSELs”,ProceedingsSymposiumIEEE/LEOSBeneluxChapter,2000,Delft,TheNetherlands,第223-226页公开了这种具有未掺杂的DBR的顶部发射VCSEL。在有源区的两侧上形成接触层,金属化部应用到所述接触层以便从顶侧电接触接触层。
由多个单VCSEL光源构成的大功率VCSEL阵列设计需要注意均匀的载流子注入。这意味着VCSEL阵列中的所有单VCSEL典型地得到相同的工作电流并且阵列的电线上的电压降必须被避免。在现有技术水平的顶部发射VCSEL阵列的情况下,高传导性衬底被用于均匀的n电流注入,并且厚的通常被镀覆的金层被用于均匀的p载流子注入。这需要导电的(掺杂的)底部DBR,这种DBR于是在另一方面对于激光具有增加的吸收并且因此降低VCSEL的效率。
发明内容
本发明的一个目的是提供顶部发射VCSEL阵列,该阵列包括具有在有源区和衬底之间的未掺杂的半导体镜的VCSEL,并且然而该阵列允许均匀的载流子注入。
使用根据权利要求1的VCSEL阵列实现该目的。该VCSEL阵列的有利实施例是从属权利要求的主题或者在说明书的后续部分和各实施例中描述。
所提出的VCSEL阵列包括在公共衬底上并排布置的若干VCSEL。每个VCSEL至少由顶部镜、有源区、电流注入层和尤其是DBR的未掺杂的底部半导体镜形成,所述电流注入层设置在有源区与底部半导体镜之间。所述顶部镜例如可以是尤其为DBR的半导体镜或者是电介质镜。术语顶部和底部以常规方式用于显示对应层或镜相对于衬底的位置。因此底部镜设置成比顶部镜更靠近衬底。顶部发射VCSEL意思是所产生的激光辐射穿过顶部镜发射而不穿过底部镜和衬底发射。因此术语顶部和底部并不指VCSEL阵列的空间取向。
在所提出的VCSEL阵列中,至少衬底的上层是导电的。沟槽和/或孔在VCSEL的底部半导体镜之间形成到衬底的上层。金属化部(即,金属接触或金属层)通过所述沟槽和/或孔将衬底的上层与电流注入层电连接。
使用该手段,尽管未掺杂的半导体镜设置在衬底和有源区之间,该衬底仍可以用于向有源区中注入载流子。所提出的VCSEL阵列因而允许均匀的电流注入并且同时具有高效率和高功率密度。
用于衬底的上层与(设置在下半导体镜与有源区之间的)电流注入层之间的连接的金属化部优选由诸如金的高度导电材料形成。这同样适用于在有源区的顶侧的金属化部。本发明使用单VCSEL之间的剩余衬底区域或芯片区域将衬底的上传导层与底部电流注入层连接。在制造单VCSEL之后或者至少在衬底上制造这些VCSEL的底层之后,可以通过适当的蚀刻工艺产生单VCSEL之间的所需的孔或沟槽。
所述衬底优选是半导体衬底,其上层被掺杂以实现期望的电导率,例如以2.5*1018cm-3的掺杂浓度被n掺杂。衬底的上层的掺杂优选在VCSEL布置在其上的整个区域上连续延伸。也可以对整个衬底而不是衬底的上层进行适当(见上文)掺杂以便实现所期望的电导率。
在本发明的优选实施例中,单VCSEL设有在底部半导体镜与有源区之间的n掺杂的载流子注入层以及衬底的n掺杂上层。于是顶部镜可以是例如通过p接触被接触的p掺杂的DBR或电介质镜。
附图说明
参考在下文中描述的实施例,本发明的这些及其它方面将显而易见并且得到阐明。在附图中:
图1示意性示出了根据本发明的VCSEL阵列的制造的第一阶段;
图2示意性示出了根据本发明的VCSEL阵列的制造的第二阶段;
图3示意性示出了根据本发明的VCSEL阵列的制造的第三阶段;
图4示意性示出了根据本发明的VCSEL阵列的制造的第四阶段;
图5示意性示出了根据本发明的VCSEL阵列的一部分的最终配置;
图6示意性示出了根据具有电介质顶部镜的另一实施例的VCSEL阵列的制造的第五阶段;以及
图7示意性示出了具有电介质顶部镜的VCSEL阵列的一部分的最终配置。
具体实施方式
各图示出了制造根据本发明的VCSEL阵列的例子。在所述图中,仅示出了具有两个单VCSEL的阵列的一部分。显然,完整的阵列具有更多数量的VCSEL,这些VCSEL使用相同的工艺步骤同时制造。
可以通过在载体衬底或晶片上外延生长层堆叠以已知方式制造所提出的阵列的VCSEL。图1示出了这种外延层堆叠的例子,该外延层堆叠包括未掺杂的DBR2、n掺杂的电流注入层3、有源层4和在顶侧上的p掺杂的DBR5。可以如本领域中已知的那样选择用于单个层的材料以及DBR和有源层的配置。
图1的外延层堆叠然后在后面将用作电连接的晶片区域处进行湿法化学蚀刻。在图2中指示了通过这种湿法化学蚀刻形成的沟槽6。所述沟槽可以完全包围每个VCSEL,但是这不是必须的。为了实现VCSEL的密集排列,也有可能例如以棋盘状设计排列VCSEL和沟槽,使得VCSEL占据棋盘的白色区域并且沟槽占据棋盘的黑色区域。在该蚀刻步骤之后,在p掺杂的DBR5的上表面处形成p接触环7。使用已知的光刻和沉积技术应用用于在GaAs上产生p接触的这种金属化部,该金属化部通常由高导电的材料制成,例如由Ti/Pt/Au制成。图3示出了在应用p接触环7之后的结果。
台面蚀刻(mesaetch)和湿法氧化导致图4的配置。p接触环6用作台面蚀刻的蚀刻掩模,在台面蚀刻期间,已经存在的沟槽6被进一步加深以形成到衬底1的沟槽或孔8。有源区4被氧化层9横向限制,该氧化层9通过湿法氧化工艺产生。
图5示出了由例如Ge/Au/Ni/Au金属序列形成n接触金属之后的最终配置。使用这种金属化部(n接触10),在衬底1和VCSEL的各个电流注入层3之间实现电连接。载流子从侧面注入(载流子注入11)。尽管下DBR2不导电,但是该配置中的衬底1仍可以用于n侧上的均匀载流子注入。通过除去单VCSEL之间的非传导DBR部分并且应用金属化层以连接VCSELn电极与衬底,实现了该电连接。由于衬底1用作良好电流扩展层并且未掺杂的DBR2具有低的光学损耗,具有这种配置的VCSEL阵列因此具有高效率和高功率密度。
在制造具有电介质顶部镜而不是DBR的VCSEL阵列的情况下,图1的外延层堆叠在顶侧上将包括p掺杂的半导体隔离层14而不是p掺杂DBR5。在像图2中那样的湿法化学蚀刻、像图3中那样在隔离层14上形成p接触环7、像图4中那样的台面蚀刻以及湿法氧化之后,如图6中所示沉积电介质顶部镜15。然后图7示出了在类似于图5的n接触金属形成之后的最终配置。
尽管已经在附图和前述说明书中示出和描述了本发明,但是这些图示和描述应当被认为是说明性或示例性的而非限制性的;本发明不限于所公开的实施例。根据对附图、公开内容和所附权利要求的学习,本领域技术人员在实践所要求保护的发明时可以理解和实现对所公开实施例的其它改变。特别地,所提出的阵列的VCSEL可以包括另外的层,例如,也包括位于顶部DBR与有源区之间的p掺杂的电流注入层。同样,可以以不同方式布置p接触。在权利要求中,“包括”一词不排除其它元素或步骤,并且不定冠词“一”不排除多个。在相互不同的从属权利要求中陈述特定手段的纯粹事实并不意味着不能有利地使用这些手段的组合。权利要求中的附图标记不应当理解为限制权利要求的范围。
附图标记列表
1n掺杂的衬底
2未掺杂的DBR
3n掺杂的电流注入层
4有源区/层
5p掺杂的DBR
6沟槽
7p接触环
8沟槽
9氧化层
10n接触金属化部
11载流子注入
12高光学反射
13高横向电导率
14p掺杂的半导体隔离层
15电介质顶部镜。
Claims (7)
1.一种包括在公共衬底(1)上并排布置的若干垂直腔表面发射激光器的垂直腔表面发射激光器阵列,每个垂直腔表面发射激光器至少由顶部镜(5,14)、有源区(4)、电流注入层(3)和未掺杂的底部半导体镜(2)形成,所述电流注入层(3)设置在所述有源区(4)与所述底部半导体镜(2)之间,其中
-所述衬底(1)的至少上层是导电的,
-沟槽(8)和/或孔在所述垂直腔表面发射激光器的所述底部半导体镜(2)之间形成到所述衬底(1)的所述上层,并且
-金属化部(9)通过所述沟槽(8)和/或孔将所述衬底(1)的所述上层与所述电流注入层(3)电连接。
2.根据权利要求1的垂直腔表面发射激光器阵列,
其中所述衬底(1)是掺杂的导电半导体衬底。
3.根据权利要求1的垂直腔表面发射激光器阵列,
其中所述衬底(1)是半导体衬底,所述衬底的所述上层是掺杂的。
4.根据权利要求1的垂直腔表面发射激光器阵列,
其中所述顶部镜(5,14)是掺杂的或未掺杂的分布式布拉格反射器。
5.根据权利要求1的垂直腔表面发射激光器阵列,
其中所述顶部镜(5,14)是电介质镜。
6.根据权利要求1的垂直腔表面发射激光器阵列,
其中所述底部半导体镜(2)是未掺杂的分布式布拉格反射器。
7.根据权利要求1的垂直腔表面发射激光器阵列,
其中所述顶部镜(5,14)是p掺杂的分布式布拉格反射器或电介质镜,所述衬底(1)是n掺杂的半导体衬底或具有n掺杂的上层的半导体衬底,所述电流注入层(3)是n掺杂的并且所述底部半导体镜(2)是未掺杂的分布式布拉格反射器。
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AU2016298390B2 (en) | 2015-07-30 | 2021-09-02 | Optipulse Inc. | Rigid high power and high speed lasing grid structures |
US10630053B2 (en) | 2015-07-30 | 2020-04-21 | Optipulse Inc. | High power laser grid structure |
JP7258884B2 (ja) | 2017-08-11 | 2023-04-17 | オプティパルス・インコーポレイテッド | 無線高速データ転送のためのレーザグリッド構造 |
US10374705B2 (en) | 2017-09-06 | 2019-08-06 | Optipulse Inc. | Method and apparatus for alignment of a line-of-sight communications link |
US10199794B1 (en) * | 2017-09-20 | 2019-02-05 | Lumentum Operations Llc | Electrically isolating adjacent vertical-emitting devices |
CN108233176B (zh) * | 2018-01-28 | 2020-07-28 | 海南师范大学 | 一种电注入GaN垂直腔面发射激光器结构及其制备方法 |
US11245249B2 (en) | 2018-03-01 | 2022-02-08 | Ricoh Company, Ltd. | Reflector, surface emitting laser, method for manufacturing reflector, and method for manufacturing surface emitting laser |
CN110277731B (zh) * | 2018-03-15 | 2020-09-25 | 山东大学 | 一种iii-v族硅基低折射率缝隙结构dbr激光器及集成方法 |
US11581705B2 (en) | 2019-04-08 | 2023-02-14 | Lumentum Operations Llc | Vertical-cavity surface-emitting laser with dense epi-side contacts |
WO2021220879A1 (ja) * | 2020-05-01 | 2021-11-04 | ソニーセミコンダクタソリューションズ株式会社 | 発光素子アレイ及び発光素子アレイの製造方法 |
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