CN103378072A - Semiconductor component with coreless transformer - Google Patents
Semiconductor component with coreless transformer Download PDFInfo
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- CN103378072A CN103378072A CN2013101396139A CN201310139613A CN103378072A CN 103378072 A CN103378072 A CN 103378072A CN 2013101396139 A CN2013101396139 A CN 2013101396139A CN 201310139613 A CN201310139613 A CN 201310139613A CN 103378072 A CN103378072 A CN 103378072A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 68
- 238000004804 winding Methods 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 11
- 230000005611 electricity Effects 0.000 claims description 7
- 238000005452 bending Methods 0.000 claims 2
- 239000000463 material Substances 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 238000005530 etching Methods 0.000 description 6
- 239000004020 conductor Substances 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000004411 aluminium Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000002019 doping agent Substances 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
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- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 150000003949 imides Chemical class 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/10—Inductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
- H01F27/2804—Printed windings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
- H01L23/5225—Shielding layers formed together with wiring layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
- H01F2017/0086—Printed inductances on semiconductor substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
- H01F27/2804—Printed windings
- H01F2027/2819—Planar transformers with printed windings, e.g. surrounded by two cores and to be mounted on printed circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/62—Protection against overvoltage, e.g. fuses, shunts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Integrated Circuits (AREA)
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Abstract
The invention provides a semiconductor component with a coreless transformer. A semiconductor component has integrated a coreless transformer with a first connection contact, a second connection contact, an electrically conductive spiral first coil, an electrically conductive first ring, and an electrically conductive second ring. The electrically conductive spiral first coil is electrically connected between the first connection contact and the second connection contact. The electrically conductive first ring surrounds the first coil and one or both of the first connection contact and the second connection contact. The electrically conductive second ring is arranged between the first coil and the first ring, electrically connected to the first coil, and surrounds the first coil and one or both of the first connection contact and the second connection contact.
Description
Technical field
Embodiments of the present invention relate to and have integrated semiconductor subassembly without core transformer.
Background technology
Specifically be used for different assembly or the electronic circuits of stream electricity (galvanically) decoupling zero circuit without core transformer.This without core transformer can by one chip be integrated in the semiconductor body.If in during operation the coil without core transformer is applied high pressure, so electrical breakdown may occur.The invention provides a kind of improved solution.
Summary of the invention
It has been found that, can utilize the ring of wound coil to come the peak value of the electric field that the balanced high pressure that imposes on the centreless transformer coil produces.This ring can be closed loop, or basic closed open loop.
According to an aspect of the present invention, a kind of semiconductor subassembly has integrated without core transformer, and integrated have the first connecting terminal, the second connecting terminal, conduction spiral the first coil, conduction first ring and second ring that conducts electricity without core transformer.Conduction spiral the first coil is connected electrically between the first connecting terminal and the second connecting terminal.The conduction first ring is around the first coil and the first connecting terminal and/or the second connecting terminal.
Conduction the second ring is arranged between the first coil and the first ring, is electrically connected with the first coil, and around the first coil and the first connecting terminal and/or the second connecting terminal.
For further balanced electric field, in the section plane perpendicular to the second direction of circling that encircles, the surface of the second ring can be circular.Corresponding circular arc can be located in the second anchor ring at least on that side that works in another conductive structure on the electromotive force different from the coil electromotive force.
According on the other hand, even the absolute value of the electrical potential difference between first ring and the first coil surpasses (the 1kV/20 μ m) times of the distance between first ring and the second ring, above-mentionedly also can without damage be operated without core transformer.For example, the absolute value of electrical potential difference can be at least 6kV, at least 10kV or even 20kV at least.
Description of drawings
With reference to the following drawings and description, can understand better the present invention.Assembly among the figure might not be proportional, but focuses on illustrating principle of the present invention.In addition, in the drawings, identical Reference numeral is indicated corresponding parts.In the drawings:
Fig. 1 is the perspective view without core transformer of semiconductor subassembly;
Fig. 2 is the cutaway view of the part of semiconductor subassembly among Fig. 1;
Fig. 3 is the cutaway view of a part of the semiconductor subassembly of the Fig. 1 and 2 among the section plane E1-E1 of institute's mark among Fig. 2;
Fig. 4 is the cutaway view of the part of Fig. 1,2 and 3 semiconductor subassembly among the section E2-E2 of institute's mark among Fig. 2;
Fig. 5 is the cutaway view that has without the part of the semiconductor subassembly of core transformer, the difference of this semiconductor subassembly and Fig. 1 semiconductor subassembly in Fig. 4 be first ring the surface section some be circular;
Fig. 6 is the cutaway view of a part of the semiconductor subassembly of the Fig. 5 among the section plane E4-E4 of institute's mark among Fig. 5;
Fig. 7 is the cutaway view that has without the part of the semiconductor subassembly of core transformer, wherein, single transmitter coils by the conduction first ring that has separately an opening and conduction the second ring around;
Fig. 8 is the cutaway view that has without the part of another execution mode of the semiconductor subassembly of core transformer, and wherein, the second ring is formed by the closed wire of annular;
Fig. 9 is the perspective view of the centreless transformer coil of semiconductor subassembly, and wherein, first ring is closed wall; And
Figure 10 has shown the possible curvature of the first and second rings.
Embodiment
In the following detailed description, with reference to consisting of the accompanying drawing of a part of the present invention, in these accompanying drawings, show by diagram and can wherein can realize concrete execution mode of the present invention.Thus, use such directional terminology such as " top ", " bottom ", " front ", " back side ", " front ", " back " with reference to the orientation that is described diagram.Because the assembly of execution mode can be positioned at a plurality of different orientation, thus directional terminology used only for exemplary purposes, and absolutely not to some extent restriction.It should be understood that and to use other execution modes, and under the prerequisite that does not deviate from scope of the present invention, can carry out the change of structural or logicality.Therefore, carrying out following detailed description is not to mean to some extent restriction, and scope of the present invention is stipulated by appended claims.Unless it should be understood that datedly especially in addition, otherwise the feature of various exemplary embodiment described herein can combine each other.
, show to have by one chip ground and be integrated in the interior semiconductor subassembly 1 without core transformer of semiconductor body 10 to Fig. 4 referring now to Fig. 1.For clarity, omit in the semiconductor subassembly 1 directly with without the relevant part of core transformer.Fig. 2 show with the section of the parallel expansion of vertical direction v in the cross section of a part of semiconductor subassembly 1.Fig. 3 and 4 shows respectively the section that is labeled as section plane E1-E1 and E2-E2 in Fig. 2.
Vertical direction v is vertical with bottom side 12 with the top side 11 of semiconductor body 10.In this connected, it is substantially smooth that top side 11 and bottom side 12 are considered to.Schematically illustrate the boundary line of semiconductor subassembly 1 among Fig. 2.Semiconductor body 10 in the semiconductor subassembly 1 can by semi-conducting material arbitrarily (as, silicon, germanium, carborundum, GaAs etc.) consist of, and can comprise p-type semiconductor (p-doped semiconductor) district, N-shaped semiconductor (n-doped semiconductor) district, dielectric layer (such as, silicon dioxide (silicon oxide) e layer, nitration case or imide layer) and conductive layer and the zone of being made by metal and/or polycrystalline semiconductor material.Alternatively, except without core transformer, semiconductor subassembly 1 also can comprise such as IGBT(insulated gate bipolar transistor), the MOSFET(mos field effect transistor), the J-FET(junction field effect transistor), one or arbitrarily combination in the active semi-conductor device the thyristor, diode.Alternatively or in addition, semiconductor subassembly 1 can comprise such as one in the passive devices such as resistor, capacitor, inductance or arbitrarily combination.Particularly, this device can be the controllable semiconductor device with the control electrode as grid or base stage.
As from Fig. 1 and 2 as seen, have coil 41,42,51,52,61,62 without core transformer.Coil 41 has helical annular winding 411,412 and 413.Therefore, coil 42 has helical annular winding 421,422 and 423, coil 51 has helical annular winding 511,512 and 513, coil 52 has helical annular winding 521,522 and 523, coil 61 has helical annular winding 611,612 and 613, and coil 62 has helical annular winding 621,622 and 623. Coil 41,51,61 has a common coil axes 91, and coil 42,52,62 has a common coil axes 92.Two coil axess 91 are all parallel with vertical direction v with 92.
In the coil 41,42,51,52,61,62 at least one can be directly (namely, only connect by continuous permanent conduction) or indirectly (namely, by active and/or passive component, for example, be used for driving the drive circuit of controllable semiconductor device) be electrically connected with the control electrode of controllable semiconductor device.
Usually, need at least two coils without core transformer.A coil is as transmitter work, and another coil is as receiver operation.In the execution mode of Fig. 4, two transmitter coils 41,42 and four receiver coils 51,52,61,62 are arranged at Fig. 1.Semiconductor subassembly 1 can have contact terminal 45,46,47, for example, and junction point or solder joint.Transmitter coils 41 is connected electrically between contact terminal 45 and 46, and transmitter coils 42 is connected electrically between contact terminal 45 and 47.For transmitter coils 41 and/or 42, each coil 41,42 contact terminal 45,46 and/or the conduction first ring 30 that is closed of contact terminal 45,47 around.In the present invention, first ring 30 is also referred to as " shading ring ".First ring 30 namely is set to the coil at the most close top 11 also around upper coil 41,42.
In order to realize good shield effectiveness, first ring 30 can for example be electrically connected to the electromotive force of regulation by bottom metal layers 500, for example, and ground potential (GND).Each electrical connection can realize by the one or more conductive poles 38 that extend towards metal level 500.In Fig. 1, not shown metal level 500.Replace or except one or more conductive poles 38, also can by can from the external contact of semiconductor subassembly 1 to optional junction point 36 the GND electromotive force is offered shading ring 30.Junction point 36 is connected with first ring 30 by wire 37.
As can be seen from Fig. 2, each cylinder 38 can be formed by one in the sections (segment) 381,382,383 or stacking a plurality of sections.Because single sections 381,382,383(in the vertical direction v are measured) maximum length be subjected to the restriction of employed production technology, so form the single sections 381,382 of cylinder 38, the thickness that 383 quantity specifically depends on manufacturing technology and semiconductor body 10.
When each cylinder 38 has two or more stacking sections 381, can generate semiconductor subassembly 1 by sequentially forming stacking semiconductor sublayer 101,102,103, this semiconductor sublayer comprises a sections 381 of each cylinder 38 separately.As can be seen from Fig. 2, at this Seed Layer 101,102 top, for example the mask layer 121,122 of silicon nitride (SiN) or another kind of suitable material, 123 can still remain in the assembly 1 of finishing.Below, structural mask layer 121,122,123 allows the respectively sublayer under it 101 and 102 interior etched trench.After the etching, by with as metal (such as, aluminium or copper) such electric conducting material or polycrystalline semiconductor material filling groove, generated respectively each sublayer 101,102,103 sections 381,382,383.
Because inductance coupling high, the current signal that is provided to transmitter coils 41 or 42 by each contact terminal 45,46 and 45,47 causes electric current respectively in the receiver coil 51,61 and 52,62 below each transmitter coils 41,42 stream electricity isolation.At semiconductor device 1 duration of work, receiver coil 51,52,61,62 electromotive force and the absolute value of the difference between the GND are no more than several volts or tens volts usually, and transmitter coils 41,42 electromotive force and the difference between the GND can surpass hundreds of volt, a few kilovolt or even a few ten thousand volts.Therefore, transmitter coils 41,42 electromotive force and the difference between the shading ring 30 also may surpass hundreds of volt, a few kilovolt or even several ten thousand volts.
In order further to improve the shield effectiveness of first ring 30, a plurality of optional conductive poles 39 are spaced apart from each other along first ring 30.In the cylinder 39 each all with vertical direction v almost parallel, and 12 extend towards the bottom side from first ring 30.In its side of bottom side 12 dorsad, conductive pole 39 is electrically connected with first ring 30.
In traditional the setting, most electrical breakdown occur in semiconductor subassembly 1 first ring 30 and near top side 11 places between the coil 41,42 of first ring 30 or near.For fear of this puncture, conduction the second ring 70 be arranged on coil 41,42 with first ring 30 between, and pass through wire 420 and be electrically connected with coil 41,42.In the example of Fig. 4, wire 420 directly is connected with contact terminal 45 at Fig. 1.Yet, wire 420 also can be respectively with transmitter coils 41 with are connected in outmost winding 411 or 421 directly be connected.Second the ring 70 neither and 41 electricity of the coil between contact terminal 45 and 46 be connected in series, also not and 42 electricity of the coil between contact terminal 45 and 47 be connected in series.
The second ring 70 only needs to have and coil 41,42 roughly the same electromotive forces, but does not carry great electric current.Therefore, the second ring 70 not only can be made by the metal as copper or aluminium, and can be made by polycrystalline semiconductor material alternatively.Usually, the combination of any electric conducting material or material all can be used for the second ring 70.
Alternatively, with the vertical section plane around direction r70 of the second ring 70 in, the second ring surface of 70 is at least at its on the part 710 of first ring 30 (that is, at it respectively dorsad on each coil axes 91 and 92 the part) and/or be circular in its part towards top side 11.Because by contrast, coil 41 can have straight sidewall with 42 winding 411,412,413,421,422,423 in identical section plane, thus between the adjacent winding 411,412,413 of each coil 41 and 42 and the distance between 421,422,423 can distinguish very little.That is, can effectively use coil 41,42 space, thereby and a large amount of windings can be set reach the effect that coil 41,42 produces strong electromagnetic signal.Therefore, though the absolute value of the electrical potential difference between in first ring 30 and the coil 41,42 one surpass between first ring 30 and the second ring 70 apart from d (1kV/20 μ m) times, also can without damage be operated without core transformer according to of the present invention.For example, the absolute value of electrical potential difference can be at least 6kV, at least 10kV or even 20kV at least.Therefore, spacing (repeat distance) b(between same coil 41,42 two the adjacent windings 411 and 412, between 412 and 413, between 421 and 422, between 422 and 423 sees Fig. 2 and 3) can be less than 55 μ m, for example, be in from 0.3 μ m in the scope of 55 μ m.Providing secondary conditions is a＜b, then winding 411,412,413,421,422,423 width a can be for example at 0.1 μ m in the scope of 40 μ m.
The second ring 70 with its section plane around perpendicular direction in have circular surface, by form the ring-shaped groove with straight sidewall in dielectric layer 15, then this groove of Wet-type etching can generate this circular surface.Dielectric layer 15 have special structure so that its can combined certain etchant with the etching of anisotropic etching speed.If dielectric layer 15 is for example based on the layer of silicon dioxide, make the P concentration of dopant v is non-constant in the vertical direction by two silicon dioxide and phosphorus (P) are doped to so, can realize that this anisotropic etching shows.When the P concentration of dopant improves, perpendicular to vertical direction v and the etch-rate that the material of layer 15 etches away is just higher around direction perpendicular to groove.If suitably adjust the distribution (run) of P concentration of dopant, so etched groove just has the section with circular side wall.After the etching, by utilize as metal (such as, aluminium or copper) such electric conducting material or polycrystalline semiconductor material filling groove, form second and encircle 70.Any other dielectric material also can replace doped silicon also to can be used for dielectric layer 15.
According to another execution mode shown in Fig. 5 and 6, with its section plane vertical around direction r30 in, not only the second ring 70, and first ring 30 also can be at least be circle at it on the part 310 of the second ring 70 and/or in its part towards top side 11.By with referring to figs. 1 through Fig. 4 identical method is described, can be created in the first ring 30 that has at least the part circular surface in the section.
In the above-described embodiment, two transmitter coils 41 and 42 are electrically connected to each other.Yet, shown in exemplary in Fig. 7 and 8, single transmitter coils 41 also can by conduction first ring 30 and be arranged on transmitter coils 41 and conduction second ring 70 of conduction between the first ring 30 around.First ring 30 can have identical structure referring to figs. 1 through Fig. 6 illustrated first ring 30 and the second ring 70 with top with the second ring 70.Unique difference is, in first ring 30 and the second ring 70 each is formed open loop, because otherwise the electric current by coil 41 can be by induction at ring 30,70 interior generation currents, the magnetic field that this can produce coil 41 and have a negative impact without the efficient of core transformer.But, first ring 30 and/or the second ring 70 also can be formed closed loop.In this case, if if required, by avoiding encircling 30 and/or encircle 70 and use low-resistance material, can reduce negative effect.
In the arranging of Fig. 7, first ring 30 has opening 301, the second rings 70 and has opening 701.Opening 301,701 all less.For example, the width d301 of opening 301 can be less than or equal to 10 μ m, for example, at 90nm in the scope of 10 μ m.Correspondingly, the width d701 of opening 701 can be less than or equal to 10 μ m, for example, at 90nm in the scope of 10 μ m.
Alternatively, in identical section plane, the end of first ring 30 can be rounded outwardly, that is, away from coil 41, and the end of the second ring 70 can be rounded inwardly, that is, and and towards coil 41.
Another execution mode shown in Fig. 8 with only be that with reference to the difference of the illustrated execution mode of Fig. 7 the second ring 70 is formed the closed loop conductor with opening 301.
In another execution mode shown in Fig. 9, first ring 30 can be formed closed conduction ring wall 300.Compare to the cylinder 39 of the configuration of Fig. 4 with Fig. 1, this closed-loop wall 300 protections are not subject to the impact of moisture infiltration without core transformer.Alternatively, closed-loop wall 300 can be extended towards bottom side 12, extends at least the level of the metal level that wherein forms coil 51 and 52.
In the above-described embodiment, first ring 30 and the second ring 70 are around one or two transmitter coils 41,42.Yet first ring 30 and the second ring 70 also can be in the same way around one or more receiver coils 51,52,61,62.
Figure 10 is the enlarged drawing of a part of the semiconductor subassembly of Fig. 6, in order to some feature of the possible curvature of first ring 30 and/or the second ring 70 is shown.First ring 30 has continuous first surface part 310, this surface portion with the vertical section plane (view plane) around direction (vertical with figure plane) of first ring 30 in be arranged on first ring 30 towards the second ring 70 that side on.First surface part 310 has the radius of curvature R 310 of at least 0.4 μ m in this section plane.For example, continuous first surface part 310 radius of curvature R 310 everywhere is at least 0.4 μ m, and alternatively, is less than or equal to 3.2 μ m, for example, is approximately 2 μ m.V in the vertical direction, first surface part 310 extensible at least 100nm or at least 0.8 μ m apart from d310.
Therefore, the second ring 70 has continuous second surface part 710, this surface portion with the vertical section plane (view plane) around direction (vertical with figure plane) of the second ring 70 in be arranged on the second ring 70 towards first ring 30 that side on.Second surface part 710 respectively be in the radius of curvature R 710 that has at least 0.4 μ m in this section plane.For example, continuous second surface part 710 radius of curvature R 710 everywhere in the scope of 3.2 μ m, for example, approximately is 2 μ m at 0.4 μ m.V in the vertical direction, continuous second surface part 710 extensible at least 100nm or at least 0.8 μ m apart from d710.
For the convenience of describing, such as D score, " under ", " bottom ", " on ", such space correlation term such as " top " is used for elements relative of explanation in the position of the second element.These terms are intended to comprise the different azimuth of this device except the orientation different from those orientation described in the figure.In addition, the terms such as " first ", " second " also are used for describing various elements, zone, part etc., and are not intended to some extent restriction.In whole specification, identical term represents identical element.
As used herein, term " has ", " comprising ", " comprising ", " including " etc. are open-ended term, and its expression has the element mentioned or the existence of feature, but does not get rid of extra element or feature.Article " one ", " one " and " being somebody's turn to do " are intended to comprise plural number and odd number, unless other clear in the context.
Although described present embodiment and advantage thereof in detail, it should be understood that, under the prerequisite of the spirit and scope of the present invention that do not deviate from the claims defined, can carry out various modifications, replacement and change at this.Particularly, except as otherwise noted, otherwise the different characteristic of different execution modes can combine.After understanding the above scope that changes and use, should understand the restriction that the present invention is not subjected to aforementioned description, also not be subjected to the restriction of accompanying drawing.But the present invention only is subjected to the restriction of following claim and legal equivalents thereof.
Claims (25)
1. semiconductor subassembly that has without core transformer describedly comprises without core transformer:
The first connecting terminal;
The second connecting terminal;
Conduction spiral the first coil is connected electrically between described the first connecting terminal and described the second connecting terminal;
The conduction first ring is around described the first coil and described the first connecting terminal and/or described the second connecting terminal; And
Conduction the second ring is arranged between described the first coil and the described first ring, and described second encircles and to be electrically connected with described the first coil and around described the first coil and described the first connecting terminal and/or described the second connecting terminal.
2. semiconductor subassembly according to claim 1 wherein, describedly also comprises without core transformer:
The 3rd connecting terminal;
Conduction spiral the second coil is connected electrically between described the first connecting terminal and described the 3rd connecting terminal;
Described first ring is around described the second coil and described the first connecting terminal and/or described the 3rd connecting terminal;
Described the second ring is arranged between described the second coil and the described first ring, and around described the second coil and described the first connecting terminal and/or described the 3rd connecting terminal.
3. semiconductor subassembly according to claim 1, wherein, described first ring comprises: continuous first surface part, described continuous first surface part with the section plane around perpendicular direction of described first ring in be arranged on described first ring on a side of described the second ring, wherein, in described section plane, described continuous first surface partly comprises the radius of curvature at least 0.4 μ m of whole described continuous first surface part.
4. semiconductor subassembly according to claim 3, wherein, in described section plane, described continuous first surface part has the radius of curvature in from 0.4 μ m to 3.2 mu m ranges in whole described continuous first surface part.
5. semiconductor subassembly according to claim 3, wherein, described continuous first surface part is extended the distance of 100nm at least or at least 0.8 μ m in vertical direction.
6. semiconductor subassembly according to claim 1, wherein, described the second ring comprises: continuous second surface part, described continuous second surface part with the section plane around perpendicular direction of described the second ring in be arranged on described the second ring on a side of described first ring, wherein, in described section plane, described continuous second surface part has the radius of curvature of at least 0.4 μ m in whole described continuous second surface part.
7. semiconductor subassembly according to claim 6, wherein, in described section plane, described continuous second surface part has the radius of curvature less than 3.2 μ m in whole described continuous second surface part.
8. semiconductor subassembly according to claim 6, wherein, described continuous second surface part is extended the distance of 100nm at least or at least 0.8 μ m in vertical direction.
9. semiconductor subassembly according to claim 1, wherein, described the second ring not and described the first coil electricity between described the first connecting terminal and described the second connecting terminal be connected in series.
10. semiconductor subassembly according to claim 1, wherein, described first ring is open loop or closed loop.
11. semiconductor subassembly according to claim 10, wherein,
Described first ring is the open loop that comprises the first opening; And
Described the first opening has the first width that is less than or equal to 10 μ m.
12. semiconductor subassembly according to claim 10, wherein, described first ring comprises the first opening between the two ends that are arranged on described first ring, and wherein, each end in the described two ends all leaves described the first coil and bending.
13. semiconductor subassembly according to claim 1, wherein, described the second ring is open loop or closed loop.
14. semiconductor subassembly according to claim 13, wherein,
Described the second ring is the open loop that comprises the second opening; And
Described the second opening has the second width that is less than or equal to 10 μ m.
15. semiconductor subassembly according to claim 13, wherein, described the second ring comprises the second opening between the two ends that are arranged on described the second ring, and wherein, each end in the described two ends of described the second ring is towards described the first coil bending.
16. semiconductor subassembly according to claim 1, wherein, the distance between two adjacent windings of described the first coil is less than 55 μ m.
17. a method that is used for the operation semiconductor subassembly, described method comprises:
A kind of semiconductor subassembly that has without core transformer is provided, describedly comprises without core transformer:
The first connecting terminal;
The second connecting terminal;
Conduction spiral the first coil is connected electrically between described the first connecting terminal and described the second connecting terminal;
The conduction first ring is around described the first coil and described the first connecting terminal and/or described the second connecting terminal;
Conduction the second ring is arranged between described the first coil and the described first ring, and described second encircles and to be electrically connected with described the first coil and around described the first coil and described the first connecting terminal and/or described the second connecting terminal; And
Apply the electrical potential difference of at least 1kV/20 μ m absolute value doubly with the distance between described first ring and described the second ring.
18. method according to claim 17 wherein, describedly also comprises without core transformer:
The 3rd connecting terminal;
Conduction spiral the second coil is connected electrically between described the first connecting terminal and described the 3rd connecting terminal;
Described first ring is around described the second coil and described the first connecting terminal and/or described the 3rd connecting terminal;
Described the second ring is arranged between described the second coil and the described first ring, and around described the second coil and described the first connecting terminal and/or described the 3rd connecting terminal.
19. method according to claim 17, wherein, described first ring comprises: continuous first surface part, described continuous first surface part with the section plane around perpendicular direction of described first ring in be arranged on described first ring on a side of described the second ring, wherein, in described section plane, described continuous first surface part has the radius of curvature of at least 0.4 μ m in whole described continuous first surface part.
20. method according to claim 19, wherein, in described section plane, described continuous first surface part has the radius of curvature in from 0.4 μ m to 3.2 mu m ranges in whole described continuous first surface part.
21. method according to claim 19, wherein, described continuous first surface part is extended the distance of 100nm at least or at least 6 μ m in vertical direction.
22. method according to claim 17, wherein, described the second ring comprises: continuous second surface part, described continuous second surface part with the section plane around perpendicular direction of described the second ring in be arranged on described the second ring on a side of described first ring, wherein, in described section plane, described continuous second surface part has the radius of curvature of at least 0.4 μ m in whole described continuous second surface part.
23. method according to claim 22, wherein, in described section plane, described continuous second surface part has the radius of curvature in from 0.4 μ m to 3.2 mu m ranges in whole described continuous second surface part.
24. method according to claim 22, wherein, described continuous second surface part is extended the distance of 100nm at least or at least 6 μ m in vertical direction.
25. method according to claim 17, wherein, described second the ring not and described the first coil electricity between described the first connecting terminal and described the second connecting terminal be connected in series.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/452,075 | 2012-04-20 | ||
| US13/452,075 US8665054B2 (en) | 2012-04-20 | 2012-04-20 | Semiconductor component with coreless transformer |
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| Publication Number | Publication Date |
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| CN103378072A true CN103378072A (en) | 2013-10-30 |
| CN103378072B CN103378072B (en) | 2016-04-20 |
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| Country | Link |
|---|---|
| US (1) | US8665054B2 (en) |
| CN (1) | CN103378072B (en) |
| DE (1) | DE102013206900B4 (en) |
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Also Published As
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| CN103378072B (en) | 2016-04-20 |
| US8665054B2 (en) | 2014-03-04 |
| US20130278372A1 (en) | 2013-10-24 |
| DE102013206900B4 (en) | 2020-07-02 |
| DE102013206900A1 (en) | 2013-11-07 |
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