WO2024038743A1

WO2024038743A1 - Transformer

Info

Publication number: WO2024038743A1
Application number: PCT/JP2023/027328
Authority: WO
Inventors: 将信辻
Original assignee: ローム株式会社
Priority date: 2022-08-15
Filing date: 2023-07-26
Publication date: 2024-02-22

Abstract

This transformer includes: a substrate having a substrate upper surface and a substrate lower surface; a first insulator which is in contact with the substrate upper surface; a second insulator which is in contact with the substrate lower surface; and an outer coil and an inner coil which are disposed inside the first insulator. The inner coil is disposed inside the outer coil when viewed in a direction perpendicular to the substrate upper surface, and is disposed so as not to overlap the outer coil.

Description

Trance

The present disclosure relates to a transformer.

Conventionally, a transformer is used to insulate a primary side circuit and a secondary side circuit. For example, Patent Document 1 discloses a semiconductor integrated circuit as an insulated gate driver including a transformer having a first coil on the primary side and a second coil on the secondary side.

Japanese Patent Application Publication No. 2013-51547

There are cases in which transformers such as those described above are required to have improved dielectric strength.

A transformer according to an embodiment of the present disclosure includes a substrate having an upper surface and a lower surface of the substrate, a first insulator in contact with the upper surface of the substrate, a second insulator in contact with the lower surface of the substrate, and disposed within the first insulator. an outer coil and an inner coil, the inner coil being disposed inside the outer coil and not overlapping the outer coil when viewed from a direction perpendicular to the upper surface of the substrate.

According to the transformer that is one aspect of the present disclosure, it is possible to improve the dielectric strength.

FIG. 1 is a circuit diagram schematically showing the configuration of a signal transmission device including a transformer according to the first embodiment. 2 is a schematic plan view schematically showing the signal transmission device of FIG. 1. FIG. 3 is a schematic plan view of a transformer in the signal transmission device of FIG. 2. FIG. FIG. 4 is a cross-sectional view taken along line F4-F4 in FIG. FIG. 5 is a sectional view taken along the line F5-F5 in FIG. FIG. 6 is a schematic cross-sectional view of a transformer of a comparative example. FIG. 7 is a schematic cross-sectional view of a modified example of the transformer. FIG. 8 is a schematic cross-sectional view of a modified example of the transformer. FIG. 9 is a schematic perspective view showing outer coil conductor wiring in a modified example of the transformer shown in FIG. FIG. 10 is a schematic cross-sectional view of a modified example of the transformer. FIG. 11 is a schematic cross-sectional view of a modified example of the transformer. FIG. 12 is a circuit diagram schematically showing the configuration of a power transmission device according to a modification. FIG. 13 is a circuit diagram schematically showing the configuration of a power transmission device according to a modified example. FIG. 14 is a circuit diagram schematically showing the configuration of a signal transmission device including a transformer according to the second embodiment. FIG. 15 is a schematic plan view schematically showing the signal transmission device of FIG. 14. FIG. 16 is a schematic plan view of a transformer in the signal transmission device of FIG. 15. FIG. 17 is a sectional view taken along the line F17-F17 in FIG. 16. FIG. 18 is a sectional view taken along the line F18-F18 in FIG. 16. FIG. 19 is an explanatory diagram of the operation in the transformer of the second embodiment. FIG. 20 is a schematic cross-sectional view of a modified example of the transformer. FIG. 21 is a schematic cross-sectional view of a modified example of the transformer. FIG. 22 is a schematic perspective view showing the outer coil conductor wiring in the transformer according to the modified example of FIG. 21. FIG. FIG. 23 is a schematic cross-sectional view of a modified example of the transformer. FIG. 24 is a schematic cross-sectional view of a modified example of the transformer. FIG. 25 is a circuit diagram schematically showing the configuration of a modified signal transmission device. FIG. 26 is a schematic plan view of the signal transmission device of FIG. 25. FIG. 27 is a schematic plan view schematically showing a modified example of the transformer of the second embodiment. FIG. 28 is a schematic plan view schematically showing a modified example of the transformer of the second embodiment. FIG. 29 is a schematic plan view schematically showing a modified example of the transformer of the second embodiment.

Hereinafter, some embodiments of the semiconductor device of the present disclosure will be described with reference to the accompanying drawings. It should be noted that, in order to simplify and clarify the explanation, the components shown in the drawings are not necessarily drawn to a constant scale or proportion. Further, in order to facilitate understanding, hatching lines may be omitted in the cross-sectional views. The accompanying drawings are merely illustrative of embodiments of the disclosure and should not be considered as limiting the disclosure. Terms such as "first," "second," and "third" in this disclosure are used merely to distinguish between objects, and are not intended to rank the objects.

The following detailed description includes devices, systems, and methods that embody example embodiments of the present disclosure. This detailed description is illustrative in nature and is not intended to limit the embodiments of the disclosure or the application and uses of such embodiments.

The expression "at least one" as used herein means "one or more" of the desired options. As an example, the expression "at least one" as used herein means "only one option" or "both of the two options" if the number of options is two. As another example, the expression "at least one" as used herein means "only one option" or "any combination of two or more options" if there are three or more options. means.

(First embodiment)
A first embodiment will be described with reference to the accompanying drawings.
FIG. 1 is a circuit diagram schematically showing the configuration of a signal transmission device including a transformer according to the first embodiment. 2 is a schematic plan view schematically showing the signal transmission device of FIG. 1. FIG. The first embodiment is configured as a signal transmission device 10 including a transformer 15.

(Circuit configuration of signal transmission device)
As shown in FIG. 1, the signal transmission device 10 is a device that transmits a pulse signal while electrically insulating a primary terminal 11 and a secondary terminal 12. Signal transmission device 10 is, for example, a digital isolator. The signal transmission device 10 includes a primary circuit 13 electrically connected to a primary terminal 11, a secondary circuit 14 electrically connected to a secondary terminal 12, and a primary circuit 13. A transformer 15 that electrically insulates the secondary circuit 14 is included.

The primary side circuit 13 is a circuit configured to operate when the first voltage V1 is applied. The primary circuit 13 is electrically connected to, for example, an external control device (not shown). The primary circuit 13 includes a transmitting circuit 13T. The secondary side circuit 14 is a circuit configured to operate when a second voltage V2 different from the first voltage V1 is applied. The second voltage V2 is higher than the first voltage V1, for example. The first voltage V1 and the second voltage V2 are DC voltages. The secondary circuit 14 is electrically connected to, for example, a drive circuit that is controlled by a control device. An example of a drive circuit is a switching circuit. The secondary circuit 14 includes a receiving circuit 14R. A ground for the primary circuit 13 and a ground for the secondary circuit 14 are provided independently.

The transformer 15 is connected between the transmitting circuit 13T and the receiving circuit 14R. The transformer 15 includes a primary coil 16 and a secondary coil 17. The primary coil 16 is connected to a transmitting circuit 13T, and the secondary coil 17 is connected to a receiving circuit 14R.

A control signal from, for example, a control device is input to the transmission circuit 13T of the primary side circuit 13 through the primary side terminal 11. The control signal is received by the receiving circuit 14R of the secondary circuit 14 from the transmitting circuit 13T of the primary circuit 13 via the transformer 15. The signal transmitted to the secondary circuit 14 is output from the secondary circuit 14 to the drive circuit through the secondary terminal 12.

As described above, in the signal transmission device 10, the primary side circuit 13 and the secondary side circuit 14 are electrically insulated by the transformer 15. More specifically, while the transformer 15 restricts the transmission of DC voltage between the primary circuit 13 and the secondary circuit 14, it allows the transmission of pulse signals.

In other words, the state where the primary side circuit 13 and the secondary side circuit 14 are insulated refers to the state where the transmission of DC voltage is cut off between the primary side circuit 13 and the secondary side circuit 14. This means that transmission of pulse signals from the primary circuit 13 to the secondary circuit 14 is permitted. In this way, the secondary circuit 14 is configured to receive the signal from the primary circuit 13.

The dielectric strength voltage of the signal transmission device 10 is, for example, 2500 Vrms or more and 7500 Vrms or less. The dielectric strength voltage of the signal transmission device 10 of the first embodiment is approximately 5700 Vrms. However, the specific numerical value of the dielectric strength voltage of the signal transmission device 10 is not limited to this and is arbitrary.

(Configuration of signal transmission device)
As shown in FIG. 2, the signal transmission device 10 is a semiconductor device in which a plurality of semiconductor chips are packaged into one package. Although not shown, the package format of the signal transmission device 10 is, for example, an SO (Small Outline) system, and in the first embodiment is an SOP (Small Outline Package). Note that the package format of the signal transmission device 10 can be changed arbitrarily.

The signal transmission device 10 includes a first chip 31, a second chip 32, and a transformer 40 as semiconductor chips. The first chip 31 includes the primary side circuit 13 shown in FIG. The second chip 32 includes the secondary side circuit 14 shown in FIG. The transformer 40 includes the transformer 15 (the primary coil 16 and the secondary coil 17) shown in FIG.

The signal transmission device 10 includes a first die pad 21 on the primary side and a second die pad 22 on the secondary side. Both the first die pad 21 and the second die pad 22 are formed into a flat plate shape. Both the first die pad 21 and the second die pad 22 are made of a conductive material. In the first embodiment, each die

pad

21, 22 is formed of a material containing Cu (copper). Note that each die

pad

21, 22 may be formed of other metal materials such as Al (aluminum). Moreover, the material constituting each die

pad

21, 22 is not limited to a conductive material. For example, each die

pad

21, 22 may be made of ceramic such as alumina. That is, each die

pad

21, 22 may be formed of a material having electrical insulation properties.

When viewed from the z direction, the first die pad 21 and the second die pad 22 are arranged side by side and spaced apart from each other. When viewed from the z direction, the arrangement direction of the first die pad 21 and the second die pad 22 is defined as the x direction. When viewed from the z direction, the direction orthogonal to the x direction is defined as the y direction. Note that in the following description, plan view means viewing from the z direction.

The first chip 31 and transformer 40 are mounted on the first die pad 21. The first chip 31 and the transformer 40 are bonded to the first die pad 21 by

bonding materials

25 and 26. The

bonding materials

25 and 26 are, for example, conductive bonding materials such as solder and Ag (silver) paste. Note that as the

bonding materials

25 and 26, an insulating bonding material such as epoxy resin may be used. The material of the bonding material 25 of the first chip 31 and the material of the bonding material 26 of the transformer 40 may be different from each other. The second chip 32 is mounted on the second die pad 22. The second chip 32 is bonded to the second die pad 22 by a bonding material 27. The bonding material 27 is, for example, a conductive bonding material such as solder or Ag paste. Note that as the bonding material 27, an insulating bonding material such as epoxy resin may be used.

The signal transmission device 10 includes a plurality of primary leads 23 and a plurality of secondary leads 24. FIG. 2 shows four primary leads 23A to 23D and four secondary leads 24A to 24D. The primary leads 23A and 23D are connected to the first die pad 21. The primary leads 23B and 23C are connected to the first chip 31 by primary wires W11A and W11B. The primary leads 23B and 23C are used for supplying operating voltage to the first chip 31, inputting signals, and the like. The primary lead 23B or the primary lead 23C is used as the primary terminal 11 shown in FIG. Further, the first chip 31 is connected to the first die pad 21 by a wire W12. The number, shape, connection state, etc. of the primary leads 23 can be changed as appropriate. Wires W11A, W11B, and W12 are bonding wires formed by a wire bonding device. The wires W11A, W11B, and W12 are made of a conductor such as Au (gold), Al, or Cu.

The secondary leads 24A and 24D are connected to the second die pad 22. The secondary leads 24B and 24C are connected to the second chip 32 by secondary wires W17A and W17B. The secondary leads 24B and 24C are used for supplying operating voltage to the second chip 32, outputting signals, and the like. The secondary lead 24B or the secondary lead 24C is used as the secondary terminal 12 shown in FIG. Further, the second chip 32 is connected to the second die pad 22 by a wire W16. The number, shape, connection state, etc. of the secondary leads 24 can be changed as appropriate. Wires W16, W17A, and W17B are bonding wires formed by a wire bonding device. The wires W16, W17A, and W17B are made of a conductor such as Au, Al, or Cu.

The first chip 31 is connected to the transformer 40 by wires W13A and W13B. The transformer 40 is connected to the second chip 32 by wires W15A and W15B. Wires W13A, W13B, W15A, and W15B are bonding wires formed by a wire bonding device. The wires W13A, W13B, W15A, and W15B are made of a conductor such as Au, Al, or Cu.

The signal transmission device 10 further includes a sealing resin 28. The sealing resin 28 seals a portion of each die

pad

21, 22, each

chip

31, 32, a transformer 40, and each lead 23, 24. The sealing resin 28 is made of an electrically insulating material. A black epoxy resin is used as an example of such a material. The sealing resin 28 is formed into a rectangular plate shape with the thickness direction in the z direction.

As described above, in the first embodiment, the transformer 40 is mounted on the first die pad 21. That is, both the transformer 40 and the first chip 31 are mounted on the first die pad 21. The transformer 40 and the first chip 31 are spaced apart from each other in the x direction on the first die pad 21 . Therefore, it can be said that the first chip 31, the transformer 40, and the second chip 32 are arranged apart from each other in the x direction. In the first embodiment, the first chip 31, the transformer 40, and the second chip 32 are arranged in this order. In other words, the transformer 40 is arranged between the first chip 31 and the second chip 32 in the x direction.

In order to set the dielectric strength voltage of the signal transmission device 10 to a preset dielectric strength voltage, it is necessary to separate the first die pad 21 and the second die pad 22 from each other. In the first embodiment, in plan view, the distance between the first die pad 21 and the second die pad 22 in the x direction is larger than the distance between the first chip 31 and the transformer 40 in the x direction. Therefore, the distance between the first chip 31 and the transformer 40 is smaller than the distance between the transformer 40 and the second chip 32 in the x direction. In other words, the transformer 40 is arranged closer to the first chip 31 than the second chip 32.

(Schematic configuration of transformer)
An example of the internal structure of the transformer 40 of the first embodiment will be described with reference to FIGS. 3 to 5.

FIG. 3 is a schematic plan view of the transformer 40. 4 is a sectional view taken along the line F4-F4 in FIG. 3, and FIG. 5 is a sectional view taken along the line F5-F5 in FIG. In FIG. 3, the outer coil 60 and the inner coil 70 are shown in solid lines for easy understanding.

As shown in FIG. 3, the transformer 40 is a transformer chip that includes an outer coil 60 and an inner coil 70. The primary coil 16 shown in FIG. 1 includes an outer coil 60. The secondary coil 17 shown in FIG. 1 includes an inner coil 70.

As shown in FIGS. 3 to 5, the transformer 40 includes a chip main surface 41 and a chip back surface 42 facing opposite to the chip main surface 41. Furthermore, the transformer 40 includes four chip side surfaces 43, 44, 45, and 46 perpendicular to both the chip main surface 41 and the chip back surface 42. The chip side surfaces 43 and 44 constitute both end surfaces of the transformer 40 in the y direction. The chip side surfaces 45 and 46 constitute both end surfaces of the transformer 40 in the x direction.

As shown in FIGS. 4 and 5, the transformer 40 includes a substrate 51, a first insulator 52 disposed on the substrate 51, and a second insulator 53 disposed below the substrate 51. include.
(substrate)
The substrate 51 has a substrate upper surface 51S and a substrate lower surface 51R facing oppositely to each other in the z direction. The substrate 51 is made of, for example, a semiconductor substrate, a glass substrate, or the like. In the first embodiment, the substrate 51 is a substrate formed from a material containing Si (silicon). Examples of the Si substrate used for the substrate 51 include a semiconductor substrate made of a single-crystal intrinsic semiconductor material, a p-type semiconductor substrate containing acceptor-type impurities, and an n-type semiconductor substrate containing donor-type impurities.

Note that the substrate 51 may be made of a wide bandgap semiconductor or a compound semiconductor as a semiconductor substrate. Furthermore, instead of the semiconductor substrate, the substrate 51 may be an insulating substrate made of a material containing glass. A wide band gap semiconductor is a semiconductor substrate having a band gap of 2.0 eV or more. The wide bandgap semiconductor may be SiC (silicon carbide), GaN (gallium nitride), Ga ₂ O ₃ (gallium oxide), or the like. The compound semiconductor may be a III-V compound semiconductor. The compound semiconductor may include at least one of AlN (aluminum nitride), InN (indium nitride), GaN, and GaAs (gallium arsenide).

(first insulator)
The first insulator 52 is formed on the substrate 51. The first insulator 52 is in contact with the top surface 51S of the substrate 51. The first insulator 52 includes a lower surface 52R in contact with the substrate 51 and an upper surface 52S on the opposite side of the lower surface 52R. The upper surface 52S of the first insulator 52 constitutes the chip main surface 41 of the transformer 40.

The first insulator 52 of the first embodiment includes a plurality of insulating layers 521 to 526, 52U. The plurality of insulating layers 521 to 526, 52U are stacked in the z direction from the top surface 51S of the substrate 51. Therefore, it can be said that the z direction is the thickness direction of the first insulator 52. Further, the z direction can also be said to be the lamination direction of the plurality of insulating layers 521 to 526, 52U included in the first insulator 52.

The lowermost insulating layer 521 is in contact with the upper substrate surface 51S of the substrate 51. The upper surface of the uppermost insulating layer 52U constitutes a chip main surface 41 of the transformer 40. In the following description, the uppermost insulating layer 52U among the plurality of insulating layers 521 to 526, 52U will be referred to as the second insulating layer 52U, and the insulating layers 521 to 526 other than the second insulating layer 52U will be referred to as the first insulating layer. May be shown as 521-526.

The first insulating layers 521 to 526 are made of, for example, a material containing Si. As the material containing Si, SiO ₂ (silicon oxide), SiN (silicon nitride), SiC, SiCN (nitrogen-doped silicon carbide), etc. can be used. Note that at least one of the first insulating layers 521 to 526 may be made of a different material. Further, at least one of the first insulating layers 521 to 526 may be formed by stacking a plurality of films. The first insulating layers 521 to 526 may be composed of a thin film formed of a material containing SiN, SiC, SiCN, etc., and an interlayer insulating film formed of a material containing SiO ₂ . The first insulating layers 521 to 526 may be formed as one insulating layer without being distinguished from each other.

The second insulating layer 52U is made of, for example, a material containing resin having electrical insulation properties. The second insulating layer 52U is formed of, for example, a passivation film including a nitride film and a resin film having electrical insulation properties. The nitride film includes, for example, materials such as Si ₃ N ₄ , SiN, and SiCN. The resin film includes, for example, polyimide (PI). Note that the second insulating layer 52U may be formed of a material containing Si, similar to the first insulating layers 521 to 526.

(Second insulator)
The second insulator 53 is formed under the substrate 51. The second insulator 53 is in contact with the lower surface 51R of the substrate 51. The second insulator 53 includes an upper surface 53S in contact with the substrate lower surface 51R of the substrate 51, and a lower surface 53R on the opposite side to the upper surface 53S. The lower surface 53R of the second insulator 53 constitutes the back surface 42 of the chip of the transformer 40.

The second insulator 53 of the first embodiment includes a plurality of insulating layers 531 to 534. The plurality of insulating layers 531 to 534 are stacked in the z direction from the bottom surface 51R of the substrate 51. Therefore, it can be said that the z direction is the thickness direction of the second insulator 53. Further, the z direction can also be said to be the lamination direction of the plurality of insulating layers 531 to 534 included in the second insulator 53. The uppermost insulating layer 531 is in contact with the lower substrate surface 51R of the substrate 51. The lower surface of the lowermost insulating layer 534 constitutes the back surface 42 of the chip of the transformer 40 .

The second insulator 53 can be formed of the same material as the first insulator 52. In the first embodiment, the insulating layers 531 to 534 of the second insulator 53 are made of, for example, a material containing Si. As the material containing Si, SiO ₂ , SiN, SiC, SiCN, etc. can be used. Note that at least one of the insulating layers 531 to 534 may be made of a different material. Furthermore, at least one of the insulating layers 531 to 534 may be formed by stacking a plurality of films. The insulating layers 531 to 534 may be composed of a thin film formed of a material containing SiN, SiC, SiCN, etc., and an interlayer insulating film formed of a material containing SiO ₂ . The insulating layers 531 to 534 may be formed as one insulating layer without being distinguished from each other.

Further, the second insulator 53 can also be formed of a different material from the first insulator 52. The insulating layers 531 to 534 of the second insulator 53 may be formed of, for example, a material containing electrically insulating resin. As this material, for example, a material containing polyimide can be used.

(outer coil and inner coil)
As shown in FIGS. 3-5, transformer 40 includes an outer coil 60 and an inner coil 70. As shown in FIGS. As shown in FIG. 4, outer coil 60 and inner coil 70 are embedded in first insulator 52. As shown in FIG.

As shown in FIG. 3, the outer coil 60 includes a first end 60A and a second end 60B opposite to the first end 60A. The outer coil 60 is formed in a circular spiral shape when viewed from above. In the spiral outer coil 60, the first end 60A is located inside the spiral, and the second end 60B is located outside the spiral. In other words, the outer coil 60 is wound in a spiral shape, with the first end 60A being the inner end and the second end 60B being the outer end.

As shown in FIGS. 4 and 5, the outer coil 60 is provided on the first insulating layer 526, which is the uppermost layer among the plurality of first insulating layers 521 to 526. That is, the outer coil 60 is disposed closer to the upper surface 52S of the first insulator 52. The outer coil 60 is formed of a material containing one or more appropriately selected from Ti (titanium), TiN (titanium nitride), Au, Ag, Cu, Al, and W (tungsten). The outer coil 60 of the first embodiment is made of a material containing Al.

Inner coil 70 is arranged inside outer coil 60. The inner coil 70 is arranged so as not to overlap the outer coil 60 in plan view.
The inner coil 70 includes a first end 70A and a second end 70B opposite to the first end 70A. The inner coil 70 is formed in a circular spiral shape when viewed from above. In the spiral inner coil 70, the first end 70A is arranged inside the spiral, and the second end 70B is arranged outside the spiral. In other words, the inner coil 70 is wound in a spiral shape with the first end 70A being the inner end and the second end 70B being the outer end. Note that the inner coil 70 may have the first end 70A as the outer end and the second end 70B as the inner end.

As shown in FIG. 4, the inner coil 70 is provided in the first insulating layer 526, which is the uppermost layer among the plurality of first insulating layers 521 to 526. That is, the inner coil 70 is disposed closer to the upper surface 52S of the first insulator 52. The inner coil 70 is formed of a material containing one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W. The inner coil 70 of the first embodiment is made of a material containing Al.

(Wiring section)
As shown in FIGS. 3 and 4, the transformer 40 includes a wiring section 80. The wiring section 80 is electrically connected to the outer coil 60. The wiring portion 80 is electrically connected to the first end 60A of the outer coil 60. Note that in FIG. 4, the wiring section 80 is schematically shown.

As shown in FIGS. 3 and 4, the wiring section 80 includes a connection wiring 81, vias 82 and 83, and a terminal section 84. The wiring portion 80 is formed of a material containing one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W.

The terminal portion 84 is arranged near the chip side surface 46. In the transformer 40 of the first embodiment, the terminal portion 84 is arranged at the same position in the y direction as the first end 60A of the outer coil 60 in plan view. Note that the arrangement position of the terminal portion 84 may be changed arbitrarily.

As shown in FIG. 4, the connection wiring 81 is arranged below the outer coil 60. For example, the connection wiring 81 is provided in the first insulating layer 524 two layers below the first insulating layer 526 on which the outer coil 60 is provided. Note that the position where the connection wiring 81 is provided may be changed as appropriate within a range where it does not come into contact with the outer coil 60. As shown in FIG. 3, the connection wiring 81 is formed to extend from the first end 81A connected to the outer coil 60 toward the chip side surface 46. The connection wiring 81 extends from the first end 60A of the outer coil 60 to the terminal portion 84 in a plan view. A first end 81A of the connection wiring 81 is electrically connected to a first end 60A of the outer coil 60 via a via 82. The second end 81B of the connection wiring 81 is electrically connected to the terminal portion 84 via the via 83.

(Wire connection to outer coil and wiring section)
As shown in FIGS. 3 and 4, the second insulating layer 52U includes an opening 52U1 that exposes the second end 60B of the outer coil 60 and an opening 52U2 that exposes a part of the wiring section 80. Wires W13A and W13B are connected to the second end 60B and the terminal portion 84 exposed through the openings 52U1 and 52U2. That is, it can be said that the second end 60B and the terminal portion 84 exposed through the openings 52U1 and 52U2 are connection pads that connect the wires W13A and W13B. As shown in FIG. 2, wires W13A and W13B are connected to the first chip 31. Therefore, the second end 60B and the terminal portion 84 exposed through the openings 52U1 and 52U2 can also be called connection pads that connect the transformer 40 to the first chip 31.

(Wire connection to inner coil)
As shown in FIGS. 3 and 5, the second insulating layer 52U includes a plurality of openings 52U3 and 52U4 that expose a portion of the inner coil 70. The opening 52U3 is formed to expose the first end 70A of the inner coil 70. The opening 52U4 is formed to expose the second end 70B of the inner coil 70.

A wire W15A is connected to the first end 70A of the inner coil 70 exposed through the opening 52U3. A wire W15B is connected to the second end 70B of the inner coil 70 exposed through the opening 52U4. That is, it can be said that the first end 70A exposed through the opening 52U3 and the second end 70B exposed through the opening 52U4 are connection pads that connect the wires W15A and W15B. These wires W15A and W15B are connected to the second chip 32, as shown in FIG. Therefore, the first end 70A and the second end 70B exposed through the openings 52U3 and 52U4 can also be called connection pads that connect the transformer 40 to the second chip 32.

The outer coil 60 and the inner coil 70 are electrically insulated from each other and configured to be magnetically coupled. The transformer 40 of the first embodiment is configured such that the outer coil 60 and the inner coil 70 can be magnetically coupled along a plane parallel to the upper surface 51S of the substrate 51.

The inner coil 70 is arranged inside the outer coil 60. Therefore, a current flows in the inner coil 70 in a direction that corresponds to the direction of the magnetic flux generated by the current flowing in the outer coil 60.

As shown in FIG. 4, the inner coil 70 and the outer coil 60 are arranged at the same position in the z direction and on the same plane perpendicular to the thickness direction of the first insulator 52. Therefore, the distance D70 from the substrate 51 to the inner coil 70 is equal to the distance D60 from the substrate 51 to the outer coil 60.

The connection wiring 81 of the wiring section 80 connected to the outer coil 60 is arranged below the outer coil 60. Therefore, the distance D80 from the substrate 51 to the connection wiring 81 is smaller than the distance D60 from the substrate 51 to the outer coil 60 and the distance D70 from the substrate 51 to the inner coil 70. Therefore, in the transformer 40 of the first embodiment, the distance D80 from the substrate 51 to the connection wiring 81 is the second shortest distance between the outer coil 60 and the inner coil 70 and the substrate 51 in the thickness direction.

The distances D11 and D12 between the outer coil 60 and the inner coil 70 are equal to each other. The distances D11 and D12 are the first shortest distances between the outer coil 60 and the inner coil 70. The distances D11 and D12 can be, for example, 10 μm or more and 20 μm or less.

As shown in FIG. 4, the distance from the substrate 51 to the outer coil 60 and the inner coil 70 in the z direction is the thickness T52 of the first insulator 52. Further, in the z direction, the distance from the upper surface 53S to the lower surface 53R is the thickness T53 of the second insulator 53. In the transformer 40 of the first embodiment, the thickness T52 of the first insulator 52 is thicker than the thickness T53 of the second insulator 53. The thickness T52 of the first insulator 52 and the thickness T53 of the second insulator 53 can be set according to the dielectric strength voltage of the transformer 40.

The thickness T52 of the first insulator 52 and the thickness of the second insulator 53 are set such that the total value of the second shortest distance D80 and the thickness T53 of the second insulator 53 is equal to or greater than the first shortest distance D11, D12. The distance T53 and the distances D11 and D12 between the outer coil 60 and the inner coil 70 can be set. The thickness T52 of the first insulator 52, specifically the distance D70 to the coil (inner coil 70 in the first embodiment) electrically connected to the second chip 32, can be 5 μm or more and 10 μm or less. The thickness T53 of the second insulator 53 can be 5 μm or more and 10 μm or less.

The configuration of the transformer 40 can be changed as appropriate depending on the relationship among the first shortest distances D11 and D21, the second shortest distance D80, and the thickness T53 of the second insulator 53. For example, the thickness T52 of the first insulator 52 and the thickness T53 of the second insulator 53 may be made equal. Further, the thickness T53 of the second insulator 53 may be made thicker than the thickness of the first insulator 52.

(effect)
The operation of the transformer 40 in the signal transmission device 10 of the first embodiment will be explained. In addition, regarding the transformer 40X of the comparative example, the same reference numerals are given to the same components as those of the transformer 40 of the first embodiment.

FIG. 6 shows a cross-sectional structure of a transformer 40X of a comparative example. The transformer 40X of the comparative example includes only the first insulator 52 on the substrate 51 and does not include the second insulator 53. In the transformer 40X of the comparative example, the primary coil 16X and the secondary coil 17X are arranged in an overlapping manner in the thickness direction of the first insulator 52 on the substrate 51. In other words, the transformer 40X of the comparative example includes a primary coil 16X and a secondary coil 17X that are arranged to be magnetically coupled in the thickness direction of the first insulator 52.

The dielectric strength of the comparative example transformer 40X is determined by the distance between the primary coil 16X and the secondary coil 17X. In the transformer 40X of the comparative example, in order to improve the dielectric strength, it is necessary to thicken the first insulator 52 and widen the space between the primary coil 16X and the secondary coil 17X. However, in the transformer 40X of the comparative example, warpage occurs in the substrate 51 and the first insulator 52 due to the stress in the substrate 51 and the first insulator 52 due to the difference between the material of the substrate 51 and the material of the first insulator 52. The thicker the first insulator 52 is, the greater the warpage that occurs in the substrate 51 and the first insulator 52.

The transformer 40 of the first embodiment includes a first insulator 52 provided on a substrate 51 and a second insulator 53 provided below the substrate 51. The first insulator 52 is in contact with the upper substrate surface 51S of the substrate 51, and the second insulator 53 is in contact with the lower substrate surface 51R of the substrate 51. Therefore, the stress generated by the first insulator 52 in contact with the substrate upper surface 51S and the stress generated by the second insulator 53 in contact with the substrate lower surface 51R cancel each other out with respect to the substrate 51, thereby reducing stress in the transformer 40. Therefore, warpage of the transformer 40 can be reduced.

Furthermore, in the first embodiment, the first insulator 52 and the second insulator 53 are made of the same material. Therefore, stress in the transformer 40 can be further reduced compared to the case where the first insulator 52 and the second insulator 53 are made of different materials. Thereby, the warpage of the substrate 51, that is, the warpage of the transformer 40 can be further reduced.

As described above, the transformer 40 of the first embodiment includes the second insulator 53, thereby canceling out the stress caused by the first insulator 52, thereby reducing the stress in the transformer 40. Therefore, the thicknesses T52 and T53 of the first insulator 52 and the second insulator 53 can be made thicker than the transformer 40X of the comparative example. Thereby, the dielectric strength voltage of the transformer 40 can be further improved.

As shown in FIG. 2, the transformer 40 is mounted on the first die pad 21. The potential of the first die pad 21 is equal to the common voltage of the first chip 31 mounted on the first die pad 21. In the transformer 40 of the first embodiment, the substrate 51 is sandwiched between a first insulator 52 and a second insulator 53. Therefore, the substrate 51 is electrically at a floating potential from the first chip 31 and the second chip 32. In other words, the substrate 51 is electrically floating.

As shown in FIG. 4, the outer coil 60 and the inner coil 70 are arranged closer to the upper surface of the first insulator 52. In the transformer 40, parasitic capacitors C11 and C12 are generated between the outer coil 60 and the substrate 51 and between the inner coil 70 and the substrate 51. Further, a parasitic capacitor C53 is generated between the first die pad 21 and the conductive bonding material 26 and the substrate 51.

As shown in FIGS. 1 and 2, the outer coil 60 (the primary coil 16 shown in FIG. 1) is electrically connected to the first chip 31 including the primary circuit 13. Both the first chip 31 and the transformer 40 are mounted on the first die pad 21. Therefore, the common voltage of the substrate 51 of the transformer 40 and the primary circuit 13 of the first chip 31 is the same. On the other hand, the inner coil 70 (the secondary coil 17 shown in FIG. 1) is electrically connected to the second chip 32 including the secondary circuit 14. Therefore, the inner coil 70 has the same common voltage as the secondary circuit 14.

As shown in FIG. 4, in the transformer 40, a parasitic capacitor C53 is generated between the substrate 51 and the first die pad 21 (bonding material 26), and a parasitic capacitor C12 is generated between the substrate 51 and the inner coil 70. Therefore, the potential of the substrate 51 is a voltage obtained by dividing the common voltage of the first die pad 21 and the common voltage of the inner coil 70 by the capacitance values of the parasitic capacitors C53 and C12. By making the total value of the capacitance values of these parasitic capacitors C53 and C12 larger than the capacitance value of the parasitic capacitor C2X between the primary coil 16X and the secondary coil 17X in the transformer 40X of the comparative example described above, , dielectric strength can be improved. For example, by setting the total value of the capacitance values of the parasitic capacitors C53 and C12 to twice the capacitance value of the parasitic capacitor C2X in the transformer of the comparative example, the dielectric strength voltage of the transformer 40 of the first embodiment can be increased from that of the transformer of the comparative example. It can be twice the dielectric strength voltage.

In the transformer 40 of the first embodiment, the outer coil 60 and the inner coil 70 are arranged at the same position in the thickness direction of the first insulator 52 and on the same plane perpendicular to the thickness direction. The dielectric strength between the outer coil 60 and the inner coil 70 is determined by the first shortest distances D11 and D12 between the outer coil 60 and the inner coil 70. The first shortest distances D11 and D12 can be adjusted by the shapes of the outer coil 60 and the inner coil 70, that is, the layout design of the transformer 40. That is, the dielectric strength between the outer coil 60 and the inner coil 70 of the transformer 40 can be adjusted by designing the layout of the transformer 40. Therefore, the dielectric strength voltage of the transformer 40 can be easily changed.

The wiring resistance values of the outer coil 60 and the inner coil 70 affect the amount of current flowing through the outer coil 60 and the inner coil 70, respectively, and the degree of magnetic coupling. The wiring resistance value of the outer coil 60 is obtained by widening the wiring width of the outer coil 60 and decreasing the aspect ratio of the wiring thickness to the wiring width. Similarly, the wiring resistance value of the inner coil 70 can be obtained by widening the wiring width of the inner coil 70 and decreasing the aspect ratio of the wiring thickness to the wiring width.

In the transformer 40X of the comparative example described above, the primary coil 16X and the secondary coil 17X are arranged in the thickness direction of the first insulator 52. Therefore, if the wiring width of the primary coil 16X and the secondary coil 17X is increased when viewed from the thickness direction of the first insulator 52, the opposing area of the primary coil 16X and the secondary coil 17X increases. Therefore, the capacitance value of the parasitic capacitor increases.

In the transformer 40 of the first embodiment, the outer coil 60 and the inner coil 70 face each other in the x direction and the y direction. Therefore, even if the wiring width is increased, the facing area of the outer coil 60 and the inner coil 70 does not change. That is, the capacitance values of the parasitic capacitors C11 and C12 between the outer coil 60 and the inner coil 70 do not change. That is, compared to the transformer 40X of the comparative example, the wiring resistance value can be reduced without increasing the capacitance value of the parasitic capacitors C11 and C12 between the coils. As a result, current flows more easily in the outer coil 60 and inner coil 70 of the transformer 40, so that the amount of magnetic flux generated in the transformer 40 can be increased. In the transformer 40, it is possible to improve the efficiency of magnetic coupling between the outer coil 60 and the inner coil 70, and thus to improve the transfer characteristics.

(effect)
As described above, the transformer 40 of the first embodiment provides the following effects.
(1-1) The transformer 40 of the first embodiment includes a first insulator 52 provided on a substrate 51 and a second insulator 53 provided below the substrate 51. The first insulator 52 is in contact with the upper substrate surface 51S of the substrate 51, and the second insulator 53 is in contact with the lower substrate surface 51R of the substrate 51. Therefore, the stress generated by the first insulator 52 in contact with the substrate upper surface 51S and the stress generated by the second insulator 53 in contact with the substrate lower surface 51R cancel each other out with respect to the substrate 51, thereby reducing stress in the transformer 40. Therefore, warpage of the transformer 40 can be reduced.

(1-2) In the first embodiment, the first insulator 52 and the second insulator 53 are made of the same material. Therefore, stress in the transformer 40 can be further reduced compared to the case where the first insulator 52 and the second insulator 53 are made of different materials. Thereby, the warpage of the substrate 51, that is, the warpage of the transformer 40 can be further reduced.

(1-3) The transformer 40 of the first embodiment includes the second insulator 53, thereby canceling out stress caused by the first insulator 52, thereby reducing stress in the transformer 40. Therefore, the thicknesses T52 and T53 of the first insulator 52 and the second insulator 53 can be made thicker than the transformer 40X of the comparative example. Thereby, the dielectric strength voltage of the transformer 40 can be further improved.

(1-4) In the transformer 40, a parasitic capacitor C53 is generated between the substrate 51 and the first die pad 21 (bonding material 26), and a parasitic capacitor C12 is generated between the substrate 51 and the inner coil 70. Therefore, the potential of the substrate 51 is a voltage obtained by dividing the common voltage of the first die pad 21 and the common voltage of the inner coil 70 by the capacitance values of the parasitic capacitors C53 and C12. By making the total value of the capacitance values of these parasitic capacitors C53 and C12 larger than the capacitance value of the parasitic capacitor C2X between the primary coil 16X and the secondary coil 17X in the transformer 40X of the comparative example described above, , dielectric strength can be improved. For example, by setting the total value of the capacitance values of the parasitic capacitors C53 and C12 to twice the capacitance value of the parasitic capacitors in the transformer of the comparative example, the dielectric strength voltage of the transformer 40 of the first embodiment can be increased from that of the transformer 40X of the comparative example. It can be twice the dielectric strength voltage.

(1-5) The outer coil 60 and the inner coil 70 are arranged at the same position in the thickness direction of the first insulator 52 and on the same plane perpendicular to the thickness direction. The dielectric strength between the outer coil 60 and the inner coil 70 is determined by the first shortest distances D11 and D12 between the outer coil 60 and the inner coil 70. The first shortest distances D11 and D12 can be adjusted by the shapes of the outer coil 60 and the inner coil 70, that is, the layout design of the transformer 40. That is, the dielectric strength between the outer coil 60 and the inner coil 70 of the transformer 40 can be adjusted by designing the layout of the transformer 40. Therefore, the dielectric strength voltage of the transformer 40 can be easily changed.

(1-6) The wiring resistance values of the outer coil 60 and the inner coil 70 affect the amount of current flowing through the outer coil 60 and the inner coil 70, respectively, and the degree of magnetic coupling. The wiring resistance value of the outer coil 60 is obtained by widening the wiring width of the outer coil 60 and decreasing the aspect ratio of the wiring thickness to the wiring width. Similarly, the wiring resistance value of the inner coil 70 can be obtained by widening the wiring width of the inner coil 70 and decreasing the aspect ratio of the wiring thickness to the wiring width.

(Example of modification of the first embodiment)
The first embodiment described above can be modified as follows, for example. The first embodiment and each of the following modified examples can be combined with each other as long as no technical contradiction occurs. In addition, in the following modified examples, the same parts as in the first embodiment are given the same reference numerals as in the first embodiment, and the explanation thereof will be omitted.

- The modified transformer 40A shown in FIG. 7 includes an outer coil 60 formed on two first insulating

layers

527 and 529. The outer coils 60 of the first insulating

layers

527 and 529 are connected in parallel by vias 65. By connecting the outer coils 60 formed on the first insulating

layers

527 and 529 in parallel, the wiring resistance value of the outer coils 60 can be reduced. Note that the number of first insulating layers forming the outer coil 60 can be three or more.

Further, the transformer 40A includes two inner coils 70 formed on the two first insulating

layers

527 and 529. The inner coils 70 of the first insulating

layers

527 and 529 are connected in parallel by vias 75 . By connecting the inner coils 70 formed on the first insulating

layers

527 and 529 in parallel, the wiring resistance value of the inner coils 70 can be reduced. Note that the number of first insulating layers forming the inner coil 70 can be three or more.

- The modified transformer 40B shown in FIGS. 8 and 9 includes an outer coil 60 and an outer coil 63 connected to the outer coil 60. The outer coil 63 is arranged so as to overlap the outer coil 60 when viewed from the z direction. The outer coil 63 includes

coil portions

631 and 632 formed in two first insulating

layers

527 and 529, respectively. The

coil portions

631 and 632 are connected in series between the outer coil 60 and the wiring portion 80 by vias 65 .

In the transformer 40B of this modification, an outer coil 63 is connected between the wiring section 80 and the outer coil 60. Therefore, the number of turns of the outer coil 60 can be increased. Thereby, the amount of magnetic flux generated by the outer coil 60 can be increased.

Note that the outer coils 63 (631, 632) formed on the two first insulating

layers

527, 529 may be connected in parallel. Further, the outer coil 60 may be formed in a plurality of first insulating layers and connected in parallel, as shown in FIG. 7 . By connecting the outer coil 60 and the outer coil 63 in parallel in this manner, it is possible to increase the number of turns and suppress an increase in the wiring resistance value.

In the modified transformer 40B shown in FIG. 8, the inner coil 70 is disposed on the first insulating layer 529. The first insulating layer on which the inner coil 70 is placed can be arbitrarily changed.
- The modified transformer 40C shown in FIG. 10 differs from the transformer 40B shown in FIG. The coil portion 631 is arranged so as not to overlap with the coil portion 631 when viewed from the z direction. By arranging the outer coil 60 and the

coil portions

631, 632 in this manner, the opposing area in the z direction is reduced, and the capacitance of the parasitic capacitor can be reduced.

- In the modified transformer 40D shown in FIG. 11, the inner coil 70 is arranged in a first insulating layer 525 different from the first insulating layer 527 in which the outer coil 60 is arranged. By arranging the inner coil 70 in this manner, the opposing area between the outer coil 60 and the inner coil 70 is reduced, and the capacitance of the parasitic capacitor can be reduced. Note that the inner coil 70 only needs to be arranged in a first insulating layer different from the first insulating layer 527 in which the outer coil 60 is arranged, and may be arranged in the first insulating layer 526, for example.

- The first embodiment described above is embodied in a signal transmission device that transmits signals using the transformer 40. On the other hand, the transformer 40 may be configured as a transmission device (power transmission device) that transmits power.

FIG. 12 is a circuit diagram illustrating an example of the configuration of a modified power transmission device 300. This power transmission device 300 includes a control circuit 301, an oscillator 302, a transformer 15 (40),

diodes

303, 304, 305, 306, and a smoothing capacitor 307. Control circuit 301, oscillator 302, transformer 15 (40), diodes 303 to 306, and smoothing capacitor 307 are sealed with sealing resin 28, similar to signal transmission device 10 of the first embodiment.

A DC power supply 311 is connected to the control circuit 301. Oscillator 302 is controlled by control circuit 301 and outputs an AC signal. This AC signal is transmitted by transformer 40. A DC voltage is supplied to the load 312 by diodes 303 to 306 and a smoothing capacitor 307. That is, this power transmission device 300 works as a DC voltage conversion circuit (DC-DC converter) that converts the voltage of the DC power supply 311 into the operating voltage of the load 312.

FIG. 13 is a circuit diagram showing an example of the configuration of a power transmission device according to a modification. This power transmission device 320 includes a control circuit 301, an oscillator 302, two transformers 40,

diodes

304 and 306, and a smoothing capacitor 307. A neutral point between the secondary coils 17 of the two transformers 40 is electrically connected to the secondary terminal 322B. A load 312 is connected to the

secondary terminals

322A and 322B. This power transmission device 320 works as a direct current voltage conversion circuit (DC-DC converter) that converts the voltage of the direct current power supply 311 into the operating voltage of the load 312.

- The shapes of the outer coil 60 and the inner coil 70 in plan view can be arbitrarily changed.
For example, the outer coil 60 and the inner coil 70 may be formed into a rectangular shape. Furthermore, the outer coil 60 and the inner coil 70 may be formed into a rectangular shape with rounded corners. Moreover, the outer coil 60 and the inner coil 70 may be formed in an elliptical shape.

- In the transformer 40 shown in FIG. 3, the wire W13B can also be configured to be directly connected to the outer coil 60. For example, the distance between the first end 60A of the outer coil 60 and the inner coil 70 (inner coil 70) is greater than or equal to the distance required for the dielectric strength of the transformer 40. Thereby, the wire W13B can be connected to the first end 60A of the outer coil 60.

- The relationship among the first shortest distances D11 and D21, the second shortest distance D80, and the thickness T53 of the second insulator 53 in the first embodiment is an example, and can be changed as appropriate.
(Second embodiment)
A second embodiment will be described with reference to the accompanying drawings. In addition, regarding the second embodiment, the same reference numerals are given to the same constituent members as in the first embodiment.

FIG. 14 is a circuit diagram schematically showing the configuration of a signal transmission device including a transformer according to the second embodiment. FIG. 15 is a schematic plan view schematically showing the signal transmission device of FIG. 14. The second embodiment is configured as a signal transmission device 110 including a transformer 115.

(Circuit configuration of signal transmission device)
As shown in FIG. 14, the signal transmission device 110 is a device that transmits a pulse signal while electrically insulating between the primary terminal 11 and the secondary terminal 12. Signal transmission device 110 is, for example, a digital isolator. The signal transmission device 110 includes a primary circuit 13 electrically connected to the primary terminal 11, a secondary circuit 14 electrically connected to the secondary terminal 12, and the primary circuit 13. A transformer 115 that electrically isolates the secondary circuit 14 is included.

The transformer 115 is connected between the transmitting circuit 13T and the receiving circuit 14R. Transformer 115 includes a primary coil 16 and a secondary coil 17. In the second embodiment, the secondary coil 17 includes a first coil 17A and a second coil 17B. The first coil 17A and the second coil 17B are electrically connected to each other. Thereby, the first coil 17A and the second coil 17B of the secondary coil 17 are connected in series to the receiving circuit 14R.

A control signal from, for example, a control device is input to the transmission circuit 13T of the primary side circuit 13 through the primary side terminal 11. The control signal is received by the receiving circuit 14R of the secondary circuit 14 from the transmitting circuit 13T of the primary circuit 13 via the transformer 115. The signal transmitted to the secondary circuit 14 is output from the secondary circuit 14 to the drive circuit through the secondary terminal 12.

As described above, in the signal transmission device 110, the primary side circuit 13 and the secondary side circuit 14 are electrically insulated by the transformer 115. More specifically, while the transformer 115 restricts the transmission of DC voltage between the primary circuit 13 and the secondary circuit 14, it allows the transmission of pulse signals.

The dielectric strength voltage of the signal transmission device 110 is, for example, 2500 Vrms or more and 7500 Vrms or less. The dielectric strength voltage of the signal transmission device 110 of the second embodiment is approximately 5700 Vrms. However, the specific value of the dielectric strength voltage of the signal transmission device 110 is not limited to this and is arbitrary.

(Configuration of signal transmission device)
As shown in FIG. 15, the signal transmission device 110 is a semiconductor device in which a plurality of semiconductor chips are packaged into one. Although not shown, the package format of the signal transmission device 110 is, for example, SO type, and in the second embodiment is SOP. Note that the package format of the signal transmission device 110 can be changed arbitrarily.

The signal transmission device 110 includes a first chip 31, a second chip 32, and a transformer 140 as semiconductor chips. The first chip 31 includes the primary side circuit 13 shown in FIG. The second chip 32 includes the secondary side circuit 14 shown in FIG. Transformer 140 includes transformer 115 (primary coil 16 and secondary coil 17) shown in FIG.

The signal transmission device 110 includes a first die pad 21 and a second die pad 22. Both the first die pad 21 and the second die pad 22 are formed into a flat plate shape. Both the first die pad 21 and the second die pad 22 are made of a conductive material. In the second embodiment, each die

pad

21, 22 is formed of a material containing Cu. Note that each die

pad

21, 22 may be formed of other metal materials such as Al. Moreover, the material constituting each die

pad

21, 22 is not limited to a conductive material. For example, each die

pad

21, 22 may be made of ceramic such as alumina. That is, each die

pad

21, 22 may be formed of a material having electrical insulation properties.

The first chip 31 and transformer 140 are mounted on the first die pad 21. The first chip 31 and the transformer 140 are bonded to the first die pad 21 by

bonding materials

25 and 26. The

bonding materials

25 and 26 are, for example, conductive bonding materials such as solder and Ag paste. Note that as the

bonding materials

25 and 26, an insulating bonding material such as epoxy resin may be used. The bonding material 25 of the first chip 31 and the bonding material 26 of the transformer 140 may be different types of bonding materials. The second chip 32 is mounted on the second die pad 22. The second chip 32 is bonded to the second die pad 22 by a bonding material 27. The bonding material 27 is, for example, a conductive bonding material such as solder or Ag paste. Note that as the bonding material 27, an insulating bonding material such as epoxy resin may be used.

The signal transmission device 110 includes a plurality of primary leads 23 and a plurality of secondary leads 24. FIG. 15 shows four primary leads 23A to 23D and four secondary leads 24A to 24D. The primary leads 23A and 23D are connected to the first die pad 21. The primary leads 23B and 23C are connected to the first chip 31 by primary wires W11A and W11B. The primary leads 23B and 23C are used for supplying operating voltage to the first chip 31, inputting signals, and the like. The primary lead 23B or the primary lead 23C is used as the primary terminal 11 shown in FIG. Further, the first chip 31 is connected to the first die pad 21 by a wire W12. The number, shape, connection state, etc. of the primary leads 23 can be changed as appropriate. Wires W11A, W11B, and W12 are bonding wires formed by a wire bonding device. The wires W11A, W11B, and W12 are made of a conductor such as Au, Al, or Cu.

The secondary leads 24A and 24D are connected to the second die pad 22. The secondary leads 24B and 24C are connected to the second chip 32 by secondary wires W17A and W17B. The secondary leads 24B and 24C are used for supplying operating voltage to the second chip 32, outputting signals, and the like. The secondary lead 24B or the secondary lead 24C is used as the secondary terminal 12 shown in FIG. 14. Further, the second chip 32 is connected to the second die pad 22 by a wire W16. The number, shape, connection state, etc. of the secondary leads 24 can be changed as appropriate. Wires W16, W17A, and W17B are bonding wires formed by a wire bonding device. The wires W16, W17A, and W17B are made of a conductor such as Au, Al, or Cu.

The first chip 31 is connected to the transformer 140 by wires W13A and W13B. The transformer 140 is connected to the second chip 32 by wires W15A and W15B. A wire W14 serving as a connecting member is connected to the transformer 140. Wires W13A, W13B, W14, W15A, and W15B are bonding wires formed by a wire bonding device. The wires W13A, W13B, W14, W15A, and W15B are made of a conductor such as Au, Al, or Cu.

The signal transmission device 110 further includes a sealing resin 28. The sealing resin 28 seals a portion of each die

pad

21, 22, each

chip

31, 32, a transformer 140, and each lead 23, 24. The sealing resin 28 is made of an electrically insulating material. A black epoxy resin is used as an example of such a material. The sealing resin 28 is formed into a rectangular plate shape with the thickness direction in the z direction.

As described above, in the second embodiment, the transformer 140 is mounted on the first die pad 21. That is, both the transformer 140 and the first chip 31 are mounted on the first die pad 21. The transformer 140 and the first chip 31 are spaced apart from each other in the x direction on the first die pad 21 . Therefore, it can be said that the first chip 31, the transformer 140, and the second chip 32 are arranged apart from each other in the x direction. In the second embodiment, the first chip 31, the transformer 140, and the second chip 32 are arranged in this order. In other words, the transformer 140 is arranged between the first chip 31 and the second chip 32 in the x direction.

In order to set the dielectric strength voltage of the signal transmission device 110 to a preset dielectric strength voltage, it is necessary to separate the first die pad 21 and the second die pad 22 from each other. In the second embodiment, in plan view, the distance between the first die pad 21 and the second die pad 22 in the x direction is larger than the distance between the first chip 31 and the transformer 140 in the x direction. Therefore, the distance between the first chip 31 and the transformer 140 is smaller than the distance between the transformer 140 and the second chip 32 in the x direction. In other words, the transformer 140 is placed closer to the first chip 31 than the second chip 32.

(Schematic configuration of transformer)
An example of the internal structure of the transformer 140 of the second embodiment will be described with reference to FIGS. 16 to 18.

FIG. 16 is a schematic plan view of the transformer 140. 17 is a sectional view taken along the line F17-F17 in FIG. 16, and FIG. 18 is a sectional view taken along the line F18-F18 in FIG. In FIG. 16, the outer coil 60 and the inner coil 70 are shown in solid lines for easy understanding.

As shown in FIG. 16, the transformer 140 is a transformer chip that includes an outer coil 60 and an inner coil 70. The primary coil 16 shown in FIG. 14 includes an outer coil 60. The secondary coil 17 shown in FIG. 14 includes an inner coil 70. As shown in FIG. 14, the secondary coil 17 includes a first coil 17A and a second coil 17B. The inner coil 70 includes a first inner coil 71 that functions as the first coil 17A, and a second inner coil 72 that functions as the second coil 17B.

As shown in FIGS. 16 to 18, the transformer 140 includes a chip main surface 141 and a chip back surface 142 facing away from the chip main surface 141. Further, the transformer 140 includes four chip side surfaces 143, 144, 145, and 146 perpendicular to both the chip main surface 141 and the chip back surface 142. The chip side surfaces 143 and 144 constitute both end surfaces of the transformer 140 in the x direction. The chip side surfaces 145 and 146 constitute both end surfaces of the transformer 140 in the y direction.

As shown in FIGS. 17 and 18, the transformer 140 includes a substrate 51, a first insulator 52 disposed on the substrate 51, and a second insulator 53 disposed below the substrate 51. include.
(substrate)
The substrate 51 has a substrate upper surface 51S and a substrate lower surface 51R facing oppositely to each other in the z direction. The substrate 51 is made of, for example, a semiconductor substrate. In the second embodiment, the substrate 51 is a substrate made of a material containing Si. Examples of the Si substrate used for the substrate 51 include a semiconductor substrate made of a single-crystal intrinsic semiconductor material, a p-type semiconductor substrate containing acceptor-type impurities, and an n-type semiconductor substrate containing donor-type impurities.

Note that the substrate 51 may be made of a wide bandgap semiconductor or a compound semiconductor as a semiconductor substrate. Furthermore, instead of the semiconductor substrate, the substrate 51 may be an insulating substrate made of a material containing glass. A wide band gap semiconductor is a semiconductor substrate having a band gap of 2.0 eV or more. The wide bandgap semiconductor may be SiC, _GaN , _Ga2O3 , etc. The compound semiconductor may be a III-V compound semiconductor. The compound semiconductor may include at least one of AlN, InN, GaN, and GaAs.

(first insulator)
The first insulator 52 is formed on the substrate 51. The first insulator 52 is in contact with the top surface 51S of the substrate 51. The first insulator 52 includes a lower surface 52R in contact with the substrate 51 and an upper surface 52S on the opposite side of the lower surface 52R. The upper surface 52S of the first insulator 52 constitutes a chip main surface 141 of the transformer 140.

The first insulator 52 of the second embodiment includes an uppermost insulating layer 52U and insulating layers 521 to 527 between the uppermost insulating layer 52U and the substrate 51. The insulating layers 521 to 527, 52U are laminated in the z direction from the top surface 51S of the substrate 51. Therefore, it can be said that the z direction is the thickness direction of the first insulator 52. Further, the z direction can also be said to be the lamination direction of the plurality of insulating layers 521 to 527, 52U included in the first insulator 52.

The lowermost insulating layer 521 is in contact with the upper substrate surface 51S of the substrate 51. The upper surface of the uppermost insulating layer 52U constitutes a chip main surface 141 of the transformer 140. In the following description, the uppermost insulating layer 52U of the plurality of insulating layers 521 to 527, 52U will be referred to as the second insulating layer 52U, and the insulating layers 521 to 527 excluding the second insulating layer 52U will be referred to as the first insulating layer. May be shown as 521-527.

The first insulating layers 521 to 527 are made of, for example, a material containing Si. As the material containing Si, SiO ₂ , SiN, SiC, SiCN, etc. can be used. Note that at least one of the first insulating layers 521 to 527 may be made of a different material. Furthermore, at least one of the first insulating layers 521 to 527 may be formed by laminating a plurality of films. The first insulating layers 521 to 527 may be composed of a thin film made of a material containing SiN, SiC, SiCN, etc., and an interlayer insulating film made of a material containing SiO ₂ .

The second insulating layer 52U is made of, for example, a material containing resin having electrical insulation properties. The second insulating layer 52U is formed of, for example, a passivation film including a nitride film and a resin film having electrical insulation properties. The nitride film includes materials such as Si ₃ N ₄ , SiN, and SiCN, for example. The resin film contains, for example, polyimide. Note that the second insulating layer 52U may be formed of a material containing Si, similar to the first insulating layers 521 to 527.

(Second insulator)
The second insulator 53 is formed under the substrate 51. The second insulator 53 is in contact with the lower surface 51R of the substrate 51. The second insulator 53 includes an upper surface 53S in contact with the substrate lower surface 51R of the substrate 51, and a lower surface 53R on the opposite side to the upper surface 53S. The lower surface 53R of the second insulator 53 constitutes a chip back surface 142 of the transformer 140.

The second insulator 53 of the first embodiment includes a plurality of insulating layers 531 to 534. The plurality of insulating layers 531 to 534 are stacked in the z direction from the bottom surface 51R of the substrate 51. Therefore, it can be said that the z direction is the thickness direction of the second insulator 53. Further, the z direction can also be said to be the lamination direction of the plurality of insulating layers 531 to 534 included in the second insulator 53. The uppermost insulating layer 531 is in contact with the lower substrate surface 51R of the substrate 51. The lower surface of the lowermost insulating layer 534 constitutes a chip back surface 142 of the transformer 140.

(outer coil and inner coil)
As shown in FIGS. 16-18, transformer 140 includes an outer coil 60 and an inner coil 70. As shown in FIG. 17, outer coil 60 and inner coil 70 are embedded in first insulator 52.

(outer coil)
As shown in FIG. 16, the outer coil 60 includes a first outer coil 61 and a second outer coil 62. The first outer coil 61 includes a first end 61A and a second end 61B opposite to the first end 61A. The second outer coil 62 includes a first end 62A and a second end 62B opposite to the first end 62A. The second end 61B of the first outer coil 61 and the second end 62B of the second outer coil 62 are electrically connected to each other.

The first outer coil 61 and the second outer coil 62 are each formed in a circular spiral shape in plan view. The first outer coil 61 and the second outer coil 62 are connected to each other when a current flows from a first end of one of the first outer coil 61 and second outer coil 62 to a first end of the other outer coil. They are wound so that magnetic fluxes are generated in opposite directions. In the transformer 140 of the second embodiment, the first outer coil 61 and the second outer coil 62 have a symmetrical shape, and are formed in a point symmetrical shape.

In the spiral-shaped first outer coil 61, the first end 61A is arranged inside the spiral, and the second end 61B is arranged outside the spiral. That is, the first outer coil 61 is wound in a spiral shape with the first end 61A as the inner end and the second end 61B as the outer end. Similarly, in the spiral second outer coil 62, the first end 62A is located inside the spiral, and the second end 62B is located outside the spiral. In other words, the second outer coil 62 is wound in a spiral shape, with the first end 62A being the inner end and the second end 62B being the outer end. The first outer coil 61 and the second outer coil 62 are electrically connected to each other at second ends 61B and 62B, which are the respective outer peripheral edge portions.

As shown in FIGS. 17 and 18, both the first outer coil 61 and the second outer coil 62 of the outer coil 60 have a first insulating layer 527 which is the uppermost layer among the plurality of first insulating layers 521 to 527. It is set in. That is, the outer coil 60 (first outer coil 61, second outer coil 62) is arranged closer to the upper surface 52S of the first insulator 52. The outer coil 60 is formed of a material containing one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W. The outer coil 60 of the second embodiment is made of a material containing Al.

(inner coil)
Inner coil 70 includes a first inner coil 71 and a second inner coil 72. The first inner coil 71 includes a first end 71A and a second end 71B opposite to the first end 71A. The second inner coil 72 includes a first end 72A and a second end 72B opposite to the first end 71A. The first inner coil 71 is arranged inside the first outer coil 61. The first inner coil 71 is arranged so as not to overlap the first outer coil 61 in plan view. The second inner coil 72 is arranged inside the second outer coil 62. The second inner coil 72 is arranged so as not to overlap the second outer coil 62 in plan view.

The first inner coil 71 and the second inner coil 72 are each formed in a circular spiral shape in plan view. In the transformer 140 of the second embodiment, the first inner coil 71 and the second inner coil 72 have a symmetrical shape, and are formed in a point symmetrical shape.

In the spiral-shaped first inner coil 71, the first end 71A is arranged inside the spiral, and the second end 71B is arranged outside the spiral. That is, the first inner coil 71 is wound in a spiral shape with the first end 71A as the inner end and the second end 71B as the outer end. Similarly, in the spiral second inner coil 72, the first end 72A is located inside the spiral, and the second end 72B is located outside the spiral. In other words, the second inner coil 72 is wound in a spiral shape with the first end 72A as the inner end and the second end 72B as the outer end. Note that the first inner coil 71 and the second inner coil 72 may have first ends 71A, 72A as outer circumferential ends, and second ends 71B, 72B as inner circumferential ends.

As shown in FIG. 17, both the first inner coil 71 and the second inner coil 72 of the inner coil 70 are provided on the first insulating layer 527, which is the uppermost layer among the plurality of first insulating layers 521 to 527. ing. That is, the inner coil 70 (first inner coil 71, second inner coil 72) is arranged closer to the upper surface 52S of the first insulator 52. The first inner coil 71 and the second inner coil 72 are formed of a material containing one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W. The inner coil 70 of the second embodiment is made of a material containing Al.

(Wiring section)
As shown in FIGS. 16 and 18, the transformer 140 includes a first wiring section 80 and a second wiring section 90. The first wiring section 80 and the second wiring section 90 are electrically connected to the outer coil 60. The first wiring portion 80 is electrically connected to the first end 61A of the first outer coil 61 of the outer coil 60. The second wiring section 90 is electrically connected to the first end 62A of the second outer coil 62 of the outer coil 60.

As shown in FIGS. 16 and 18, the first wiring section 80 includes a connection wiring 81, vias 82 and 83, and a terminal section 84. The first wiring section 80 is formed of a material containing one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W.

The terminal portion 84 is arranged near the chip side surface 143. In the transformer 140 of the second embodiment, the terminal portion 84 is arranged at the same position in the y direction as the first end 61A of the first outer coil 61 in plan view. Note that the arrangement position of the terminal portion 84 may be changed arbitrarily.

As shown in FIG. 18, the connection wiring 81 is arranged below the first outer coil 61. In the second embodiment, the connection wiring 81 is provided in the first insulating layer 525 two layers below the first insulating layer 527 on which the first outer coil 61 is provided. The connection wiring 81 is formed to extend from the first end 81A connected to the first outer coil 61 toward the chip side surface 143. The connection wiring 81 extends from the first end 61A of the first outer coil 61 to the terminal portion 84 in plan view. The first end 81A of the connection wiring 81 is electrically connected to the first end 61A of the first outer coil 61 via the via 82. The second end 81B of the connection wiring 81 is electrically connected to the terminal portion 84 via the via 83.

As shown in FIG. 16, the second wiring section 90 includes a connection wiring 91, vias 92 and 93, and a terminal section 94. The second wiring section 90 is formed of a material containing one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W. The connection wiring 91, vias 92, 93, and terminal portion 94 of the second wiring portion 90 are arranged in the same manner as the connection wiring 81, vias 82, 83, and terminal portion 84 of the first wiring portion 80. The first end 91A of the connection wiring 91 is electrically connected to the first end 62A of the second outer coil 62 through the via 92, and the second end 91B of the connection wiring 91 is electrically connected to the terminal portion 94 through the via 93. It is connected.

(Wire connection to outer coil and wiring section)
As shown in FIGS. 16 and 18, the second insulating layer 52U includes openings 52U1 and 52U2 that expose portions of the first wiring section 80 and the second wiring section 90, respectively. The openings 52U1 and 52U2 are formed to expose the

terminal parts

84 and 94 of the first wiring part 80 and the second wiring part 90. Wires W13A and W13B are connected to the

terminal portions

84 and 94 exposed through the openings 52U1 and 52U2. In other words, the

terminal portions

84 and 94 exposed through the openings 52U1 and 52U2 can be said to be connection pads for connecting the wires W13A and W13B. As shown in FIG. 15, wires W13A and W13B are connected to the first chip 31. Therefore, the

terminal portions

84 and 94 exposed through the openings 52U1 and 52U2 can also be called connection pads that connect the transformer 140 to the first chip 31.

(Wire connection to inner coil)
As shown in FIG. 17, the second insulating layer 52U includes a plurality of openings 52U3, 52U4, 52U5, and 52U6 that expose a portion of the inner coil 70. The opening 52U3 is formed to expose the first end 71A of the first inner coil 71. The opening 52U4 is formed to expose the second end 71B of the first inner coil 71. The opening 52U5 is formed to expose the first end 72A of the second inner coil 72. The opening 52U6 is formed to expose the second end 72B of the second inner coil 72.

In the transformer 140 of the second embodiment, the wire W15A is connected to the second end 71B of the first inner coil 71 exposed through the opening 52U4. The first end W14A of the wire W14 is connected to the first end 71A of the first inner coil 71 exposed by the opening 52U3, and the second end W14B of the wire W14 is connected to the second inner coil 72 exposed by the opening 52U5. is connected to the first end 72A of. A wire W15B is connected to the second end 72B of the second inner coil 72 exposed through the opening 52U6. That is, it can be said that the first ends 71A, 72A exposed through the openings 52U3, 52U5 and the second ends 71B, 72B exposed through the openings 52U4, 52U6 are connection pads that connect the wires W14, W15A, W15B.

The outer coil 60 and the inner coil 70 are electrically insulated from each other and configured to be magnetically coupled. The transformer 140 of the second embodiment is configured such that the outer coil 60 and the inner coil 70 can be magnetically coupled along a plane parallel to the top surface 51S of the substrate 51.

The first inner coil 71 of the inner coil 70 is arranged inside the first outer coil 61 of the outer coil 60. Therefore, a current flows in the first inner coil 71 in a direction that corresponds to the direction of the magnetic flux generated by the current flowing in the first outer coil 61. Similarly, the second inner coil 72 of the inner coil 70 is arranged inside the second outer coil 62 of the outer coil 60. Therefore, a current flows in the second inner coil 72 in a direction that corresponds to the direction of the magnetic flux generated by the current flowing in the second outer coil 62.

The wire W14 connects the first inner coil 71 and the second inner coil 72. Therefore, the wire W14 is connected so that the current flowing through the first inner coil 71 and the current flowing through the second inner coil 72 are taken out by the wires W15A and W15B. In one example, when the current generated in the first inner coil 71 flows through the wire W14 to the second inner coil 72, the direction of the current is the same as the direction of the current generated in the second inner coil 72. connected like this.

A wire W15A is connected to the second end 71B of the first inner coil 71 exposed through the opening 52U4. Further, a wire W15B is connected to the second end 72B of the second inner coil 72 exposed through the opening 52U6. These wires W15A and W15B are connected to the second chip 32, as shown in FIG. Therefore, the second ends 71B and 72B exposed through the openings 52U4 and 52U6 can also be called connection pads that connect the transformer 140 to the second chip 32.

As shown in FIG. 17, the outer coil 60 includes a first outer coil 61 and a second outer coil 62. The first outer coil 61 and the second outer coil 62 are formed on the same first insulating layer 527 among the first insulating layers 521 to 527 stacked on the substrate 51. Therefore, the distance D61 from the substrate 51 to the first outer coil 61 is equal to the distance D62 from the substrate 51 to the second outer coil 62.

The inner coil 70 includes a first inner coil 71 and a second inner coil 72. The first inner coil 71 and the second inner coil 72 are formed on the same first insulating layer 527 among the first insulating layers 521 to 527 stacked on the substrate 51. Therefore, the distance D71 from the substrate 51 to the first inner coil 71 is equal to the distance D72 from the substrate 51 to the second inner coil 72.

The first inner coil 71 and the second inner coil 72 are arranged at the same position as the first outer coil 61 and the second outer coil 62 in the z direction. Therefore, the distances D71 and D72 from the substrate 51 to the first inner coil 71 and the second inner coil 72 are equal to the distances D61 and D62 from the substrate 51 to the first outer coil 61 and the second outer coil 62.

Connection wires

81 and 91 of the first wiring section 80 and the second wiring section 90 connected to the outer coil 60 are arranged on the first insulating layer 525 under the outer coil 60. Therefore, the distance D80 from the board 51 to the connection wiring 81 is the distance D61, D62 from the board 51 to the first outer coil 61 and the second outer coil 62, and the distance D62 is from the board 51 to the first inner coil 71 and the second inner coil 72. is smaller than the distances D71 and D72. Further, the distance D90 from the substrate 51 to the connection wiring 91 is smaller than the distances D61, D62, D71, and D72. The distance D80 is the shortest distance between the first outer coil 61 and the first inner coil 71 to the substrate 51 in the z direction. The distance D90 is the shortest distance between the second outer coil 62 and the second inner coil 72 to the substrate 51 in the z direction.

The distances D11 and D12 between the first outer coil 61 and the first inner coil 71 are equal to each other. The distances D11 and D12 are the first shortest distances between the first outer coil 61 and the first inner coil 71. The distances D21 and D22 between the second outer coil 62 and the second inner coil 72 are equal to each other. The distances D21 and D22 are the second shortest distances between the second outer coil 62 and the second inner coil 72. The distances D11 and D12 between the first outer coil 61 and the first inner coil 71 and the distances D21 and D22 between the second outer coil 62 and the second inner coil 72 are equal to each other.

(effect)
The operation of the transformer 140 in the signal transmission device 110 of the second embodiment will be explained.
Each distance D11, D12, D21, D22, D80, and D90 from the substrate 51 affects the dielectric strength voltage of the transformer 140. In the second embodiment, as shown in FIGS. 14 and 15, the outer coil 60 (primary coil 16) is electrically connected to the first chip 31 including the primary circuit 13. . Both the first chip 31 and the transformer 140 are mounted on the first die pad 21. Therefore, the common voltage of the substrate 51 of the transformer 140 and the primary circuit 13 of the first chip 31 is the same.

The outer coil 60 (first outer coil 61 and second outer coil 62) of the transformer 140 is connected to the first chip 31. Therefore, the common voltage of the outer coil 60 (the first outer coil 61 and the second outer coil 62) is the same as the common voltage of the primary circuit 13 of the first chip 31. In this case, the dielectric strength of the transformer 140 is determined by the shortest distance between the outer coil 60 and the inner coil 70 (first shortest distance, second shortest distance) and the shortest thickness between the outer coil 60 and the substrate 51. It is determined. The shortest distance can be adjusted by the shapes of the outer coil 60 and the inner coil 70, that is, the layout design of the transformer 140. That is, the dielectric strength of the transformer 140 can be adjusted by designing the layout of the transformer 140. Therefore, the dielectric strength of the transformer 140 can be easily changed.

Here, as a comparative example for the transformer 140 of the second embodiment, a comparative example transformer 40X shown in FIG. 6 will be used.
The transformer 40X of the comparative example is mounted on the first die pad 21 shown in FIG. 15. In this case, the primary coil 16X is arranged closer to the substrate 51 than the secondary coil 17X. In the transformer 40X of this comparative example, a parasitic capacitor C1X is generated between the primary coil 16X and the substrate 51. This parasitic capacitor C1X has a capacitance value that corresponds to the distance D1X between the substrate 51 and the primary coil 16X and the opposing area of the primary coil 16X. Further, in the comparative example transformer 40X, a parasitic capacitor C2X is generated between the primary coil 16X and the secondary coil 17X. This parasitic capacitor C2X has a capacitance value that corresponds to the distance D2X between the primary coil 16X and the secondary coil 17X and the opposing area of the primary coil 16X and the secondary coil 17X.

Then, when a current flows through the primary coil 16X, a magnetic flux M1X is generated. This magnetic flux M1X tends to spread around the primary coil 16X. Therefore, when the primary coil 16X and the secondary coil 17X are magnetically coupled, the magnetic flux M1X is generated so as to penetrate the substrate 51 in the thickness direction. As a result, an eddy current I1X is generated in the substrate 51. Such an eddy current I1X causes a loss to the magnetic flux M1X. Such losses affect the efficiency of magnetic coupling.

In order to improve the magnetic coupling between the primary coil 16X and the secondary coil 17X (increase the amount of magnetic flux), it is possible to reduce the wiring resistance values of the primary coil 16X and the secondary coil 17X. Conceivable. For example, the wiring resistance value can be reduced by widening the wiring width of the primary coil 16X and the secondary coil 17X. However, when the wiring width is increased, the opposing area between the substrate 51 and the primary coil 16X increases, and the capacitance value of the parasitic capacitor C1X increases. Similarly, the opposing area between the primary coil 16X and the secondary coil 17X increases, and the capacitance value of the parasitic capacitor C2X increases. Increasing the wiring thickness of the primary coil 16X and the secondary coil 17X affects the thickness of the first insulator 52 in which the primary coil 16X and the secondary coil 17X are embedded, that is, the manufacturing process. , the distance between the substrate 51 and the primary coil 16X, and the distance between the primary coil 16X and the secondary coil 17X, that is, the dielectric strength of the transformer 140. In order to obtain a dielectric strength voltage higher than a certain value, it is necessary to thicken the first insulator 52, that is, increase the number of insulating layers constituting the first insulator 52, which affects the manufacturing process of the transformer 140.

As shown in FIGS. 16 and 19, the transformer 140 of the second embodiment includes an outer coil 60, and the outer coil 60 includes both a first outer coil 61 and a second outer coil 62. The first outer coil 61 and the second outer coil 62 have second ends 61B and 62B electrically connected to each other. The first outer coil 61 and the second outer coil 62 generate magnetic fluxes in opposite directions when current flows from the first end 61A of the first outer coil 61 to the first end 62A of the second outer coil 62. It is rolled up like this. For example, as shown in FIG. 19, an upward magnetic flux is generated in the first outer coil 61, and a downward magnetic flux is generated in the second outer coil 62. Thereby, the magnetic flux M1 generated by the outer coil 60 becomes a smaller loop than that of the comparative example transformer 40X. Therefore, the magnetic flux crossing the inner coil 70 is larger than that of the comparative example transformer 40X. Therefore, the efficiency of magnetic coupling between the outer coil 60 and the inner coil 70 can be improved. As a result, the transfer characteristics between the outer coil 60 and the inner coil 70 of the transformer 140 can be improved.

As shown in FIG. 19, the magnetic flux M1 generated by the outer coil 60 forms a smaller loop than the transformer 40X of the comparative example. The magnetic flux generated in this manner passes through the substrate 51 along the substrate upper surface 51S of the substrate 51. Therefore, compared to the transformer 40X of the comparative example, eddy currents are less likely to occur in the substrate 51. Therefore, in the transformer 140 of the second embodiment, loss with respect to the magnetic flux M1 can be reduced. In addition, the influence on the efficiency of magnetic coupling in the transformer 140 can be reduced. As a result, the transfer characteristics between the outer coil 60 and the inner coil 70 of the transformer 140 can be improved.

The outer coil 60 and the inner coil 70 face each other in the x direction and the y direction. Therefore, even if the wiring width is increased, the facing area of the outer coil 60 and the inner coil 70 does not change. That is, the capacitance values of the parasitic capacitors C11, C12, C21, and C22 between the outer coil 60 and the inner coil 70 do not change. That is, compared to the transformer 40X of the comparative example, the wiring resistance value can be reduced without increasing the capacitance values of the parasitic capacitors C11, C12, C21, and C22 between the coils. As a result, current flows more easily in the outer coil 60 and inner coil 70 of the transformer 140, so that the amount of magnetic flux generated in the transformer 140 can be increased. In the transformer 140, it is possible to improve the efficiency of magnetic coupling between the outer coil 60 and the inner coil 70, and thus to improve the transfer characteristics.

The capacitance value of the parasitic capacitor C60 between the substrate 51 and the outer coil 60 depends on the distance from the substrate 51 to the outer coil 60, assuming that the wiring width is constant. As the distance increases, the capacitance value decreases. When the first insulator 52 has the same thickness as the transformer 40X of the comparative example, in the transformer 140 of the second embodiment, the distances D61 and D62 from the substrate 51 to the outer coil 60, and the distance from the substrate 51 to the inner coil 70. D71 and D72 are larger than the transformer 40X of the comparative example. Therefore, the capacitance values of parasitic capacitors C60 and C70 can be reduced. If the capacitance values of the parasitic capacitors C60 and C70 are the same as that of the transformer 40X of the comparative example, the first insulator 52 can be made thinner, that is, the transformer 140 can be made thinner.

(effect)
As described above, the transformer 140 of the second embodiment provides the following effects.
(2-1) Effects similar to effects (1-1) to (1-4) in the transformer 40 of the first embodiment are achieved.

(2-2) The transformer 140 of the second embodiment includes an outer coil 60, and the outer coil 60 includes both a first outer coil 61 and a second outer coil 62. The first outer coil 61 and the second outer coil 62 have second ends 61B and 62B electrically connected to each other. The first outer coil 61 and the second outer coil 62 generate magnetic fluxes in opposite directions when current flows from the first end 61A of the first outer coil 61 to the first end 62A of the second outer coil 62. It is rolled up like this. Thereby, the magnetic flux M1 generated by the outer coil 60 becomes a smaller loop than that of the comparative example transformer 40X. Therefore, the magnetic flux crossing the inner coil 70 is larger than that of the comparative example transformer 40X. Therefore, the efficiency of magnetic coupling between the outer coil 60 and the inner coil 70 can be improved. As a result, the transfer characteristics between the outer coil 60 and the inner coil 70 of the transformer 140 can be improved.

(2-3) The magnetic flux M1 generated by the outer coil 60 forms a smaller loop than the transformer 40X of the comparative example. The magnetic flux generated in this manner passes through the substrate 51 along the substrate upper surface 51S of the substrate 51. Therefore, compared to the transformer 40X of the comparative example, eddy currents are less likely to occur in the substrate 51. Therefore, in the transformer 140 of the second embodiment, loss with respect to the magnetic flux M1 can be reduced. In addition, the influence on the efficiency of magnetic coupling in the transformer 140 can be reduced. As a result, the transfer characteristics between the outer coil 60 and the inner coil 70 of the transformer 140 can be improved.

(2-4) The wiring resistance values of the outer coil 60 and the inner coil 70 affect the amount of current flowing through the outer coil 60 and the inner coil 70, respectively, and the degree of magnetic coupling. The wiring resistance value of the outer coil 60 is obtained by widening the wiring width of the outer coil 60 and decreasing the aspect ratio of the wiring thickness to the wiring width. Similarly, the wiring resistance value of the inner coil 70 can be obtained by widening the wiring width of the inner coil 70 and decreasing the aspect ratio of the wiring thickness to the wiring width.

(2-5) The outer coil 60 and the inner coil 70 face each other in the x direction and the y direction. Therefore, even if the wiring width is increased, the facing area of the outer coil 60 and the inner coil 70 does not change. That is, the capacitance values of the parasitic capacitors C11, C12, C21, and C22 between the outer coil 60 and the inner coil 70 do not change. That is, compared to the transformer 40X of the comparative example, the wiring resistance value can be reduced without increasing the capacitance values of the parasitic capacitors C11, C12, C21, and C22 between the coils. As a result, current flows more easily in the outer coil 60 and inner coil 70 of the transformer 140, so that the amount of magnetic flux generated in the transformer 140 can be increased. In the transformer 140, it is possible to improve the efficiency of magnetic coupling between the outer coil 60 and the inner coil 70, and thus to improve the transfer characteristics.

(2-6) The capacitance value of the parasitic capacitor C60 between the substrate 51 and the outer coil 60 depends on the distance from the substrate 51 to the outer coil 60, assuming that the wiring width is constant. As the distance increases, the capacitance value decreases. When the first insulator 52 has the same thickness as the transformer 40X of the comparative example, in the transformer 140 of the second embodiment, the distances D61 and D62 from the substrate 51 to the outer coil 60, and the distance from the substrate 51 to the inner coil 70. D71 and D72 are larger than the transformer 40X of the comparative example. Therefore, the capacitance values of parasitic capacitors C60 and C70 can be reduced. If the capacitance values of the parasitic capacitors C60 and C70 are the same as that of the transformer 40X of the comparative example, the first insulator 52 can be made thinner, that is, the transformer 140 can be made thinner.

(2-7) Each distance D11, D12, D21, D22, D80, and D90 from the substrate 51 affects the dielectric strength voltage of the transformer 140. In the second embodiment, as shown in FIGS. 14 and 15, the outer coil 60 (primary coil 16) is electrically connected to the first chip 31 including the primary circuit 13. . Both the first chip 31 and the transformer 140 are mounted on the first die pad 21. Therefore, the common voltage of the substrate 51 of the transformer 140 and the primary circuit 13 of the first chip 31 is the same.

(2-8) In the signal transmission device 110 including the transformer 140 of the second embodiment, the signal of the primary side circuit 13 (transmission circuit 13T) is efficiently transmitted to the secondary side circuit 14 (reception circuit 14R). be able to.

(Example of modification of second embodiment)
The second embodiment described above can be modified as follows, for example. The second embodiment and each of the following modified examples can be combined with each other as long as no technical contradiction occurs. In addition, in the following modified example, the same parts as in the second embodiment are given the same reference numerals as in the second embodiment, and the explanation thereof will be omitted.

- In the modified transformer 140A shown in FIG. 20, the outer coil 60 includes a first outer coil 61 and a second outer coil 62 formed on two first insulating

layers

527 and 529. The first outer coils 61 of the first insulating

layers

527 and 529 are connected in parallel by vias 65 . The second outer coils 62 of the first insulating

layers

527 and 529 are connected in parallel by vias 66 . Note that the number of first insulating layers forming the first outer coil 61 and the second outer coil 62 can be three or more. By connecting the first outer coil 61 and the second outer coil 62 formed in the first insulating

layers

527 and 529 in parallel, the wiring resistance value of the outer coil 60 can be reduced.

The inner coil 70 includes a first inner coil 71 and a second inner coil 72 formed on two first insulating

layers

527 and 529. The first inner coil 71 and the second inner coil 72 of the first insulating

layers

527 and 529 are connected in parallel by a via 75. Note that the number of first insulating layers forming the first inner coil 71 and the second inner coil 72 can be three or more. By connecting the first inner coil 71 and the second inner coil 72 formed in the first insulating

layers

527 and 529 in parallel, the wiring resistance value of the inner coil 70 can be reduced.

- In the modified transformer 140B shown in FIGS. 21 and 22, the outer coil 60 includes a first outer coil 61, a second outer coil 62, a third outer coil 63 connected to the first outer coil 61, and a fourth outer coil 64 connected to the second outer coil 62.

The third outer coil 63 is arranged so as to overlap the first outer coil 61 when viewed from the z direction. The third outer coil 63 includes

coil portions

631 and 632 formed in the two first insulating

layers

527 and 529, respectively. The

coil portions

631 and 632 are connected in series between the first end 61A of the first outer coil 61 and the first wiring portion 80.

The fourth outer coil 64 is arranged so as to overlap the second outer coil 62 when viewed from the z direction. The fourth outer coil 64 includes

coil portions

641 and 642 formed in the two first insulating

layers

527 and 529, respectively. The

coil portions

641 and 642 are connected in series between the first end 62A of the second outer coil 62 and the second wiring portion 90.

In the transformer 140B of this modification, the third outer coil 63 and the first outer coil 61 are connected in series between the first wiring section 80 and the second outer coil 62. Further, a second outer coil 62 and a fourth outer coil 64 are connected in series between the first outer coil 61 and the second wiring section 90. Therefore, the number of turns of the outer coil 60 disposed outside each of the first inner coil 71 and the second inner coil 72 can be increased. Thereby, the amount of magnetic flux generated by the outer coil 60 can be increased.

Note that the third outer coils 63 (631, 632) formed on the two first insulating

layers

527, 529 may be connected in parallel. Similarly, the fourth outer coils 64 (641, 642) formed on the two first insulating

layers

527, 529 may be connected in parallel. Further, the first outer coil 61 and the second outer coil 62 may be formed in a plurality of first insulating layers and connected in parallel, as shown in FIG. 20. By connecting the third outer coil 63 and the fourth outer coil 64 in parallel in this way, it is possible to increase the number of turns of the outer coil 60 and to suppress an increase in the wiring resistance value.

In the modified transformer 140B shown in FIG. 21, the inner coil 70 (first inner coil 71 and second inner coil 72) is arranged in the first insulating layer 529. The first insulating layer on which the inner coil 70 is placed can be arbitrarily changed.

- The modified transformer 140C shown in FIG. 23 is different from the transformer 140B shown in FIG. It is arranged so as not to overlap with the coil portion 631 arranged on the first insulating layer 527 when viewed from the z direction. By arranging the first outer coil 61 and the third outer coil 63 in this manner, the opposing area in the z direction is reduced, and the capacitance of the parasitic capacitor can be reduced. Similarly, in the fourth outer coil 64, by arranging the coil portion 642 so as not to overlap the second outer coil 62 and the coil portion 641 in plan view, the opposing area in the z direction is reduced, and the parasitic capacitor is reduced. Capacity can be reduced.

- In the transformer 140D of the modified example shown in FIG. The first insulating layer 526 is different from the first insulating layer 528 . By arranging the inner coil 70 in this manner, the opposing area between the outer coil 60 and the inner coil 70 is reduced, and the capacitance of the parasitic capacitor can be reduced. Note that the first inner coil 71 and the second inner coil 72 of the inner coil 70 may be disposed in a first insulating layer different from the first insulating layer 528 in which the outer coil 60 is disposed, for example, in the first insulating layer 528. 527.

- FIG. 25 is a circuit diagram schematically showing the configuration of the signal transmission device 110A as a modified example. FIG. 26 is a schematic plan view of the signal transmission device 110A of FIG. 25.
The signal transmission device 110A of this modification differs from the signal transmission device 110 of the second embodiment in the configuration of the receiving circuit 14RA of the secondary circuit 14A. Corresponding to the receiving circuit 14RA, as shown in FIG. 26, the connection between the transformer 140 and the second chip 32A is different.

In this modification, a wire W18A is connected to the first end 71A (see FIG. 16) of the first inner coil 71 exposed through the opening 52U3. Further, a wire W18B is connected to the first end 72A (see FIG. 16) of the second inner coil 72 exposed through the opening 52U5. These wires W18A and W18B are connected to the second chip 32A. Therefore, the first ends 71A and 72A exposed through the openings 52U3 and 52U5 can also be called connection pads that connect the transformer 140 to the second chip 32A.

In this way, the transformer 140 includes second chips 32 having different configurations, such as the second chip 32 including the receiving circuit 14R shown in FIG. 14 and the second chip 32A including the receiving circuit 14RA shown in FIG. The signal of the first chip 31 can be transmitted to 32A. In other words, one type of transformer 140 can be used for two types of

signal transmission devices

110 and 110A with different configurations.

- The shapes of the outer coil 60 and the inner coil 70 in plan view can be arbitrarily changed.
For example, as in a transformer 140E shown in FIG. 27, the outer coil 60 and the inner coil 70 may be formed in a rectangular shape.

Further, as in a transformer 140F shown in FIG. 28, the outer coil 60 and the inner coil 70 may be formed into a rectangular shape with rounded corners.
Further, the outer coil 60 and the inner coil 70 may be formed in an elliptical shape, as in a transformer 140G shown in FIG. 29.

- The first outer coil 61 and the second outer coil 62 of the outer coil 60 may be provided on different insulating layers. For example, in FIG. 17, second outer coil 62 may be disposed on first insulating layer 526. In this case, the second end 61B of the first outer coil 61 and the second end 62B of the second outer coil 62 are formed to overlap each other in plan view. The second end 61B of the first outer coil 61 and the second end 62B of the second outer coil 62 are directly electrically connected.

- In the inner coil 70, the first inner coil 71 and the second inner coil 72 may be provided in different insulating layers.
- In the transformer 140 shown in FIG. 15, the wires W13A and W13B may be configured to be directly connected to the outer coil 60 (first outer coil 61 and second outer coil 62). For example, the distance between the first end 61A of the first outer coil 61 of the outer coil 60 and the inner coil 70 (first inner coil 71) is greater than or equal to the distance required for the withstand voltage of the transformer 140. Thereby, the wire W13A can be connected to the first end 61A of the first outer coil 61. The same applies to the second outer coil 62 and the wire W13B.

As used in this disclosure, the term "on" includes both "on" and "above" unless the context clearly indicates otherwise. Thus, the phrase "the first layer is formed on the second layer" refers to the fact that in some embodiments the first layer may be directly disposed on the second layer in contact with the second layer, but in other embodiments. It is contemplated that the first layer may be placed above the second layer without contacting the second layer. That is, the term "on" does not exclude structures in which other layers are formed between the first layer and the second layer.

The z direction used in this disclosure does not necessarily have to be the vertical direction, nor does it need to completely coincide with the vertical direction. Accordingly, various structures according to the present disclosure (e.g., the structure shown in FIG. 4) are different from each other in that "upper" and "lower" in the Z-axis direction described herein are "upper" and "lower" in the vertical direction. Not limited to one thing. For example, the x direction may be a vertical direction, or the y direction may be a vertical direction.

(Additional note)
The technical ideas that can be understood from this disclosure are described below. Note that, not for the purpose of limitation but for the purpose of aiding understanding, the reference numerals of the corresponding components in the embodiments are attached to the components described in the supplementary notes. Reference numerals are shown by way of example to aid understanding, and the components described in each appendix should not be limited to the components indicated by the reference numerals.

(Additional note 1)
a substrate (51) having a substrate top surface (51S) and a substrate bottom surface (51R);
a first insulator (52) in contact with the upper surface of the substrate (51S);
a second insulator (53) in contact with the lower surface of the substrate (51R);
an outer coil (60) and an inner coil (70) disposed within the first insulator (52);
including;
The inner coil (70) is arranged inside the outer coil (60) when viewed from a direction perpendicular to the upper surface of the substrate (51S) so as not to overlap with the outer coil (60).
Trance.

(Additional note 2)
The first insulator (52) includes a lower surface (52R) in contact with the upper surface of the substrate (51S), and an upper surface (52S) opposite to the lower surface (52R),
At least one of the outer coil (60) and the inner coil (70) is arranged closer to the upper surface (52S) of the first insulator (52) in the thickness direction of the first insulator (52). ing,
The transformer described in Appendix 1.

(Additional note 3)
The outer coil (60) and the inner coil (70) are located at the same position in the thickness direction of the first insulator (52) and are arranged on the same plane orthogonal to the thickness direction.
The transformer according to Supplementary Note 1 or Supplementary Note 2.

(Additional note 4)
The transformer according to any one of Supplementary Notes 1 to 3, wherein the second insulator (53) is formed of the same material as the first insulator (52).

(Appendix 5)
The transformer according to any one of appendices 1 to 4, wherein the first insulator (52) and the second insulator (53) are formed of a material containing Si.

(Appendix 6)
Any of Supplementary notes 1 to 5, wherein the first insulator (52) is composed of a plurality of insulating layers (521 to 526, 52U), and the second insulator (53) is composed of one insulating layer. The transformer mentioned in one of the above.

(Appendix 7)
The transformer according to any one of appendices 1 to 5, wherein the first insulator (52) is composed of one insulating layer, and the second insulator (53) is composed of a plurality of insulating layers. .

(Appendix 8)
The first insulator (52) and the second insulator (53) both include one insulating layer or a plurality of insulating layers, according to any one of Supplementary Notes 1 to 5. Trance.

(Appendix 9)
The transformer according to any one of appendices 1 to 8, wherein the first insulator (52) has a thickness equal to the second insulator (53).

(Appendix 10)
The transformer according to any one of Supplementary Notes 1 to 8, wherein the second insulator (53) is thicker than the first insulator (52).

(Appendix 11)
The transformer according to any one of Supplementary Notes 1 to 8, wherein the first insulator (52) is thicker than the second insulator (53).

(Appendix 12)
The transformer according to any one of appendices 1 to 11, wherein the substrate (51) is electrically floating.

(Appendix 13)
A plurality of the outer coils (60) are provided in the thickness direction of the first insulator (52), and the plurality of outer coils (60) are connected in parallel. The transformer mentioned in one of the above.

(Appendix 14)
A plurality of the outer coils (60) are provided in the thickness direction of the first insulator (52), and the plurality of outer coils (60) are connected in series. The transformer mentioned in one of the above.

(Appendix 15)
A plurality of the inner coils (70) are provided in the thickness direction of the first insulator (52), and the plurality of inner coils (70) are connected in parallel. The transformer mentioned in one of the above.

(Appendix 16)
A plurality of the inner coils (70) are provided in the thickness direction of the first insulator (52), and the plurality of inner coils (70) are connected in series. The transformer mentioned in one of the above.

(Appendix 17)
The outer coil (60) includes a first outer coil (61) and a second outer coil (62) each having a first end and a second end,
The inner coil (70) includes a first inner coil (71) and a second inner coil (72) each having a first end and a second end,
The first outer coil (61) and the second outer coil (62) are formed in a spiral shape when viewed from the thickness direction of the first insulator (52),
In plan view, the first inner coil (71) is arranged inside the first outer coil (61) so as not to overlap with the first outer coil (61), and the second inner coil (72) is arranged inside the first outer coil (61) so as not to overlap with the first outer coil (61). arranged inside the second outer coil (62) so as not to overlap with the second outer coil (62);
The transformer according to any one of Supplementary notes 1 to 12.

(Appendix 18)
A second end of the first outer coil (61) and a second end of the second outer coil (62) are connected to each other, and the first outer coil (61) and the second outer coil (62) are connected to each other. , when current flows from the first end of the first outer coil (61) or the second outer coil (62) to the first outer coil (61) and the second outer coil (62), the directions are opposite to each other. It is wound so that a magnetic flux of
The transformer described in Appendix 17.

(Appendix 19)
The outer coil (60) includes a third outer coil (63) connected to a first end of the first outer coil (61) and a third outer coil (63) connected to a first end of the second outer coil (62). 4 outer coil (64).

(Additional note 20)
The third outer coil (63) is arranged so as to overlap the first outer coil (61) when viewed from the thickness direction of the first insulator (52),
The fourth outer coil (64) is arranged to overlap the second outer coil (62) when viewed from the thickness direction of the first insulator (52).
The transformer described in Appendix 19.

(Additional note 21)
A plurality of the third outer coils (63) and the fourth outer coils (64) are each provided in the thickness direction of the first insulator (52), and the plurality of third outer coils (63) are connected to each other. The transformer according to attachment 19 or attachment 20, wherein the plurality of fourth outer coils (64) are connected to each other.

(Additional note 22)
The inner coil (70) includes a third inner coil connected to the second end of the first inner coil (71) and a fourth inner coil connected to the second end of the second inner coil (72). The transformer according to any one of Supplementary Notes 17 to 21, comprising:

(Additional note 23)
The third inner coil is arranged to overlap the first inner coil (71) when viewed from the thickness direction of the first insulator (52),
The fourth inner coil is arranged to overlap the second inner coil (72) when viewed from the thickness direction of the first insulator (52).
The transformer described in Appendix 22.

(Additional note 24)
A plurality of the third inner coils and a plurality of the fourth inner coils are respectively provided in the thickness direction of the first insulator (52), the plurality of third inner coils are connected to each other, and the plurality of the fourth inner coils are connected to each other. are connected to each other, the transformer according to attachment 22 or attachment 23.

(Additional note 25)
a first die pad (21);
a second die pad (22) spaced apart from the first die pad (21);
a first chip (31) mounted on the first die pad (21) and including a first circuit (13);
a second chip (32) mounted on the second die pad (22) and including a second circuit (14);
Mounted on the first die pad (21) or the second die pad (22) with a bonding material (26), connected between the first circuit (13) and the second circuit (14), a transformer (40, 140) that electrically insulates the circuit (13) and the second circuit (14);
including;
The transformer (40, 140) is
a substrate (51) having a substrate top surface (51S) and a substrate bottom surface (51R);
a first insulator (52) in contact with the upper surface of the substrate (51S);
a second insulator (53) in contact with the lower surface of the substrate (51R);
an outer coil (60) and an inner coil (70) disposed within the first insulator (52);
including;
The inner coil (70) is arranged inside the outer coil (60) when viewed from a direction perpendicular to the upper surface of the substrate (51S) so as not to overlap with the outer coil (60).
Semiconductor equipment.

(Additional note 26)
The semiconductor device according to attachment 25, wherein the bonding material (26) has conductivity.
The above description is merely illustrative. Those skilled in the art will recognize that many more possible combinations and permutations are possible beyond those listed for the purpose of describing the techniques of the present disclosure. This disclosure is intended to cover all alternatives, variations, and modifications falling within the scope of this disclosure, including the claims.

10 Signal transmission device 11 Primary side terminal 12 Secondary side terminal 13 Primary side circuit 13T Transmission circuit 14 Secondary side circuit 14A Secondary side circuit 14R, 14RA Receiving circuit 15 Transformer 16 Primary side coil 17 Secondary side coil

17A First coil

17B Second coil 21 First die pad 22 Second die

pad

23, 23A to 23D

Primary side lead

24, 24A to 24D Secondary side lead 25 to 27 Bonding material 28 Sealing resin 31

First chip

32, 32A 2

chips

40, 40A to 40D Transformer 41 Chip main surface 42 Chip back surface 43 to 46 Chip side surface 51 Substrate 51R Substrate bottom surface 51S Substrate top surface 52 First insulator

52R Bottom surface

52S Top surface 521 to 529 Insulating layer (first insulating layer)
52U insulating layer (second insulating layer)
52U1 to 52U6 Opening 53 Second insulator

53R Bottom surface

53S Top surface 531 to 534 Insulating layer 60 Outer coil 60A First end 60B Second end 61 First outer coil 61A First end 61B Second end 62 Second outer coil

62A First End

62B Second end 63 Third outer coil (outer coil)
631,632 Coil portion 64 Fourth outer coil 641,642

Coil portion

65,66 Via 70 Inner coil 70A First end 70B Second end 71 First inner coil 71A First end 71B Second end 72 Second inner coil 72A No. 1st end 72B 2nd end 75 Via 80 1st wiring part (wiring part)
81 Connection wiring 81A First end

81B Second end

82, 83 Via 84 Terminal part 90 Second wiring part 91 Connection wiring 91A First end

91B Second end

92, 93 Via 94

Terminal part

110, 110A Signal transmission device 115

Transformer

140 , 140A to 140G Transformer 141 Chip main surface 142 Chip back surface 143 to 146 Chip side surface 300 Power transmission device 301 Control circuit 302 Oscillator 303 to 306 Diode 307 Smoothing capacitor 311 DC power supply 312 Load 320

Power transmission device

322A, 322B Secondary side terminal C11, C12 Parasitic capacitor C21, C22 Parasitic capacitor C53, C60, C70 Parasitic capacitor D11, D12 Distance D21, D22 Distance D60 to D62 Distance D70 to D72 Distance D80, D90 Distance I1X Eddy current M1 Magnetic flux T52, T53 Thickness V1 No. 1 Voltage V2 Second voltage W11A, W11B, W12 Wire W13A, W13B Wire W14
W15A, W15B wire W16, W17A, W17B wire W18A, W18B wire

Claims

a substrate having a top surface and a bottom surface;
a first insulator in contact with the upper surface of the substrate;
a second insulator in contact with the lower surface of the substrate;
an outer coil and an inner coil disposed within the first insulator;
including;
The inner coil is disposed inside the outer coil when viewed from a direction perpendicular to the top surface of the substrate and is arranged so as not to overlap the outer coil.
Trance.
The first insulator includes a lower surface in contact with the upper surface of the substrate, and an upper surface opposite to the lower surface,
At least one of the outer coil and the inner coil is disposed closer to the upper surface of the first insulator in the thickness direction of the first insulator.
The transformer according to claim 1.
The outer coil and the inner coil are located at the same position in the thickness direction of the first insulator and are arranged on the same plane orthogonal to the thickness direction,
The transformer according to claim 1 or 2.
The transformer according to any one of claims 1 to 3, wherein the second insulator is made of the same material as the first insulator.
The transformer according to any one of claims 1 to 4, wherein the first insulator and the second insulator are formed of a material containing Si.
The transformer according to any one of claims 1 to 5, wherein the first insulator is composed of a plurality of insulating layers, and the second insulator is composed of one insulating layer.
The transformer according to any one of claims 1 to 5, wherein the first insulator is composed of one insulating layer, and the second insulator is composed of a plurality of insulating layers.
The transformer according to any one of claims 1 to 5, wherein both the first insulator and the second insulator are composed of one insulating layer or a plurality of insulating layers.
The transformer according to any one of claims 1 to 8, wherein the thickness of the first insulator is equal to the thickness of the second insulator.
The transformer according to any one of claims 1 to 8, wherein the second insulator is thicker than the first insulator.
The transformer according to any one of claims 1 to 8, wherein the first insulator is thicker than the second insulator.
The transformer according to any one of claims 1 to 11, wherein the substrate is electrically floating.
The transformer according to any one of claims 1 to 12, wherein a plurality of the outer coils are provided in the thickness direction of the first insulator, and the plurality of outer coils are connected in parallel.
The transformer according to any one of claims 1 to 12, wherein a plurality of the outer coils are provided in the thickness direction of the first insulator, and the plurality of outer coils are connected in series.
The transformer according to any one of claims 1 to 14, wherein a plurality of the inner coils are provided in the thickness direction of the first insulator, and the plurality of inner coils are connected in parallel.
The transformer according to any one of claims 1 to 14, wherein a plurality of the inner coils are provided in the thickness direction of the first insulator, and the plurality of inner coils are connected in series.
The outer coil includes a first outer coil and a second outer coil each having a first end and a second end,
The inner coil includes a first inner coil and a second inner coil each having a first end and a second end,
The first outer coil and the second outer coil are formed in a spiral shape when viewed from the thickness direction of the first insulator,
In plan view, the first inner coil is arranged inside the first outer coil so as not to overlap with the first outer coil, and the second inner coil is arranged inside the second outer coil so as not to overlap with the first outer coil. are arranged so as not to overlap with
A transformer according to any one of claims 1 to 12.
A second end of the first outer coil and a second end of the second outer coil are connected to each other, and the first outer coil and the second outer coil are connected to the first outer coil or the second outer coil. is wound so that magnetic fluxes in opposite directions are generated when a current flows from the first end to the first outer coil and the second outer coil,
The transformer according to claim 17.